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https://github.com/Proxmark/proxmark3.git
synced 2025-02-24 15:44:47 +08:00
Remove LEGIC RF tag emulation code since it's useless without keystream generator
This commit is contained in:
henryk@ploetzli.ch
parent
84c02e97e0
commit
1d99b0df4a
3 changed files with 0 additions and 187 deletions
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@ -621,10 +621,6 @@ void UsbPacketReceived(BYTE *packet, int len)
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break;
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#endif
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case CMD_SIMULATE_TAG_LEGIC_RF:
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LegicRfSimulate();
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break;
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case CMD_MEASURE_ANTENNA_TUNING:
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MeasureAntennaTuning();
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break;
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175
armsrc/legicrf.c
175
armsrc/legicrf.c
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@ -40,45 +40,6 @@ static void setup_timer(void)
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#define FUZZ_EQUAL(value, target, fuzz) ((value) > ((target)-(fuzz)) && (value) < ((target)+(fuzz)))
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static const struct legic_frame queries[] = {
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{7, 0x55}, /* 1010 101 */
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};
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static const struct legic_frame responses[] = {
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{6, 0x3b}, /* 1101 11 */
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};
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/* Send a frame in tag mode, the FPGA must have been set up by
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* LegicRfSimulate
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*/
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static void frame_send_tag(uint16_t response, int bits)
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{
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#if 0
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/* Use the SSC to send a response. 8-bit transfers, LSBit first, 100us per bit */
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#else
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/* Bitbang the response */
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AT91C_BASE_PIOA->PIO_CODR = GPIO_SSC_DOUT;
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AT91C_BASE_PIOA->PIO_OER = GPIO_SSC_DOUT;
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AT91C_BASE_PIOA->PIO_PER = GPIO_SSC_DOUT;
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/* Wait for the frame start */
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while(timer->TC_CV < TAG_TIME_WAIT) ;
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int i;
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for(i=0; i<bits; i++) {
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int nextbit = timer->TC_CV + TAG_TIME_BIT;
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int bit = response & 1;
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response = response >> 1;
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if(bit)
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AT91C_BASE_PIOA->PIO_SODR = GPIO_SSC_DOUT;
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else
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AT91C_BASE_PIOA->PIO_CODR = GPIO_SSC_DOUT;
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while(timer->TC_CV < nextbit) ;
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}
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AT91C_BASE_PIOA->PIO_CODR = GPIO_SSC_DOUT;
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#endif
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}
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/* Send a frame in reader mode, the FPGA must have been set up by
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* LegicRfReader
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*/
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@ -181,148 +142,12 @@ static void frame_receive_rwd(struct legic_frame * const f, int bits)
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f->bits = bits;
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}
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/* Figure out a response to a frame in tag mode */
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static void frame_respond_tag(struct legic_frame const * const f)
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{
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LED_D_ON();
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int i, r_size=0;
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uint16_t r_data=0;
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for(i=0; i<sizeof(queries)/sizeof(queries[0]); i++) {
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if(f->bits == queries[i].bits && f->data == queries[i].data) {
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r_data = responses[i].data;
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r_size = responses[i].bits;
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break;
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}
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}
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if(r_size != 0) {
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frame_send_tag(r_data, r_size);
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LED_A_ON();
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} else {
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LED_A_OFF();
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}
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LED_D_OFF();
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}
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static void frame_append_bit(struct legic_frame * const f, int bit)
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{
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if(f->bits >= 15)
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return; /* Overflow, won't happen */
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f->data |= (bit<<f->bits);
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f->bits++;
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}
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static int frame_is_empty(struct legic_frame const * const f)
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{
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return( f->bits <= 4 );
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}
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/* Handle (whether to respond) a frame in tag mode */
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static void frame_handle_tag(struct legic_frame const * const f)
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{
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if(f->bits == 6) {
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/* Short path */
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return;
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}
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if( !frame_is_empty(f) ) {
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frame_respond_tag(f);
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}
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}
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static void frame_clean(struct legic_frame * const f)
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{
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f->data = 0;
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f->bits = 0;
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}
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enum emit_mode {
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EMIT_RWD, /* Emit in tag simulation mode, e.g. the source is the RWD */
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EMIT_TAG /* Emit in reader simulation mode, e.g. the source is the TAG */
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};
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static void emit(enum emit_mode mode, int bit)
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{
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if(bit == -1) {
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if(mode == EMIT_RWD) {
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frame_handle_tag(¤t_frame);
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}
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frame_clean(¤t_frame);
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} else if(bit == 0) {
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frame_append_bit(¤t_frame, 0);
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} else if(bit == 1) {
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frame_append_bit(¤t_frame, 1);
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}
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}
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void LegicRfSimulate(void)
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{
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/* ADC path high-frequency peak detector, FPGA in high-frequency simulator mode,
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* modulation mode set to 212kHz subcarrier. We are getting the incoming raw
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* envelope waveform on DIN and should send our response on DOUT.
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*
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* The LEGIC RF protocol is pulse-pause-encoding from reader to card, so we'll
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* measure the time between two rising edges on DIN, and no encoding on the
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* subcarrier from card to reader, so we'll just shift out our verbatim data
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* on DOUT, 1 bit is 100us. The time from reader to card frame is still unclear,
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* seems to be 300us-ish.
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*/
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SetAdcMuxFor(GPIO_MUXSEL_HIPKD);
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FpgaSetupSsc();
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FpgaWriteConfWord(FPGA_MAJOR_MODE_HF_SIMULATOR | FPGA_HF_SIMULATOR_MODULATE_212K);
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/* Bitbang the receiver */
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AT91C_BASE_PIOA->PIO_ODR = GPIO_SSC_DIN;
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AT91C_BASE_PIOA->PIO_PER = GPIO_SSC_DIN;
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setup_timer();
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int old_level = 0;
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int active = 0;
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while(!BUTTON_PRESS()) {
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int level = !!(AT91C_BASE_PIOA->PIO_PDSR & GPIO_SSC_DIN);
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int time = timer->TC_CV;
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if(level != old_level) {
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if(level == 1) {
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timer->TC_CCR = AT91C_TC_CLKEN | AT91C_TC_SWTRG;
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if(FUZZ_EQUAL(time, RWD_TIME_1, RWD_TIME_FUZZ)) {
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/* 1 bit */
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emit(EMIT_RWD, 1);
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active = 1;
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LED_B_ON();
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} else if(FUZZ_EQUAL(time, RWD_TIME_0, RWD_TIME_FUZZ)) {
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/* 0 bit */
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emit(EMIT_RWD, 0);
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active = 1;
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LED_B_ON();
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} else if(active) {
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/* invalid */
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emit(EMIT_RWD, -1);
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active = 0;
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LED_B_OFF();
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}
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}
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}
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if(time >= (RWD_TIME_1+RWD_TIME_FUZZ) && active) {
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/* Frame end */
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emit(EMIT_RWD, -1);
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active = 0;
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LED_B_OFF();
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}
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if(time >= (20*RWD_TIME_1) && (timer->TC_SR & AT91C_TC_CLKSTA)) {
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timer->TC_CCR = AT91C_TC_CLKDIS;
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}
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old_level = level;
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WDT_HIT();
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}
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}
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void LegicRfReader(void)
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{
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SetAdcMuxFor(GPIO_MUXSEL_HIPKD);
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@ -202,12 +202,6 @@ static void CmdHi14asnoop(char *str)
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SendCommand(&c);
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}
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static void CmdLegicRfSim(char *str)
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{
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UsbCommand c={CMD_SIMULATE_TAG_LEGIC_RF};
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SendCommand(&c);
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}
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static void CmdLegicRfRead(char *str)
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{
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UsbCommand c={CMD_READER_LEGIC_RF};
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@ -2846,7 +2840,6 @@ static struct {
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{"indalademod", CmdIndalademod, 0, "['224'] -- Demodulate samples for Indala 64 bit UID (option '224' for 224 bit)"},
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{"lcd", CmdLcd, 0, "<HEX command> <count> -- Send command/data to LCD"},
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{"lcdreset", CmdLcdReset, 0, "Hardware reset LCD"},
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{"legicrfsim", CmdLegicRfSim, 0, "Start the LEGIC RF tag simulator"},
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{"legicrfread", CmdLegicRfRead, 0, "Start the LEGIC RF reader"},
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{"load", CmdLoad, 1, "<filename> -- Load trace (to graph window"},
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{"locomread", CmdLoCommandRead, 0, "<off period> <'0' period> <'1' period> <command> ['h'] -- Modulate LF reader field to send command before read (all periods in microseconds) (option 'h' for 134)"},
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@ -3007,7 +3000,6 @@ void UsbCommandReceived(UsbCommand *c)
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if (c->cmd != CMD_DOWNLOADED_RAW_ADC_SAMPLES_125K) goto unexpected_response;
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int i;
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for(i=0; i<48; i++) sample_buf[i] = c->d.asBytes[i];
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printf("stored 48 samples\n");
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received_command = c->cmd;
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return;
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default:
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