Small changes to some armsrc makefile to allow conditional compilation of various protocols via defines, change winsrc makefile to allow override of compiler location via external defines, finally change fpgaloader to actually check that the image upload succeeded instead of just blindly sending it and hoping for the best.

This commit is contained in:
d18c7db 2009-09-22 09:57:03 +00:00
parent c3adc9fd60
commit d3ae0de746
3 changed files with 55 additions and 15 deletions

View file

@ -2,24 +2,29 @@
APP_INCLUDES = apps.h APP_INCLUDES = apps.h
# Add the "-DWITH_LCD" flag in APP_CLFAGS to add support for LCD #remove one of the following defines and comment out the relevant line
# and add SRC_LCD to THUMBSRC #in the next section to remove that particular feature from compilation
APP_CFLAGS = -O6 APP_CFLAGS = -O6 -DWITH_ISO15693 -DWITH_ISO14443a -DWITH_ISO14443b
#-DWITH_LCD
SRC_LCD = fonts.c LCD.c #SRC_LCD = fonts.c LCD.c
SRC_ISO15693 = iso15693.c
SRC_ISO14443a = iso14443a.c
SRC_ISO14443b = iso14443.c
THUMBSRC = start.c \ THUMBSRC = start.c \
$(SRC_LCD) \
$(SRC_ISO15693) \
appmain.c \ appmain.c \
lfops.c \ lfops.c \
iso15693.c \
util.c \ util.c \
hitag2.c \ hitag2.c \
usb.c usb.c
# These are to be compiled in ARM mode # These are to be compiled in ARM mode
ARMSRC = iso14443.c \ ARMSRC = fpgaloader.c \
iso14443a.c \ $(SRC_ISO14443a) \
fpgaloader.c $(SRC_ISO14443b)
# Do not move this inclusion before the definition of {THUMB,ASM,ARM}SRC # Do not move this inclusion before the definition of {THUMB,ASM,ARM}SRC
include ../common/Makefile.common include ../common/Makefile.common

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@ -152,28 +152,50 @@ static void DownloadFPGA_byte(unsigned char w)
// If bytereversal is set: reverse the byte order in each 4-byte word // If bytereversal is set: reverse the byte order in each 4-byte word
static void DownloadFPGA(const char *FpgaImage, int FpgaImageLen, int bytereversal) static void DownloadFPGA(const char *FpgaImage, int FpgaImageLen, int bytereversal)
{ {
int i; int i=0;
PIO_OUTPUT_ENABLE = (1 << GPIO_FPGA_ON); PIO_OUTPUT_ENABLE = (1 << GPIO_FPGA_ON);
PIO_ENABLE = (1 << GPIO_FPGA_ON); PIO_ENABLE = (1 << GPIO_FPGA_ON);
PIO_OUTPUT_DATA_SET = (1 << GPIO_FPGA_ON); HIGH(GPIO_FPGA_ON); // ensure everything is powered on
SpinDelay(50); SpinDelay(50);
LED_D_ON(); LED_D_ON();
// These pins are inputs
PIO_OUTPUT_DISABLE = (1 << GPIO_FPGA_NINIT) | (1 << GPIO_FPGA_DONE);
// PIO controls the following pins
PIO_ENABLE = (1 << GPIO_FPGA_NINIT) | (1 << GPIO_FPGA_DONE);
// Enable pull-ups
PIO_NO_PULL_UP_DISABLE = (1 << GPIO_FPGA_NINIT) | (1 << GPIO_FPGA_DONE);
// setup initial logic state
HIGH(GPIO_FPGA_NPROGRAM); HIGH(GPIO_FPGA_NPROGRAM);
LOW(GPIO_FPGA_CCLK); LOW(GPIO_FPGA_CCLK);
LOW(GPIO_FPGA_DIN); LOW(GPIO_FPGA_DIN);
// These pins are outputs
PIO_OUTPUT_ENABLE = (1 << GPIO_FPGA_NPROGRAM) | PIO_OUTPUT_ENABLE = (1 << GPIO_FPGA_NPROGRAM) |
(1 << GPIO_FPGA_CCLK) | (1 << GPIO_FPGA_CCLK) |
(1 << GPIO_FPGA_DIN); (1 << GPIO_FPGA_DIN);
SpinDelay(1);
// enter FPGA configuration mode
LOW(GPIO_FPGA_NPROGRAM); LOW(GPIO_FPGA_NPROGRAM);
SpinDelay(50); SpinDelay(50);
HIGH(GPIO_FPGA_NPROGRAM); HIGH(GPIO_FPGA_NPROGRAM);
i=100000;
// wait for FPGA ready to accept data signal
while ((i) && ( !(PIO_PIN_DATA_STATUS & (1<<GPIO_FPGA_NINIT) ) ) ) {
i--;
}
// crude error indicator, leave both red LEDs on and return
if (i==0){
LED_C_ON();
LED_D_ON();
return;
}
if(bytereversal) { if(bytereversal) {
/* This is only supported for DWORD aligned images */ /* This is only supported for DWORD aligned images */
if( ((int)FpgaImage % sizeof(DWORD)) == 0 ) { if( ((int)FpgaImage % sizeof(DWORD)) == 0 ) {
@ -183,7 +205,7 @@ static void DownloadFPGA(const char *FpgaImage, int FpgaImageLen, int byterevers
/* Explanation of the magic in the above line: /* Explanation of the magic in the above line:
* i^0x3 inverts the lower two bits of the integer i, counting backwards * i^0x3 inverts the lower two bits of the integer i, counting backwards
* for each 4 byte increment. The generated sequence of (i++)^3 is * for each 4 byte increment. The generated sequence of (i++)^3 is
* 3 2 1 0 7 6 5 4 11 10 9 8 15 14 13 12 etc. pp. * 3 2 1 0 7 6 5 4 11 10 9 8 15 14 13 12 etc. pp.
*/ */
} }
} else { } else {
@ -191,6 +213,18 @@ static void DownloadFPGA(const char *FpgaImage, int FpgaImageLen, int byterevers
DownloadFPGA_byte(*FpgaImage++); DownloadFPGA_byte(*FpgaImage++);
} }
// continue to clock FPGA until ready signal goes high
i=100000;
while ( (i--) && ( !(PIO_PIN_DATA_STATUS & (1<<GPIO_FPGA_DONE) ) ) ) {
HIGH(GPIO_FPGA_CCLK);
LOW(GPIO_FPGA_CCLK);
}
// crude error indicator, leave both red LEDs on and return
if (i==0){
LED_C_ON();
LED_D_ON();
return;
}
LED_D_OFF(); LED_D_OFF();
} }

View file

@ -1,10 +1,11 @@
CC=cl CC=cl
BASE_DIR ?= "..\..\devkitWIN"
BASE_DEFS = /D_WIN32_WINNT=0x501 /DISOLATION_AWARE_ENABLED /D_WIN32_IE=0x600 /DWIN32_LEAN_AND_MEAN /DWIN32 /D_MT /D_CRT_SECURE_NO_WARNINGS BASE_DEFS = /D_WIN32_WINNT=0x501 /DISOLATION_AWARE_ENABLED /D_WIN32_IE=0x600 /DWIN32_LEAN_AND_MEAN /DWIN32 /D_MT /D_CRT_SECURE_NO_WARNINGS
BASE_CFLAGS = /W3 /nologo /Zi /MT /Fdobj/vc90.pdb BASE_CFLAGS = /W3 /nologo /Zi /MT /Fdobj/vc90.pdb
LIB=..\..\devkitWIN\lib;%LIB% LIB = $(BASE_DIR)\lib
DEFINES = $(BASE_DEFS) DEFINES = $(BASE_DEFS)
INCLUDES = /I..\..\devkitWIN/include INCLUDES = /I$(BASE_DIR)\include
CFLAGS = $(BASE_CFLAGS) $(INCLUDES) CFLAGS = $(BASE_CFLAGS) $(INCLUDES)
OBJDIR = obj OBJDIR = obj
@ -13,7 +14,7 @@ OBJS = $(OBJDIR)\prox.obj \
$(OBJDIR)\gui.obj \ $(OBJDIR)\gui.obj \
$(OBJDIR)\command.obj $(OBJDIR)\command.obj
LIBS = user32.lib gdi32.lib setupapi.lib LIBS = $(LIB)\user32.lib $(LIB)\gdi32.lib $(LIB)\setupapi.lib $(LIB)\libcmt.lib $(LIB)\oldnames.lib $(LIB)\kernel32.lib
all: proxmark3 all: proxmark3