mirror of
https://github.com/RfidResearchGroup/proxmark3.git
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989 lines
30 KiB
C
989 lines
30 KiB
C
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//-----------------------------------------------------------------------------
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// Routines to support ISO 14443. This includes both the reader software and
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// the `fake tag' modes. At the moment only the Type B modulation is
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// supported.
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// Jonathan Westhues, split Nov 2006
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//-----------------------------------------------------------------------------
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#include <proxmark3.h>
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#include "apps.h"
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#include "..\common\iso14443_crc.c"
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//static void GetSamplesFor14443(BOOL weTx, int n);
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#define DMA_BUFFER_SIZE 256
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//=============================================================================
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// An ISO 14443 Type B tag. We listen for commands from the reader, using
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// a UART kind of thing that's implemented in software. When we get a
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// frame (i.e., a group of bytes between SOF and EOF), we check the CRC.
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// If it's good, then we can do something appropriate with it, and send
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// a response.
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//=============================================================================
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//-----------------------------------------------------------------------------
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// Code up a string of octets at layer 2 (including CRC, we don't generate
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// that here) so that they can be transmitted to the reader. Doesn't transmit
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// them yet, just leaves them ready to send in ToSend[].
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//-----------------------------------------------------------------------------
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static void CodeIso14443bAsTag(const BYTE *cmd, int len)
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{
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int i;
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ToSendReset();
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// Transmit a burst of ones, as the initial thing that lets the
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// reader get phase sync. This (TR1) must be > 80/fs, per spec,
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// but tag that I've tried (a Paypass) exceeds that by a fair bit,
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// so I will too.
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for(i = 0; i < 20; i++) {
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ToSendStuffBit(1);
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ToSendStuffBit(1);
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ToSendStuffBit(1);
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ToSendStuffBit(1);
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}
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// Send SOF.
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for(i = 0; i < 10; i++) {
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ToSendStuffBit(0);
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ToSendStuffBit(0);
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ToSendStuffBit(0);
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ToSendStuffBit(0);
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}
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for(i = 0; i < 2; i++) {
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ToSendStuffBit(1);
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ToSendStuffBit(1);
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ToSendStuffBit(1);
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ToSendStuffBit(1);
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}
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for(i = 0; i < len; i++) {
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int j;
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BYTE b = cmd[i];
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// Start bit
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ToSendStuffBit(0);
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ToSendStuffBit(0);
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ToSendStuffBit(0);
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ToSendStuffBit(0);
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// Data bits
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for(j = 0; j < 8; j++) {
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if(b & 1) {
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ToSendStuffBit(1);
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ToSendStuffBit(1);
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ToSendStuffBit(1);
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ToSendStuffBit(1);
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} else {
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ToSendStuffBit(0);
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ToSendStuffBit(0);
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ToSendStuffBit(0);
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ToSendStuffBit(0);
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}
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b >>= 1;
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}
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// Stop bit
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ToSendStuffBit(1);
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ToSendStuffBit(1);
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ToSendStuffBit(1);
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ToSendStuffBit(1);
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}
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// Send SOF.
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for(i = 0; i < 10; i++) {
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ToSendStuffBit(0);
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ToSendStuffBit(0);
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ToSendStuffBit(0);
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ToSendStuffBit(0);
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}
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for(i = 0; i < 10; i++) {
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ToSendStuffBit(1);
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ToSendStuffBit(1);
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ToSendStuffBit(1);
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ToSendStuffBit(1);
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}
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// Convert from last byte pos to length
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ToSendMax++;
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// Add a few more for slop
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ToSendMax += 2;
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}
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//-----------------------------------------------------------------------------
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// The software UART that receives commands from the reader, and its state
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// variables.
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//-----------------------------------------------------------------------------
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static struct {
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enum {
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STATE_UNSYNCD,
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STATE_GOT_FALLING_EDGE_OF_SOF,
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STATE_AWAITING_START_BIT,
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STATE_RECEIVING_DATA,
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STATE_ERROR_WAIT
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} state;
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WORD shiftReg;
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int bitCnt;
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int byteCnt;
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int byteCntMax;
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int posCnt;
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BYTE *output;
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} Uart;
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static BOOL Handle14443UartBit(int bit)
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{
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switch(Uart.state) {
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case STATE_UNSYNCD:
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if(!bit) {
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// we went low, so this could be the beginning
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// of an SOF
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Uart.state = STATE_GOT_FALLING_EDGE_OF_SOF;
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Uart.posCnt = 0;
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Uart.bitCnt = 0;
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}
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break;
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case STATE_GOT_FALLING_EDGE_OF_SOF:
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Uart.posCnt++;
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if(Uart.posCnt == 2) {
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if(bit) {
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if(Uart.bitCnt >= 10) {
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// we've seen enough consecutive
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// zeros that it's a valid SOF
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Uart.posCnt = 0;
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Uart.byteCnt = 0;
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Uart.state = STATE_AWAITING_START_BIT;
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} else {
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// didn't stay down long enough
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// before going high, error
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Uart.state = STATE_ERROR_WAIT;
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}
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} else {
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// do nothing, keep waiting
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}
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Uart.bitCnt++;
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}
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if(Uart.posCnt >= 4) Uart.posCnt = 0;
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if(Uart.bitCnt > 14) {
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// Give up if we see too many zeros without
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// a one, too.
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Uart.state = STATE_ERROR_WAIT;
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}
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break;
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case STATE_AWAITING_START_BIT:
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Uart.posCnt++;
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if(bit) {
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if(Uart.posCnt > 25) {
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// stayed high for too long between
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// characters, error
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Uart.state = STATE_ERROR_WAIT;
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}
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} else {
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// falling edge, this starts the data byte
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Uart.posCnt = 0;
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Uart.bitCnt = 0;
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Uart.shiftReg = 0;
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Uart.state = STATE_RECEIVING_DATA;
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}
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break;
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case STATE_RECEIVING_DATA:
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Uart.posCnt++;
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if(Uart.posCnt == 2) {
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// time to sample a bit
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Uart.shiftReg >>= 1;
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if(bit) {
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Uart.shiftReg |= 0x200;
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}
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Uart.bitCnt++;
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}
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if(Uart.posCnt >= 4) {
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Uart.posCnt = 0;
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}
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if(Uart.bitCnt == 10) {
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if((Uart.shiftReg & 0x200) && !(Uart.shiftReg & 0x001))
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{
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// this is a data byte, with correct
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// start and stop bits
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Uart.output[Uart.byteCnt] = (Uart.shiftReg >> 1) & 0xff;
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Uart.byteCnt++;
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if(Uart.byteCnt >= Uart.byteCntMax) {
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// Buffer overflowed, give up
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Uart.posCnt = 0;
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Uart.state = STATE_ERROR_WAIT;
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} else {
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// so get the next byte now
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Uart.posCnt = 0;
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Uart.state = STATE_AWAITING_START_BIT;
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}
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} else if(Uart.shiftReg == 0x000) {
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// this is an EOF byte
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return TRUE;
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} else {
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// this is an error
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Uart.posCnt = 0;
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Uart.state = STATE_ERROR_WAIT;
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}
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}
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break;
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case STATE_ERROR_WAIT:
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// We're all screwed up, so wait a little while
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// for whatever went wrong to finish, and then
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// start over.
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Uart.posCnt++;
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if(Uart.posCnt > 10) {
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Uart.state = STATE_UNSYNCD;
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}
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break;
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default:
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Uart.state = STATE_UNSYNCD;
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break;
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}
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return FALSE;
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}
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//-----------------------------------------------------------------------------
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// Receive a command (from the reader to us, where we are the simulated tag),
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// and store it in the given buffer, up to the given maximum length. Keeps
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// spinning, waiting for a well-framed command, until either we get one
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// (returns TRUE) or someone presses the pushbutton on the board (FALSE).
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//
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// Assume that we're called with the SSC (to the FPGA) and ADC path set
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// correctly.
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//-----------------------------------------------------------------------------
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static BOOL GetIso14443CommandFromReader(BYTE *received, int *len, int maxLen)
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{
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BYTE mask;
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int i, bit;
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// Set FPGA mode to "simulated ISO 14443 tag", no modulation (listen
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// only, since we are receiving, not transmitting).
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FpgaWriteConfWord(
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FPGA_MAJOR_MODE_HF_SIMULATOR | FPGA_HF_SIMULATOR_NO_MODULATION);
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// Now run a `software UART' on the stream of incoming samples.
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Uart.output = received;
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Uart.byteCntMax = maxLen;
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Uart.state = STATE_UNSYNCD;
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for(;;) {
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WDT_HIT();
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if(BUTTON_PRESS()) return FALSE;
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if(SSC_STATUS & (SSC_STATUS_TX_READY)) {
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SSC_TRANSMIT_HOLDING = 0x00;
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}
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if(SSC_STATUS & (SSC_STATUS_RX_READY)) {
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BYTE b = (BYTE)SSC_RECEIVE_HOLDING;
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mask = 0x80;
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for(i = 0; i < 8; i++, mask >>= 1) {
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bit = (b & mask);
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if(Handle14443UartBit(bit)) {
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*len = Uart.byteCnt;
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return TRUE;
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}
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}
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}
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}
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}
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//-----------------------------------------------------------------------------
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// Main loop of simulated tag: receive commands from reader, decide what
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// response to send, and send it.
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//-----------------------------------------------------------------------------
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void SimulateIso14443Tag(void)
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{
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static const BYTE cmd1[] = { 0x05, 0x00, 0x08, 0x39, 0x73 };
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static const BYTE response1[] = {
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0x50, 0x82, 0x0d, 0xe1, 0x74, 0x20, 0x38, 0x19, 0x22,
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0x00, 0x21, 0x85, 0x5e, 0xd7
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};
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BYTE *resp;
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int respLen;
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BYTE *resp1 = (((BYTE *)BigBuf) + 800);
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int resp1Len;
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BYTE *receivedCmd = (BYTE *)BigBuf;
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int len;
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int i;
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int cmdsRecvd = 0;
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memset(receivedCmd, 0x44, 400);
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CodeIso14443bAsTag(response1, sizeof(response1));
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memcpy(resp1, ToSend, ToSendMax); resp1Len = ToSendMax;
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// We need to listen to the high-frequency, peak-detected path.
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SetAdcMuxFor(GPIO_MUXSEL_HIPKD);
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FpgaSetupSsc();
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cmdsRecvd = 0;
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for(;;) {
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BYTE b1, b2;
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if(!GetIso14443CommandFromReader(receivedCmd, &len, 100)) {
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DbpIntegers(cmdsRecvd, 0, 0);
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DbpString("button press");
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break;
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}
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// Good, look at the command now.
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if(len == sizeof(cmd1) && memcmp(receivedCmd, cmd1, len)==0) {
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resp = resp1; respLen = resp1Len;
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} else {
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DbpString("new cmd from reader:");
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DbpIntegers(len, 0x1234, cmdsRecvd);
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// And print whether the CRC fails, just for good measure
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ComputeCrc14443(CRC_14443_B, receivedCmd, len-2, &b1, &b2);
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if(b1 != receivedCmd[len-2] || b2 != receivedCmd[len-1]) {
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// Not so good, try again.
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DbpString("+++CRC fail");
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} else {
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DbpString("CRC passes");
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}
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break;
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}
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memset(receivedCmd, 0x44, 32);
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cmdsRecvd++;
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if(cmdsRecvd > 0x30) {
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DbpString("many commands later...");
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break;
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}
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if(respLen <= 0) continue;
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// Modulate BPSK
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FpgaWriteConfWord(
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FPGA_MAJOR_MODE_HF_SIMULATOR | FPGA_HF_SIMULATOR_MODULATE_BPSK);
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SSC_TRANSMIT_HOLDING = 0xff;
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FpgaSetupSsc();
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// Transmit the response.
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i = 0;
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for(;;) {
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if(SSC_STATUS & (SSC_STATUS_TX_READY)) {
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BYTE b = resp[i];
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SSC_TRANSMIT_HOLDING = b;
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i++;
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if(i > respLen) {
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break;
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}
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}
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if(SSC_STATUS & (SSC_STATUS_RX_READY)) {
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volatile BYTE b = (BYTE)SSC_RECEIVE_HOLDING;
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(void)b;
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}
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}
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}
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}
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//=============================================================================
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// An ISO 14443 Type B reader. We take layer two commands, code them
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// appropriately, and then send them to the tag. We then listen for the
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// tag's response, which we leave in the buffer to be demodulated on the
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// PC side.
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//=============================================================================
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static struct {
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enum {
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DEMOD_UNSYNCD,
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DEMOD_PHASE_REF_TRAINING,
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DEMOD_AWAITING_FALLING_EDGE_OF_SOF,
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DEMOD_GOT_FALLING_EDGE_OF_SOF,
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DEMOD_AWAITING_START_BIT,
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DEMOD_RECEIVING_DATA,
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DEMOD_ERROR_WAIT
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} state;
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int bitCount;
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int posCount;
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int thisBit;
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int metric;
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int metricN;
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WORD shiftReg;
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BYTE *output;
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int len;
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int sumI;
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int sumQ;
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} Demod;
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static BOOL Handle14443SamplesDemod(int ci, int cq)
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{
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int v;
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// The soft decision on the bit uses an estimate of just the
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// quadrant of the reference angle, not the exact angle.
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#define MAKE_SOFT_DECISION() { \
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if(Demod.sumI > 0) { \
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v = ci; \
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} else { \
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v = -ci; \
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} \
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if(Demod.sumQ > 0) { \
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v += cq; \
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} else { \
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v -= cq; \
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} \
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}
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switch(Demod.state) {
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case DEMOD_UNSYNCD:
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v = ci;
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if(v < 0) v = -v;
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if(cq > 0) {
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v += cq;
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} else {
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v -= cq;
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}
|
||
|
if(v > 40) {
|
||
|
Demod.posCount = 0;
|
||
|
Demod.state = DEMOD_PHASE_REF_TRAINING;
|
||
|
Demod.sumI = 0;
|
||
|
Demod.sumQ = 0;
|
||
|
}
|
||
|
break;
|
||
|
|
||
|
case DEMOD_PHASE_REF_TRAINING:
|
||
|
if(Demod.posCount < 8) {
|
||
|
Demod.sumI += ci;
|
||
|
Demod.sumQ += cq;
|
||
|
} else if(Demod.posCount > 100) {
|
||
|
// error, waited too long
|
||
|
Demod.state = DEMOD_UNSYNCD;
|
||
|
} else {
|
||
|
MAKE_SOFT_DECISION();
|
||
|
if(v < 0) {
|
||
|
Demod.state = DEMOD_AWAITING_FALLING_EDGE_OF_SOF;
|
||
|
Demod.posCount = 0;
|
||
|
}
|
||
|
}
|
||
|
Demod.posCount++;
|
||
|
break;
|
||
|
|
||
|
case DEMOD_AWAITING_FALLING_EDGE_OF_SOF:
|
||
|
MAKE_SOFT_DECISION();
|
||
|
if(v < 0) {
|
||
|
Demod.state = DEMOD_GOT_FALLING_EDGE_OF_SOF;
|
||
|
Demod.posCount = 0;
|
||
|
} else {
|
||
|
if(Demod.posCount > 100) {
|
||
|
Demod.state = DEMOD_UNSYNCD;
|
||
|
}
|
||
|
}
|
||
|
Demod.posCount++;
|
||
|
break;
|
||
|
|
||
|
case DEMOD_GOT_FALLING_EDGE_OF_SOF:
|
||
|
MAKE_SOFT_DECISION();
|
||
|
if(v > 0) {
|
||
|
if(Demod.posCount < 12) {
|
||
|
Demod.state = DEMOD_UNSYNCD;
|
||
|
} else {
|
||
|
Demod.state = DEMOD_AWAITING_START_BIT;
|
||
|
Demod.posCount = 0;
|
||
|
Demod.len = 0;
|
||
|
Demod.metricN = 0;
|
||
|
Demod.metric = 0;
|
||
|
}
|
||
|
} else {
|
||
|
if(Demod.posCount > 100) {
|
||
|
Demod.state = DEMOD_UNSYNCD;
|
||
|
}
|
||
|
}
|
||
|
Demod.posCount++;
|
||
|
break;
|
||
|
|
||
|
case DEMOD_AWAITING_START_BIT:
|
||
|
MAKE_SOFT_DECISION();
|
||
|
if(v > 0) {
|
||
|
if(Demod.posCount > 10) {
|
||
|
Demod.state = DEMOD_UNSYNCD;
|
||
|
}
|
||
|
} else {
|
||
|
Demod.bitCount = 0;
|
||
|
Demod.posCount = 1;
|
||
|
Demod.thisBit = v;
|
||
|
Demod.shiftReg = 0;
|
||
|
Demod.state = DEMOD_RECEIVING_DATA;
|
||
|
}
|
||
|
break;
|
||
|
|
||
|
case DEMOD_RECEIVING_DATA:
|
||
|
MAKE_SOFT_DECISION();
|
||
|
if(Demod.posCount == 0) {
|
||
|
Demod.thisBit = v;
|
||
|
Demod.posCount = 1;
|
||
|
} else {
|
||
|
Demod.thisBit += v;
|
||
|
|
||
|
if(Demod.thisBit > 0) {
|
||
|
Demod.metric += Demod.thisBit;
|
||
|
} else {
|
||
|
Demod.metric -= Demod.thisBit;
|
||
|
}
|
||
|
(Demod.metricN)++;
|
||
|
|
||
|
Demod.shiftReg >>= 1;
|
||
|
if(Demod.thisBit > 0) {
|
||
|
Demod.shiftReg |= 0x200;
|
||
|
}
|
||
|
|
||
|
Demod.bitCount++;
|
||
|
if(Demod.bitCount == 10) {
|
||
|
WORD s = Demod.shiftReg;
|
||
|
if((s & 0x200) && !(s & 0x001)) {
|
||
|
BYTE b = (s >> 1);
|
||
|
Demod.output[Demod.len] = b;
|
||
|
Demod.len++;
|
||
|
Demod.state = DEMOD_AWAITING_START_BIT;
|
||
|
} else if(s == 0x000) {
|
||
|
// This is EOF
|
||
|
return TRUE;
|
||
|
Demod.state = DEMOD_UNSYNCD;
|
||
|
} else {
|
||
|
Demod.state = DEMOD_UNSYNCD;
|
||
|
}
|
||
|
}
|
||
|
Demod.posCount = 0;
|
||
|
}
|
||
|
break;
|
||
|
|
||
|
default:
|
||
|
Demod.state = DEMOD_UNSYNCD;
|
||
|
break;
|
||
|
}
|
||
|
|
||
|
return FALSE;
|
||
|
}
|
||
|
|
||
|
static void GetSamplesFor14443Demod(BOOL weTx, int n)
|
||
|
{
|
||
|
int max = 0;
|
||
|
BOOL gotFrame = FALSE;
|
||
|
|
||
|
//# define DMA_BUFFER_SIZE 8
|
||
|
SBYTE *dmaBuf;
|
||
|
|
||
|
int lastRxCounter;
|
||
|
SBYTE *upTo;
|
||
|
|
||
|
int ci, cq;
|
||
|
|
||
|
int samples = 0;
|
||
|
|
||
|
// Clear out the state of the "UART" that receives from the tag.
|
||
|
memset(BigBuf, 0x44, 400);
|
||
|
Demod.output = (BYTE *)BigBuf;
|
||
|
Demod.len = 0;
|
||
|
Demod.state = DEMOD_UNSYNCD;
|
||
|
|
||
|
// And the UART that receives from the reader
|
||
|
Uart.output = (((BYTE *)BigBuf) + 1024);
|
||
|
Uart.byteCntMax = 100;
|
||
|
Uart.state = STATE_UNSYNCD;
|
||
|
|
||
|
// Setup for the DMA.
|
||
|
dmaBuf = (SBYTE *)(BigBuf + 32);
|
||
|
upTo = dmaBuf;
|
||
|
lastRxCounter = DMA_BUFFER_SIZE;
|
||
|
FpgaSetupSscDma((BYTE *)dmaBuf, DMA_BUFFER_SIZE);
|
||
|
|
||
|
// And put the FPGA in the appropriate mode
|
||
|
FpgaWriteConfWord(
|
||
|
FPGA_MAJOR_MODE_HF_READER_RX_XCORR | FPGA_HF_READER_RX_XCORR_848_KHZ |
|
||
|
(weTx ? 0 : FPGA_HF_READER_RX_XCORR_SNOOP));
|
||
|
|
||
|
for(;;) {
|
||
|
int behindBy = lastRxCounter - PDC_RX_COUNTER(SSC_BASE);
|
||
|
if(behindBy > max) max = behindBy;
|
||
|
|
||
|
LED_D_ON();
|
||
|
while(((lastRxCounter-PDC_RX_COUNTER(SSC_BASE)) & (DMA_BUFFER_SIZE-1))
|
||
|
> 2)
|
||
|
{
|
||
|
ci = upTo[0];
|
||
|
cq = upTo[1];
|
||
|
upTo += 2;
|
||
|
if(upTo - dmaBuf > DMA_BUFFER_SIZE) {
|
||
|
upTo -= DMA_BUFFER_SIZE;
|
||
|
PDC_RX_NEXT_POINTER(SSC_BASE) = (DWORD)upTo;
|
||
|
PDC_RX_NEXT_COUNTER(SSC_BASE) = DMA_BUFFER_SIZE;
|
||
|
}
|
||
|
lastRxCounter -= 2;
|
||
|
if(lastRxCounter <= 0) {
|
||
|
lastRxCounter += DMA_BUFFER_SIZE;
|
||
|
}
|
||
|
|
||
|
samples += 2;
|
||
|
|
||
|
Handle14443UartBit(1);
|
||
|
Handle14443UartBit(1);
|
||
|
|
||
|
if(Handle14443SamplesDemod(ci, cq)) {
|
||
|
gotFrame = 1;
|
||
|
}
|
||
|
}
|
||
|
LED_D_OFF();
|
||
|
|
||
|
if(samples > 2000) {
|
||
|
break;
|
||
|
}
|
||
|
}
|
||
|
PDC_CONTROL(SSC_BASE) = PDC_RX_DISABLE;
|
||
|
DbpIntegers(max, gotFrame, -1);
|
||
|
}
|
||
|
|
||
|
//-----------------------------------------------------------------------------
|
||
|
// Read the tag's response. We just receive a stream of slightly-processed
|
||
|
// samples from the FPGA, which we will later do some signal processing on,
|
||
|
// to get the bits.
|
||
|
//-----------------------------------------------------------------------------
|
||
|
/*static void GetSamplesFor14443(BOOL weTx, int n)
|
||
|
{
|
||
|
BYTE *dest = (BYTE *)BigBuf;
|
||
|
int c;
|
||
|
|
||
|
FpgaWriteConfWord(
|
||
|
FPGA_MAJOR_MODE_HF_READER_RX_XCORR | FPGA_HF_READER_RX_XCORR_848_KHZ |
|
||
|
(weTx ? 0 : FPGA_HF_READER_RX_XCORR_SNOOP));
|
||
|
|
||
|
c = 0;
|
||
|
for(;;) {
|
||
|
if(SSC_STATUS & (SSC_STATUS_TX_READY)) {
|
||
|
SSC_TRANSMIT_HOLDING = 0x43;
|
||
|
}
|
||
|
if(SSC_STATUS & (SSC_STATUS_RX_READY)) {
|
||
|
SBYTE b;
|
||
|
b = (SBYTE)SSC_RECEIVE_HOLDING;
|
||
|
|
||
|
dest[c++] = (BYTE)b;
|
||
|
|
||
|
if(c >= n) {
|
||
|
break;
|
||
|
}
|
||
|
}
|
||
|
}
|
||
|
}*/
|
||
|
|
||
|
//-----------------------------------------------------------------------------
|
||
|
// Transmit the command (to the tag) that was placed in ToSend[].
|
||
|
//-----------------------------------------------------------------------------
|
||
|
static void TransmitFor14443(void)
|
||
|
{
|
||
|
int c;
|
||
|
|
||
|
FpgaSetupSsc();
|
||
|
|
||
|
while(SSC_STATUS & (SSC_STATUS_TX_READY)) {
|
||
|
SSC_TRANSMIT_HOLDING = 0xff;
|
||
|
}
|
||
|
|
||
|
FpgaWriteConfWord(
|
||
|
FPGA_MAJOR_MODE_HF_READER_TX | FPGA_HF_READER_TX_SHALLOW_MOD);
|
||
|
|
||
|
for(c = 0; c < 10;) {
|
||
|
if(SSC_STATUS & (SSC_STATUS_TX_READY)) {
|
||
|
SSC_TRANSMIT_HOLDING = 0xff;
|
||
|
c++;
|
||
|
}
|
||
|
if(SSC_STATUS & (SSC_STATUS_RX_READY)) {
|
||
|
volatile DWORD r = SSC_RECEIVE_HOLDING;
|
||
|
(void)r;
|
||
|
}
|
||
|
WDT_HIT();
|
||
|
}
|
||
|
|
||
|
c = 0;
|
||
|
for(;;) {
|
||
|
if(SSC_STATUS & (SSC_STATUS_TX_READY)) {
|
||
|
SSC_TRANSMIT_HOLDING = ToSend[c];
|
||
|
c++;
|
||
|
if(c >= ToSendMax) {
|
||
|
break;
|
||
|
}
|
||
|
}
|
||
|
if(SSC_STATUS & (SSC_STATUS_RX_READY)) {
|
||
|
volatile DWORD r = SSC_RECEIVE_HOLDING;
|
||
|
(void)r;
|
||
|
}
|
||
|
WDT_HIT();
|
||
|
}
|
||
|
}
|
||
|
|
||
|
//-----------------------------------------------------------------------------
|
||
|
// Code a layer 2 command (string of octets, including CRC) into ToSend[],
|
||
|
// so that it is ready to transmit to the tag using TransmitFor14443().
|
||
|
//-----------------------------------------------------------------------------
|
||
|
void CodeIso14443bAsReader(const BYTE *cmd, int len)
|
||
|
{
|
||
|
int i, j;
|
||
|
BYTE b;
|
||
|
|
||
|
ToSendReset();
|
||
|
|
||
|
// Establish initial reference level
|
||
|
for(i = 0; i < 40; i++) {
|
||
|
ToSendStuffBit(1);
|
||
|
}
|
||
|
// Send SOF
|
||
|
for(i = 0; i < 10; i++) {
|
||
|
ToSendStuffBit(0);
|
||
|
}
|
||
|
|
||
|
for(i = 0; i < len; i++) {
|
||
|
// Stop bits/EGT
|
||
|
ToSendStuffBit(1);
|
||
|
ToSendStuffBit(1);
|
||
|
// Start bit
|
||
|
ToSendStuffBit(0);
|
||
|
// Data bits
|
||
|
b = cmd[i];
|
||
|
for(j = 0; j < 8; j++) {
|
||
|
if(b & 1) {
|
||
|
ToSendStuffBit(1);
|
||
|
} else {
|
||
|
ToSendStuffBit(0);
|
||
|
}
|
||
|
b >>= 1;
|
||
|
}
|
||
|
}
|
||
|
// Send EOF
|
||
|
ToSendStuffBit(1);
|
||
|
for(i = 0; i < 10; i++) {
|
||
|
ToSendStuffBit(0);
|
||
|
}
|
||
|
for(i = 0; i < 8; i++) {
|
||
|
ToSendStuffBit(1);
|
||
|
}
|
||
|
|
||
|
// And then a little more, to make sure that the last character makes
|
||
|
// it out before we switch to rx mode.
|
||
|
for(i = 0; i < 24; i++) {
|
||
|
ToSendStuffBit(1);
|
||
|
}
|
||
|
|
||
|
// Convert from last character reference to length
|
||
|
ToSendMax++;
|
||
|
}
|
||
|
|
||
|
//-----------------------------------------------------------------------------
|
||
|
// Read an ISO 14443 tag. We send it some set of commands, and record the
|
||
|
// responses.
|
||
|
//-----------------------------------------------------------------------------
|
||
|
void AcquireRawAdcSamplesIso14443(DWORD parameter)
|
||
|
{
|
||
|
// BYTE cmd1[] = { 0x05, 0x00, 0x00, 0x71, 0xff };
|
||
|
BYTE cmd1[] = { 0x05, 0x00, 0x08, 0x39, 0x73 };
|
||
|
|
||
|
// Make sure that we start from off, since the tags are stateful;
|
||
|
// confusing things will happen if we don't reset them between reads.
|
||
|
LED_D_OFF();
|
||
|
FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF);
|
||
|
SpinDelay(200);
|
||
|
|
||
|
SetAdcMuxFor(GPIO_MUXSEL_HIPKD);
|
||
|
FpgaSetupSsc();
|
||
|
|
||
|
// Now give it time to spin up.
|
||
|
FpgaWriteConfWord(
|
||
|
FPGA_MAJOR_MODE_HF_READER_RX_XCORR | FPGA_HF_READER_RX_XCORR_848_KHZ);
|
||
|
SpinDelay(200);
|
||
|
|
||
|
CodeIso14443bAsReader(cmd1, sizeof(cmd1));
|
||
|
TransmitFor14443();
|
||
|
LED_A_ON();
|
||
|
GetSamplesFor14443Demod(TRUE, 2000);
|
||
|
LED_A_OFF();
|
||
|
}
|
||
|
|
||
|
//=============================================================================
|
||
|
// Finally, the `sniffer' combines elements from both the reader and
|
||
|
// simulated tag, to show both sides of the conversation.
|
||
|
//=============================================================================
|
||
|
|
||
|
//-----------------------------------------------------------------------------
|
||
|
// Record the sequence of commands sent by the reader to the tag, with
|
||
|
// triggering so that we start recording at the point that the tag is moved
|
||
|
// near the reader.
|
||
|
//-----------------------------------------------------------------------------
|
||
|
void SnoopIso14443(void)
|
||
|
{
|
||
|
// We won't start recording the frames that we acquire until we trigger;
|
||
|
// a good trigger condition to get started is probably when we see a
|
||
|
// response from the tag.
|
||
|
BOOL triggered = FALSE;
|
||
|
|
||
|
// The command (reader -> tag) that we're working on receiving.
|
||
|
BYTE *receivedCmd = (((BYTE *)BigBuf) + 1024);
|
||
|
// The response (tag -> reader) that we're working on receiving.
|
||
|
BYTE *receivedResponse = (((BYTE *)BigBuf) + 1536);
|
||
|
|
||
|
// As we receive stuff, we copy it from receivedCmd or receivedResponse
|
||
|
// into trace, along with its length and other annotations.
|
||
|
BYTE *trace = (BYTE *)BigBuf;
|
||
|
int traceLen = 0;
|
||
|
|
||
|
// The DMA buffer, used to stream samples from the FPGA.
|
||
|
//# define DMA_BUFFER_SIZE 256
|
||
|
SBYTE *dmaBuf = ((SBYTE *)BigBuf) + 2048;
|
||
|
int lastRxCounter;
|
||
|
SBYTE *upTo;
|
||
|
int ci, cq;
|
||
|
int maxBehindBy = 0;
|
||
|
|
||
|
// Count of samples received so far, so that we can include timing
|
||
|
// information in the trace buffer.
|
||
|
int samples = 0;
|
||
|
|
||
|
memset(trace, 0x44, 1000);
|
||
|
|
||
|
// Set up the demodulator for tag -> reader responses.
|
||
|
Demod.output = receivedResponse;
|
||
|
Demod.len = 0;
|
||
|
Demod.state = DEMOD_UNSYNCD;
|
||
|
|
||
|
// And the reader -> tag commands
|
||
|
memset(&Uart, 0, sizeof(Uart));
|
||
|
Uart.output = receivedCmd;
|
||
|
Uart.byteCntMax = 100;
|
||
|
Uart.state = STATE_UNSYNCD;
|
||
|
|
||
|
// And put the FPGA in the appropriate mode
|
||
|
FpgaWriteConfWord(
|
||
|
FPGA_MAJOR_MODE_HF_READER_RX_XCORR | FPGA_HF_READER_RX_XCORR_848_KHZ |
|
||
|
FPGA_HF_READER_RX_XCORR_SNOOP);
|
||
|
SetAdcMuxFor(GPIO_MUXSEL_HIPKD);
|
||
|
|
||
|
// Setup for the DMA.
|
||
|
FpgaSetupSsc();
|
||
|
upTo = dmaBuf;
|
||
|
lastRxCounter = DMA_BUFFER_SIZE;
|
||
|
FpgaSetupSscDma((BYTE *)dmaBuf, DMA_BUFFER_SIZE);
|
||
|
|
||
|
LED_A_ON();
|
||
|
|
||
|
// And now we loop, receiving samples.
|
||
|
for(;;) {
|
||
|
int behindBy = (lastRxCounter - PDC_RX_COUNTER(SSC_BASE)) &
|
||
|
(DMA_BUFFER_SIZE-1);
|
||
|
if(behindBy > maxBehindBy) {
|
||
|
maxBehindBy = behindBy;
|
||
|
if(behindBy > 100) {
|
||
|
DbpString("blew circular buffer!");
|
||
|
goto done;
|
||
|
}
|
||
|
}
|
||
|
if(behindBy < 2) continue;
|
||
|
|
||
|
ci = upTo[0];
|
||
|
cq = upTo[1];
|
||
|
upTo += 2;
|
||
|
lastRxCounter -= 2;
|
||
|
if(upTo - dmaBuf > DMA_BUFFER_SIZE) {
|
||
|
upTo -= DMA_BUFFER_SIZE;
|
||
|
lastRxCounter += DMA_BUFFER_SIZE;
|
||
|
PDC_RX_NEXT_POINTER(SSC_BASE) = (DWORD)upTo;
|
||
|
PDC_RX_NEXT_COUNTER(SSC_BASE) = DMA_BUFFER_SIZE;
|
||
|
}
|
||
|
|
||
|
samples += 2;
|
||
|
|
||
|
#define HANDLE_BIT_IF_BODY \
|
||
|
if(triggered) { \
|
||
|
trace[traceLen++] = ((samples >> 0) & 0xff); \
|
||
|
trace[traceLen++] = ((samples >> 8) & 0xff); \
|
||
|
trace[traceLen++] = ((samples >> 16) & 0xff); \
|
||
|
trace[traceLen++] = ((samples >> 24) & 0xff); \
|
||
|
trace[traceLen++] = 0; \
|
||
|
trace[traceLen++] = 0; \
|
||
|
trace[traceLen++] = 0; \
|
||
|
trace[traceLen++] = 0; \
|
||
|
trace[traceLen++] = Uart.byteCnt; \
|
||
|
memcpy(trace+traceLen, receivedCmd, Uart.byteCnt); \
|
||
|
traceLen += Uart.byteCnt; \
|
||
|
if(traceLen > 1000) break; \
|
||
|
} \
|
||
|
/* And ready to receive another command. */ \
|
||
|
memset(&Uart, 0, sizeof(Uart)); \
|
||
|
Uart.output = receivedCmd; \
|
||
|
Uart.byteCntMax = 100; \
|
||
|
Uart.state = STATE_UNSYNCD; \
|
||
|
/* And also reset the demod code, which might have been */ \
|
||
|
/* false-triggered by the commands from the reader. */ \
|
||
|
memset(&Demod, 0, sizeof(Demod)); \
|
||
|
Demod.output = receivedResponse; \
|
||
|
Demod.state = DEMOD_UNSYNCD; \
|
||
|
|
||
|
if(Handle14443UartBit(ci & 1)) {
|
||
|
HANDLE_BIT_IF_BODY
|
||
|
}
|
||
|
if(Handle14443UartBit(cq & 1)) {
|
||
|
HANDLE_BIT_IF_BODY
|
||
|
}
|
||
|
|
||
|
if(Handle14443SamplesDemod(ci, cq)) {
|
||
|
// timestamp, as a count of samples
|
||
|
trace[traceLen++] = ((samples >> 0) & 0xff);
|
||
|
trace[traceLen++] = ((samples >> 8) & 0xff);
|
||
|
trace[traceLen++] = ((samples >> 16) & 0xff);
|
||
|
trace[traceLen++] = 0x80 | ((samples >> 24) & 0xff);
|
||
|
// correlation metric (~signal strength estimate)
|
||
|
if(Demod.metricN != 0) {
|
||
|
Demod.metric /= Demod.metricN;
|
||
|
}
|
||
|
trace[traceLen++] = ((Demod.metric >> 0) & 0xff);
|
||
|
trace[traceLen++] = ((Demod.metric >> 8) & 0xff);
|
||
|
trace[traceLen++] = ((Demod.metric >> 16) & 0xff);
|
||
|
trace[traceLen++] = ((Demod.metric >> 24) & 0xff);
|
||
|
// length
|
||
|
trace[traceLen++] = Demod.len;
|
||
|
memcpy(trace+traceLen, receivedResponse, Demod.len);
|
||
|
traceLen += Demod.len;
|
||
|
if(traceLen > 1000) break;
|
||
|
|
||
|
triggered = TRUE;
|
||
|
LED_A_OFF();
|
||
|
LED_B_ON();
|
||
|
|
||
|
// And ready to receive another response.
|
||
|
memset(&Demod, 0, sizeof(Demod));
|
||
|
Demod.output = receivedResponse;
|
||
|
Demod.state = DEMOD_UNSYNCD;
|
||
|
}
|
||
|
|
||
|
if(BUTTON_PRESS()) {
|
||
|
DbpString("cancelled");
|
||
|
goto done;
|
||
|
}
|
||
|
}
|
||
|
|
||
|
DbpString("in done pt");
|
||
|
|
||
|
DbpIntegers(maxBehindBy, Uart.state, Uart.byteCnt);
|
||
|
DbpIntegers(Uart.byteCntMax, traceLen, 0x23);
|
||
|
|
||
|
done:
|
||
|
PDC_CONTROL(SSC_BASE) = PDC_RX_DISABLE;
|
||
|
LED_A_OFF();
|
||
|
LED_B_OFF();
|
||
|
}
|