mirror of
https://github.com/RfidResearchGroup/proxmark3.git
synced 2024-09-20 23:36:31 +08:00
173 lines
4.3 KiB
C
173 lines
4.3 KiB
C
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/*
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* LEGIC RF simulation code
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*
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* (c) 2009 Henryk Plötz <henryk@ploetzli.ch>
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*/
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#include <proxmark3.h>
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#include "apps.h"
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#include "legicrf.h"
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static struct legic_frame {
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int num_bytes;
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int num_bits;
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char data[10];
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} current_frame;
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static char response = 0x2b; /* 1101 01 */
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static void frame_send(char *response, int num_bytes, int num_bits)
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{
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#if 0
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/* Use the SSC to send a response. 8-bit transfers, LSBit first, 100us per bit */
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#else
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/* Bitbang the response */
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AT91C_BASE_PIOA->PIO_CODR = GPIO_SSC_DOUT;
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AT91C_BASE_PIOA->PIO_OER = GPIO_SSC_DOUT;
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AT91C_BASE_PIOA->PIO_PER = GPIO_SSC_DOUT;
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/* Wait for the frame start */
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while(AT91C_BASE_TC1->TC_CV < 490) ;
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int i;
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for(i=0; i<(num_bytes*8+num_bits); i++) {
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int nextbit = AT91C_BASE_TC1->TC_CV + 150;
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int bit = response[i/8] & (1<<(i%8));
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if(bit)
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AT91C_BASE_PIOA->PIO_SODR = GPIO_SSC_DOUT;
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else
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AT91C_BASE_PIOA->PIO_CODR = GPIO_SSC_DOUT;
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while(AT91C_BASE_TC1->TC_CV < nextbit) ;
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}
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AT91C_BASE_PIOA->PIO_CODR = GPIO_SSC_DOUT;
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#endif
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}
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static void frame_respond(struct legic_frame *f)
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{
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LED_D_ON();
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if(f->num_bytes == 0 && f->num_bits == 7) {
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/* This seems to be the initial dialogue, just send 6 bits of static data */
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frame_send(&response, 0, 6);
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}
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LED_D_OFF();
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}
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static void frame_append_bit(struct legic_frame *f, int bit)
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{
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if(f->num_bytes >= (int)sizeof(f->data))
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return; /* Overflow, won't happen */
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f->data[f->num_bytes] |= (bit<<f->num_bits);
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f->num_bits++;
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if(f->num_bits > 7) {
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f->num_bits = 0;
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f->num_bytes++;
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}
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}
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static int frame_is_empty(struct legic_frame *f)
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{
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return( (f->num_bytes + f->num_bits) <= 4 );
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}
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static void frame_handle(struct legic_frame *f)
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{
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if( !frame_is_empty(f) ) {
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frame_respond(f);
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}
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}
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static void frame_clean(struct legic_frame *f)
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{
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if(!frame_is_empty(f))
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memset(f->data, 0, sizeof(f->data));
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f->num_bits = 0;
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f->num_bytes = 0;
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}
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static void emit(int bit)
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{
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if(bit == -1) {
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frame_handle(¤t_frame);
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frame_clean(¤t_frame);
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} else if(bit == 0) {
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frame_append_bit(¤t_frame, 0);
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} else if(bit == 1) {
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frame_append_bit(¤t_frame, 1);
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}
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}
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void LegicRfSimulate(void)
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{
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/* ADC path high-frequency peak detector, FPGA in high-frequency simulator mode,
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* modulation mode set to 212kHz subcarrier. We are getting the incoming raw
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* envelope waveform on DIN and should send our response on DOUT.
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*
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* The LEGIC RF protocol is pulse-pause-encoding from reader to card, so we'll
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* measure the time between two rising edges on DIN, and no encoding on the
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* subcarrier from card to reader, so we'll just shift out our verbatim data
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* on DOUT, 1 bit is 100us. The time from reader to card frame is still unclear,
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* seems to be 300us-ish.
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*/
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SetAdcMuxFor(GPIO_MUXSEL_HIPKD);
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FpgaSetupSsc();
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FpgaWriteConfWord(FPGA_MAJOR_MODE_HF_SIMULATOR | FPGA_HF_SIMULATOR_MODULATE_212K);
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/* Bitbang the receiver */
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AT91C_BASE_PIOA->PIO_ODR = GPIO_SSC_DIN;
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AT91C_BASE_PIOA->PIO_PER = GPIO_SSC_DIN;
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/* Set up Timer 1 to use for measuring time between pulses. Since we're bit-banging
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* this it won't be terribly accurate but should be good enough.
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*/
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AT91C_BASE_PMC->PMC_PCER = (1 << AT91C_ID_TC1);
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AT91C_BASE_TC1->TC_CCR = AT91C_TC_CLKDIS;
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AT91C_BASE_TC1->TC_CMR = TC_CMR_TCCLKS_TIMER_CLOCK3;
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AT91C_BASE_TC1->TC_CCR = AT91C_TC_CLKEN | AT91C_TC_SWTRG;
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int old_level = 0;
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/* At TIMER_CLOCK3 (MCK/32) */
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#define BIT_TIME_1 150
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#define BIT_TIME_0 90
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#define BIT_TIME_FUZZ 20
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int active = 0;
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while(!BUTTON_PRESS()) {
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int level = !!(AT91C_BASE_PIOA->PIO_PDSR & GPIO_SSC_DIN);
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int time = AT91C_BASE_TC1->TC_CV;
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if(level != old_level) {
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if(level == 1) {
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AT91C_BASE_TC1->TC_CCR = AT91C_TC_CLKEN | AT91C_TC_SWTRG;
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if(time > (BIT_TIME_1-BIT_TIME_FUZZ) && time < (BIT_TIME_1+BIT_TIME_FUZZ)) {
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/* 1 bit */
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emit(1);
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active = 1;
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} else if(time > (BIT_TIME_0-BIT_TIME_FUZZ) && time < (BIT_TIME_0+BIT_TIME_FUZZ)) {
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/* 0 bit */
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emit(0);
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active = 0;
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} else {
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/* invalid */
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emit(-1);
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active = 0;
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}
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}
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}
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if(time >= (BIT_TIME_1+2*BIT_TIME_FUZZ) && active) {
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/* Frame end */
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emit(-1);
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active = 0;
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}
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if(time >= (20*BIT_TIME_1) && (AT91C_BASE_TC1->TC_SR & AT91C_TC_CLKSTA)) {
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AT91C_BASE_TC1->TC_CCR = AT91C_TC_CLKDIS;
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}
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old_level = level;
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WDT_HIT();
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}
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}
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