proxmark3/armsrc/appmain.c

1671 lines
57 KiB
C
Raw Normal View History

//-----------------------------------------------------------------------------
// Jonathan Westhues, Mar 2006
// Edits by Gerhard de Koning Gans, Sep 2007 (##)
//
// This code is licensed to you under the terms of the GNU GPL, version 2 or,
// at your option, any later version. See the LICENSE.txt file for the text of
// the license.
//-----------------------------------------------------------------------------
// The main application code. This is the first thing called after start.c
// executes.
//-----------------------------------------------------------------------------
#include <stdarg.h>
#include <inttypes.h>
#include "usb_cdc.h"
#include "proxmark3.h"
#include "apps.h"
#include "fpga.h"
#include "util.h"
2010-02-21 08:10:28 +08:00
#include "printf.h"
#include "string.h"
#include "legicrf.h"
#include "legicrfsim.h"
#include "lfsampling.h"
#include "BigBuf.h"
#include "mifareutil.h"
2019-04-07 17:41:43 +08:00
#include "mifaresim.h"
#include "hitag.h"
2018-05-22 18:09:17 +08:00
#define DEBUG 1
#ifdef WITH_LCD
2019-03-10 07:00:59 +08:00
#include "LCD.h"
#endif
#ifdef WITH_SMARTCARD
#include "i2c.h"
#endif
#ifdef WITH_FPC_USART
#include "usart.h"
#endif
#ifdef WITH_FLASH
#include "flashmem.h"
#endif
//=============================================================================
// A buffer where we can queue things up to be sent through the FPGA, for
// any purpose (fake tag, as reader, whatever). We go MSB first, since that
// is the order in which they go out on the wire.
//=============================================================================
#define TOSEND_BUFFER_SIZE (9*MAX_FRAME_SIZE + 1 + 1 + 2) // 8 data bits and 1 parity bit per payload byte, 1 correction bit, 1 SOC bit, 2 EOC bits
uint8_t ToSend[TOSEND_BUFFER_SIZE];
int ToSendMax = -1;
static int ToSendBit;
struct common_area common_area __attribute__((section(".commonarea")));
int button_status = BUTTON_NO_CLICK;
void ToSendReset(void) {
2019-03-10 03:34:41 +08:00
ToSendMax = -1;
ToSendBit = 8;
}
void ToSendStuffBit(int b) {
2019-03-10 07:00:59 +08:00
if (ToSendBit >= 8) {
2019-03-10 03:34:41 +08:00
ToSendMax++;
ToSend[ToSendMax] = 0;
ToSendBit = 0;
}
2019-03-10 07:00:59 +08:00
if (b)
2019-03-10 03:34:41 +08:00
ToSend[ToSendMax] |= (1 << (7 - ToSendBit));
2019-03-10 03:34:41 +08:00
ToSendBit++;
2019-03-10 07:00:59 +08:00
if (ToSendMax >= sizeof(ToSend)) {
2019-03-10 03:34:41 +08:00
ToSendBit = 0;
DbpString("ToSendStuffBit overflowed!");
}
}
2019-04-07 17:36:24 +08:00
/* useful when debugging new protocol implementations like FeliCa
void PrintToSendBuffer(void) {
2019-03-10 03:34:41 +08:00
DbpString("Printing ToSendBuffer:");
Dbhexdump(ToSendMax, ToSend, 0);
}
2019-04-07 17:36:24 +08:00
*/
void print_result(char *name, uint8_t *buf, size_t len) {
2019-03-10 03:34:41 +08:00
uint8_t *p = buf;
uint16_t tmp = len & 0xFFF0;
2019-03-10 07:00:59 +08:00
for (; p - buf < tmp; p += 16) {
2019-03-10 03:34:41 +08:00
Dbprintf("[%s: %02d/%02d] %02x %02x %02x %02x %02x %02x %02x %02x %02x %02x %02x %02x %02x %02x %02x %02x",
2019-03-10 07:00:59 +08:00
name,
p - buf,
len,
p[0], p[1], p[2], p[3], p[4], p[5], p[6], p[7], p[8], p[9], p[10], p[11], p[12], p[13], p[14], p[15]
);
2019-03-10 03:34:41 +08:00
}
if (len % 16 != 0) {
char s[46] = {0};
char *sp = s;
2019-03-10 07:00:59 +08:00
for (; p - buf < len; p++) {
sprintf(sp, "%02x ", p[0]);
2019-03-10 03:34:41 +08:00
sp += 3;
}
2019-03-10 07:00:59 +08:00
Dbprintf("[%s: %02d/%02d] %s", name, p - buf, len, s);
2019-03-10 03:34:41 +08:00
}
}
//=============================================================================
// Debug print functions, to go out over USB, to the usual PC-side client.
//=============================================================================
2019-04-26 16:36:06 +08:00
void DbpStringEx(uint32_t flags, char *str) {
2018-05-22 18:09:17 +08:00
#if DEBUG
2019-04-22 07:33:32 +08:00
struct {
uint16_t flag;
uint8_t buf[PM3_CMD_DATA_SIZE - sizeof(uint16_t)];
2019-04-22 07:33:32 +08:00
} PACKED data;
data.flag = flags;
2019-04-22 07:33:32 +08:00
uint16_t len = MIN(strlen(str), sizeof(data.buf));
memcpy(data.buf, str, len);
2019-04-25 23:06:40 +08:00
reply_ng(CMD_DEBUG_PRINT_STRING, PM3_SUCCESS, (uint8_t *)&data, sizeof(data.flag) + len);
#endif
}
void DbpString(char *str) {
2018-05-22 18:09:17 +08:00
#if DEBUG
2019-04-26 16:36:06 +08:00
DbpStringEx(FLAG_LOG, str);
#endif
}
#if 0
void DbpIntegers(int x1, int x2, int x3) {
2019-04-18 18:43:35 +08:00
reply_old(CMD_DEBUG_PRINT_INTEGERS, x1, x2, x3, 0, 0);
}
#endif
2019-04-26 16:36:06 +08:00
void DbprintfEx(uint32_t flags, const char *fmt, ...) {
2018-05-22 18:09:17 +08:00
#if DEBUG
2019-03-10 03:34:41 +08:00
// should probably limit size here; oh well, let's just use a big buffer
char output_string[128] = {0x00};
va_list ap;
va_start(ap, fmt);
kvsprintf(fmt, output_string, 10, ap);
va_end(ap);
2019-04-26 16:36:06 +08:00
DbpStringEx(flags, output_string);
#endif
}
void Dbprintf(const char *fmt, ...) {
2018-05-22 18:09:17 +08:00
#if DEBUG
2019-03-10 03:34:41 +08:00
// should probably limit size here; oh well, let's just use a big buffer
char output_string[128] = {0x00};
va_list ap;
2019-03-10 03:34:41 +08:00
va_start(ap, fmt);
kvsprintf(fmt, output_string, 10, ap);
va_end(ap);
2019-03-10 03:34:41 +08:00
DbpString(output_string);
#endif
}
// prints HEX & ASCII
void Dbhexdump(int len, uint8_t *d, bool bAsci) {
2018-05-22 18:09:17 +08:00
#if DEBUG
2019-03-10 03:34:41 +08:00
char ascii[9];
2019-03-10 03:34:41 +08:00
while (len > 0) {
2016-01-26 03:17:08 +08:00
2019-04-07 17:36:24 +08:00
int l = (len > 8) ? 8 : len;
2019-03-10 03:34:41 +08:00
memcpy(ascii, d, l);
ascii[l] = 0;
2019-03-10 03:34:41 +08:00
// filter safe ascii
2019-04-07 17:36:24 +08:00
for (int i = 0; i < l; i++) {
if (ascii[i] < 32 || ascii[i] > 126) {
ascii[i] = '.';
2019-03-10 03:34:41 +08:00
}
}
2019-03-10 03:34:41 +08:00
if (bAsci)
Dbprintf("%-8s %*D", ascii, l, d, " ");
else
Dbprintf("%*D", l, d, " ");
2019-03-10 03:34:41 +08:00
len -= 8;
d += 8;
}
#endif
}
//-----------------------------------------------------------------------------
// Read an ADC channel and block till it completes, then return the result
// in ADC units (0 to 1023). Also a routine to average 32 samples and
// return that.
//-----------------------------------------------------------------------------
static uint16_t ReadAdc(int ch) {
2019-03-10 03:34:41 +08:00
// Note: ADC_MODE_PRESCALE and ADC_MODE_SAMPLE_HOLD_TIME are set to the maximum allowed value.
// AMPL_HI is are high impedance (10MOhm || 1MOhm) output, the input capacitance of the ADC is 12pF (typical). This results in a time constant
// of RC = (0.91MOhm) * 12pF = 10.9us. Even after the maximum configurable sample&hold time of 40us the input capacitor will not be fully charged.
//
// The maths are:
// If there is a voltage v_in at the input, the voltage v_cap at the capacitor (this is what we are measuring) will be
//
// v_cap = v_in * (1 - exp(-SHTIM/RC)) = v_in * (1 - exp(-40us/10.9us)) = v_in * 0,97 (i.e. an error of 3%)
2019-03-10 03:34:41 +08:00
AT91C_BASE_ADC->ADC_CR = AT91C_ADC_SWRST;
AT91C_BASE_ADC->ADC_MR =
2019-03-10 07:00:59 +08:00
ADC_MODE_PRESCALE(63) // ADC_CLK = MCK / ((63+1) * 2) = 48MHz / 128 = 375kHz
| ADC_MODE_STARTUP_TIME(1) // Startup Time = (1+1) * 8 / ADC_CLK = 16 / 375kHz = 42,7us Note: must be > 20us
| ADC_MODE_SAMPLE_HOLD_TIME(15); // Sample & Hold Time SHTIM = 15 / ADC_CLK = 15 / 375kHz = 40us
2019-03-10 03:34:41 +08:00
AT91C_BASE_ADC->ADC_CHER = ADC_CHANNEL(ch);
AT91C_BASE_ADC->ADC_CR = AT91C_ADC_START;
2019-03-10 03:34:41 +08:00
while (!(AT91C_BASE_ADC->ADC_SR & ADC_END_OF_CONVERSION(ch))) {};
2019-03-10 03:34:41 +08:00
return (AT91C_BASE_ADC->ADC_CDR[ch] & 0x3FF);
}
// was static - merlok
uint16_t AvgAdc(int ch) {
2019-03-10 03:34:41 +08:00
uint16_t a = 0;
2019-03-10 07:00:59 +08:00
for (uint8_t i = 0; i < 32; i++)
2019-03-10 03:34:41 +08:00
a += ReadAdc(ch);
2019-03-10 03:34:41 +08:00
//division by 32
return (a + 15) >> 5;
}
void MeasureAntennaTuning(void) {
2019-03-10 03:34:41 +08:00
uint8_t LF_Results[256];
2019-04-07 17:36:24 +08:00
uint32_t i, peak = 0, peakv = 0, peakf = 0;
2019-03-10 03:34:41 +08:00
uint32_t v_lf125 = 0, v_lf134 = 0, v_hf = 0; // in mV
2019-03-10 03:34:41 +08:00
memset(LF_Results, 0, sizeof(LF_Results));
LED_B_ON();
2019-03-10 07:00:59 +08:00
/*
* Sweeps the useful LF range of the proxmark from
* 46.8kHz (divisor=255) to 600kHz (divisor=19) and
* read the voltage in the antenna, the result left
* in the buffer is a graph which should clearly show
* the resonating frequency of your LF antenna
* ( hopefully around 95 if it is tuned to 125kHz!)
*/
2019-03-10 03:34:41 +08:00
FpgaDownloadAndGo(FPGA_BITSTREAM_LF);
FpgaWriteConfWord(FPGA_MAJOR_MODE_LF_ADC | FPGA_LF_ADC_READER_FIELD);
SpinDelay(50);
2019-03-10 07:00:59 +08:00
for (i = 255; i >= 19; i--) {
2019-03-10 03:34:41 +08:00
WDT_HIT();
FpgaSendCommand(FPGA_CMD_SET_DIVISOR, i);
SpinDelay(20);
2019-04-07 17:36:24 +08:00
uint32_t adcval = ((MAX_ADC_LF_VOLTAGE * AvgAdc(ADC_CHAN_LF)) >> 10);
if (i == 95)
v_lf125 = adcval; // voltage at 125Khz
if (i == 89)
v_lf134 = adcval; // voltage at 134Khz
2019-03-10 03:34:41 +08:00
LF_Results[i] = adcval >> 9; // scale int to fit in byte for graphing purposes
2019-03-10 07:00:59 +08:00
if (LF_Results[i] > peak) {
2019-03-10 03:34:41 +08:00
peakv = adcval;
peakf = i;
peak = LF_Results[i];
}
}
LED_A_ON();
// Let the FPGA drive the high-frequency antenna around 13.56 MHz.
FpgaDownloadAndGo(FPGA_BITSTREAM_HF);
FpgaWriteConfWord(FPGA_MAJOR_MODE_HF_READER_RX_XCORR);
SpinDelay(50);
v_hf = (MAX_ADC_HF_VOLTAGE * AvgAdc(ADC_CHAN_HF)) >> 10;
// RDV40 will hit the roof, try other ADC channel used in that hardware revision.
2019-03-10 07:00:59 +08:00
if (v_hf > MAX_ADC_HF_VOLTAGE - 300) {
2019-03-10 03:34:41 +08:00
v_hf = (MAX_ADC_HF_VOLTAGE_RDV40 * AvgAdc(ADC_CHAN_HF_RDV40)) >> 10;
}
uint64_t arg0 = v_lf134;
arg0 <<= 32;
arg0 |= v_lf125;
uint64_t arg2 = peakv;
arg2 <<= 32;
arg2 |= peakf;
2019-04-18 18:43:35 +08:00
reply_old(CMD_MEASURED_ANTENNA_TUNING, arg0, v_hf, arg2, LF_Results, 256);
2019-03-10 03:34:41 +08:00
FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF);
LEDsoff();
}
uint16_t MeasureAntennaTuningHfData(void) {
2019-03-10 03:34:41 +08:00
uint16_t volt = 0; // in mV
volt = (MAX_ADC_HF_VOLTAGE * AvgAdc(ADC_CHAN_HF)) >> 10;
2019-03-10 07:00:59 +08:00
bool use_high = (volt > MAX_ADC_HF_VOLTAGE - 300);
2019-03-10 03:34:41 +08:00
if (!use_high) {
volt = (MAX_ADC_HF_VOLTAGE * AvgAdc(ADC_CHAN_HF)) >> 10;
} else {
volt = (MAX_ADC_HF_VOLTAGE_RDV40 * AvgAdc(ADC_CHAN_HF_RDV40)) >> 10;
2019-03-10 03:34:41 +08:00
}
return volt;
}
void ReadMem(int addr) {
2019-03-10 03:34:41 +08:00
const uint8_t *data = ((uint8_t *)addr);
Dbprintf("%x: %02x %02x %02x %02x %02x %02x %02x %02x", addr, data[0], data[1], data[2], data[3], data[4], data[5], data[6], data[7]);
}
/* osimage version information is linked in */
extern struct version_information version_information;
/* bootrom version information is pointed to from _bootphase1_version_pointer */
2015-06-25 18:22:34 +08:00
extern char *_bootphase1_version_pointer, _flash_start, _flash_end, _bootrom_start, _bootrom_end, __data_src_start__;
void SendVersion(void) {
char temp[PM3_CMD_DATA_SIZE]; /* Limited data payload in USB packets */
char VersionString[PM3_CMD_DATA_SIZE] = { '\0' };
2019-03-10 03:34:41 +08:00
/* Try to find the bootrom version information. Expect to find a pointer at
* symbol _bootphase1_version_pointer, perform slight sanity checks on the
* pointer, then use it.
*/
2019-03-10 07:00:59 +08:00
char *bootrom_version = *(char **)&_bootphase1_version_pointer;
2019-03-10 03:34:41 +08:00
strncat(VersionString, " [ ARM ]\n", sizeof(VersionString) - strlen(VersionString) - 1);
2019-03-10 07:00:59 +08:00
if (bootrom_version < &_flash_start || bootrom_version >= &_flash_end) {
2019-03-10 03:34:41 +08:00
strcat(VersionString, "bootrom version information appears invalid\n");
} else {
FormatVersionInformation(temp, sizeof(temp), " bootrom: ", bootrom_version);
strncat(VersionString, temp, sizeof(VersionString) - strlen(VersionString) - 1);
}
FormatVersionInformation(temp, sizeof(temp), " os: ", &version_information);
strncat(VersionString, temp, sizeof(VersionString) - strlen(VersionString) - 1);
strncat(VersionString, "\n [ FPGA ]\n", sizeof(VersionString) - strlen(VersionString) - 1);
for (int i = 0; i < fpga_bitstream_num; i++) {
strncat(VersionString, fpga_version_information[i], sizeof(VersionString) - strlen(VersionString) - 1);
if (i < fpga_bitstream_num - 1) {
strncat(VersionString, "\n", sizeof(VersionString) - strlen(VersionString) - 1);
}
}
// Send Chip ID and used flash memory
uint32_t text_and_rodata_section_size = (uint32_t)&__data_src_start__ - (uint32_t)&_flash_start;
uint32_t compressed_data_section_size = common_area.arg1;
2019-04-18 18:43:35 +08:00
reply_old(CMD_ACK, *(AT91C_DBGU_CIDR), text_and_rodata_section_size + compressed_data_section_size, 0, VersionString, strlen(VersionString));
}
// measure the Connection Speed by sending SpeedTestBufferSize bytes to client and measuring the elapsed time.
2019-04-21 23:34:56 +08:00
// Note: this mimics GetFromBigbuf(), i.e. we have the overhead of the PacketCommandNG structure included.
void printConnSpeed(void) {
2019-04-30 19:02:27 +08:00
DbpString(_BLUE_("Transfer Speed"));
2019-04-26 19:07:45 +08:00
Dbprintf(" Sending packets to client...");
2019-03-10 03:34:41 +08:00
#define CONN_SPEED_TEST_MIN_TIME 500 // in milliseconds
2019-03-10 03:34:41 +08:00
uint8_t *test_data = BigBuf_get_addr();
uint32_t end_time;
uint32_t start_time = end_time = GetTickCount();
uint32_t bytes_transferred = 0;
LED_B_ON();
2019-04-18 04:08:10 +08:00
while (end_time < start_time + CONN_SPEED_TEST_MIN_TIME) {
reply_ng(CMD_DOWNLOADED_BIGBUF, PM3_SUCCESS, test_data, PM3_CMD_DATA_SIZE);
2019-03-10 03:34:41 +08:00
end_time = GetTickCount();
bytes_transferred += PM3_CMD_DATA_SIZE;
2019-03-10 03:34:41 +08:00
}
LED_B_OFF();
Dbprintf(" Time elapsed............%dms", end_time - start_time);
Dbprintf(" Bytes transferred.......%d", bytes_transferred);
2019-04-30 19:02:27 +08:00
Dbprintf(" Transfer Speed PM3 -> Client = " _YELLOW_("%d") " bytes/s", 1000 * bytes_transferred / (end_time - start_time));
}
/**
* Prints runtime information about the PM3.
**/
void SendStatus(void) {
2019-03-10 03:34:41 +08:00
BigBuf_print_status();
Fpga_print_status();
#ifdef WITH_FLASH
2019-03-10 03:34:41 +08:00
Flashmem_print_status();
#endif
#ifdef WITH_SMARTCARD
2019-03-10 03:34:41 +08:00
I2C_print_status();
#endif
2018-04-18 22:17:49 +08:00
#ifdef WITH_LF
2019-03-10 03:34:41 +08:00
printConfig(); // LF Sampling config
printT55xxConfig(); // LF T55XX Config
#endif
printConnSpeed();
2019-04-30 19:02:27 +08:00
DbpString(_BLUE_("Various"));
2019-03-10 03:34:41 +08:00
Dbprintf(" MF_DBGLEVEL.............%d", MF_DBGLEVEL);
Dbprintf(" ToSendMax...............%d", ToSendMax);
Dbprintf(" ToSendBit...............%d", ToSendBit);
Dbprintf(" ToSend BUFFERSIZE.......%d", TOSEND_BUFFER_SIZE);
2019-04-30 19:02:27 +08:00
DbpString(_BLUE_("Installed StandAlone Mode"));
ModInfo();
2019-04-28 17:08:41 +08:00
2019-04-18 18:43:35 +08:00
reply_old(CMD_ACK, 1, 0, 0, 0, 0);
}
void SendCapabilities(void) {
capabilities_t capabilities;
capabilities.version = CAPABILITIES_VERSION;
capabilities.via_fpc = reply_via_fpc;
if (reply_via_fpc)
capabilities.baudrate = USART_BAUD_RATE;
else
capabilities.baudrate = 0; // no real baudrate for USB-CDC
2019-05-01 23:19:37 +08:00
#ifdef WITH_FLASH
capabilities.compiled_with_flash = true;
capabilities.hw_available_flash = FlashInit();
2019-05-01 23:19:37 +08:00
#else
capabilities.compiled_with_flash = false;
capabilities.hw_available_flash = false;
2019-05-01 23:19:37 +08:00
#endif
#ifdef WITH_SMARTCARD
capabilities.compiled_with_smartcard = true;
uint8_t maj, min;
capabilities.hw_available_smartcard = I2C_get_version(&maj, &min) == PM3_SUCCESS;
2019-05-01 23:19:37 +08:00
#else
capabilities.compiled_with_smartcard = false;
capabilities.hw_available_smartcard = false;
2019-05-01 23:19:37 +08:00
#endif
#ifdef WITH_FPC_USART
capabilities.compiled_with_fpc_usart = true;
#else
capabilities.compiled_with_fpc_usart = false;
#endif
#ifdef WITH_FPC_USART_DEV
capabilities.compiled_with_fpc_usart_dev = true;
2019-05-01 23:19:37 +08:00
#else
capabilities.compiled_with_fpc_usart_dev = false;
2019-05-01 23:19:37 +08:00
#endif
#ifdef WITH_FPC_USART_HOST
capabilities.compiled_with_fpc_usart_host = true;
2019-05-01 23:19:37 +08:00
#else
capabilities.compiled_with_fpc_usart_host = false;
2019-05-01 23:19:37 +08:00
#endif
#ifdef WITH_LF
capabilities.compiled_with_lf = true;
#else
capabilities.compiled_with_lf = false;
#endif
#ifdef WITH_HITAG
capabilities.compiled_with_hitag = true;
#else
capabilities.compiled_with_hitag = false;
#endif
#ifdef WITH_HFSNIFF
capabilities.compiled_with_hfsniff = true;
#else
capabilities.compiled_with_hfsniff = false;
#endif
#ifdef WITH_ISO14443a
capabilities.compiled_with_iso14443a = true;
#else
capabilities.compiled_with_iso14443a = false;
#endif
#ifdef WITH_ISO14443b
capabilities.compiled_with_iso14443b = true;
#else
capabilities.compiled_with_iso14443b = false;
#endif
#ifdef WITH_ISO15693
capabilities.compiled_with_iso15693 = true;
#else
capabilities.compiled_with_iso15693 = false;
#endif
#ifdef WITH_FELICA
capabilities.compiled_with_felica = true;
#else
capabilities.compiled_with_felica = false;
#endif
#ifdef WITH_LEGICRF
capabilities.compiled_with_legicrf = true;
#else
capabilities.compiled_with_legicrf = false;
#endif
#ifdef WITH_ICLASS
capabilities.compiled_with_iclass = true;
#else
capabilities.compiled_with_iclass = false;
#endif
#ifdef WITH_LCD
capabilities.compiled_with_lcd = true;
#else
capabilities.compiled_with_lcd = false;
#endif
reply_ng(CMD_CAPABILITIES, PM3_SUCCESS, (uint8_t *)&capabilities, sizeof(capabilities));
}
// Show some leds in a pattern to identify StandAlone mod is running
void StandAloneMode(void) {
2019-03-10 03:34:41 +08:00
DbpString("Stand-alone mode! No PC necessary.");
2019-03-10 03:34:41 +08:00
SpinDown(50);
SpinOff(50);
SpinUp(50);
SpinOff(50);
SpinDown(50);
2019-03-10 03:34:41 +08:00
SpinDelay(500);
}
/*
OBJECTIVE
Listen and detect an external reader. Determine the best location
for the antenna.
INSTRUCTIONS:
Inside the ListenReaderField() function, there is two mode.
By default, when you call the function, you will enter mode 1.
If you press the PM3 button one time, you will enter mode 2.
If you press the PM3 button a second time, you will exit the function.
DESCRIPTION OF MODE 1:
This mode just listens for an external reader field and lights up green
for HF and/or red for LF. This is the original mode of the detectreader
function.
DESCRIPTION OF MODE 2:
This mode will visually represent, using the LEDs, the actual strength of the
current compared to the maximum current detected. Basically, once you know
what kind of external reader is present, it will help you spot the best location to place
your antenna. You will probably not get some good results if there is a LF and a HF reader
at the same place! :-)
*/
2019-04-26 07:31:14 +08:00
#define LIGHT_LEVELS 20
void ListenReaderField(int limit) {
2019-03-10 03:34:41 +08:00
#define LF_ONLY 1
#define HF_ONLY 2
#define REPORT_CHANGE 10 // report new values only if they have changed at least by REPORT_CHANGE
2019-04-27 18:01:22 +08:00
uint16_t lf_av = 0, lf_av_new, lf_baseline = 0, lf_max = 0;
uint16_t hf_av = 0, hf_av_new, hf_baseline = 0, hf_max = 0;
2019-04-26 07:31:14 +08:00
uint16_t mode = 1, display_val, display_max;
2019-04-27 17:09:20 +08:00
bool use_high = false;
2019-03-10 03:34:41 +08:00
// switch off FPGA - we don't want to measure our own signal
// 20180315 - iceman, why load this before and then turn off?
FpgaDownloadAndGo(FPGA_BITSTREAM_HF);
FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF);
LEDsoff();
2019-04-27 17:09:20 +08:00
if (limit == LF_ONLY) {
2019-04-27 18:01:22 +08:00
lf_av = lf_max = AvgAdc(ADC_CHAN_LF);
2019-03-10 03:34:41 +08:00
Dbprintf("LF 125/134kHz Baseline: %dmV", (MAX_ADC_LF_VOLTAGE * lf_av) >> 10);
lf_baseline = lf_av;
}
2019-04-27 17:09:20 +08:00
if (limit == HF_ONLY) {
2019-03-10 03:34:41 +08:00
2019-04-28 17:08:41 +08:00
hf_av = hf_max = AvgAdc(ADC_CHAN_HF);
// iceman, useless, since we are measuring readerfield, not our field. My tests shows a max of 20v from a reader.
// RDV40 will hit the roof, try other ADC channel used in that hardware revision.
2019-04-27 17:09:20 +08:00
use_high = (((MAX_ADC_HF_VOLTAGE * hf_max) >> 10) > MAX_ADC_HF_VOLTAGE - 300);
2019-04-28 17:08:41 +08:00
if (use_high) {
hf_av = hf_max = AvgAdc(ADC_CHAN_HF_RDV40);
}
2019-03-10 03:34:41 +08:00
Dbprintf("HF 13.56MHz Baseline: %dmV", (MAX_ADC_HF_VOLTAGE * hf_av) >> 10);
hf_baseline = hf_av;
}
2019-03-10 07:00:59 +08:00
for (;;) {
2019-04-28 17:08:41 +08:00
2019-03-10 03:34:41 +08:00
// Switch modes with button
if (BUTTON_PRESS()) {
SpinDelay(500);
switch (mode) {
case 1:
mode = 2;
DbpString("Signal Strength Mode");
break;
case 2:
default:
DbpString("Stopped");
2019-04-28 17:08:41 +08:00
FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF);
2019-03-10 03:34:41 +08:00
LEDsoff();
return;
}
}
WDT_HIT();
2019-04-27 17:09:20 +08:00
if (limit == LF_ONLY) {
2019-03-10 07:00:59 +08:00
if (mode == 1) {
2019-03-10 03:34:41 +08:00
if (ABS(lf_av - lf_baseline) > REPORT_CHANGE)
LED_D_ON();
else
LED_D_OFF();
}
lf_av_new = AvgAdc(ADC_CHAN_LF);
// see if there's a significant change
if (ABS(lf_av - lf_av_new) > REPORT_CHANGE) {
Dbprintf("LF 125/134kHz Field Change: %5dmV", (MAX_ADC_LF_VOLTAGE * lf_av_new) >> 10);
lf_av = lf_av_new;
if (lf_av > lf_max)
lf_max = lf_av;
}
}
2019-04-27 17:09:20 +08:00
if (limit == HF_ONLY) {
2019-03-10 07:00:59 +08:00
if (mode == 1) {
2019-03-10 03:34:41 +08:00
if (ABS(hf_av - hf_baseline) > REPORT_CHANGE)
LED_B_ON();
else
LED_B_OFF();
}
hf_av_new = (use_high) ? AvgAdc(ADC_CHAN_HF_RDV40) : AvgAdc(ADC_CHAN_HF);
// see if there's a significant change
2019-03-10 07:00:59 +08:00
if (ABS(hf_av - hf_av_new) > REPORT_CHANGE) {
2019-03-10 03:34:41 +08:00
Dbprintf("HF 13.56MHz Field Change: %5dmV", (MAX_ADC_HF_VOLTAGE * hf_av_new) >> 10);
hf_av = hf_av_new;
if (hf_av > hf_max)
hf_max = hf_av;
}
}
if (mode == 2) {
if (limit == LF_ONLY) {
display_val = lf_av;
display_max = lf_max;
} else if (limit == HF_ONLY) {
display_val = hf_av;
display_max = hf_max;
} else { /* Pick one at random */
2019-03-10 07:00:59 +08:00
if ((hf_max - hf_baseline) > (lf_max - lf_baseline)) {
2019-03-10 03:34:41 +08:00
display_val = hf_av;
display_max = hf_max;
} else {
display_val = lf_av;
display_max = lf_max;
}
}
2019-04-28 17:08:41 +08:00
display_val = display_val * (4 * LIGHT_LEVELS) / MAX(1, display_max);
uint32_t duty_a = MIN(MAX(display_val, 0 * LIGHT_LEVELS), 1 * LIGHT_LEVELS) - 0 * LIGHT_LEVELS;
uint32_t duty_b = MIN(MAX(display_val, 1 * LIGHT_LEVELS), 2 * LIGHT_LEVELS) - 1 * LIGHT_LEVELS;
uint32_t duty_c = MIN(MAX(display_val, 2 * LIGHT_LEVELS), 3 * LIGHT_LEVELS) - 2 * LIGHT_LEVELS;
uint32_t duty_d = MIN(MAX(display_val, 3 * LIGHT_LEVELS), 4 * LIGHT_LEVELS) - 3 * LIGHT_LEVELS;
2019-04-27 17:09:20 +08:00
// LED A
2019-04-26 07:31:14 +08:00
if (duty_a == 0) {
LED_A_OFF();
} else if (duty_a == LIGHT_LEVELS) {
LED_A_ON();
} else {
LED_A_ON();
SpinDelay(duty_a);
LED_A_OFF();
SpinDelay(LIGHT_LEVELS - duty_a);
}
2019-04-27 17:09:20 +08:00
2019-04-28 17:08:41 +08:00
// LED B
2019-04-26 07:31:14 +08:00
if (duty_b == 0) {
LED_B_OFF();
} else if (duty_b == LIGHT_LEVELS) {
LED_B_ON();
} else {
LED_B_ON();
SpinDelay(duty_b);
LED_B_OFF();
SpinDelay(LIGHT_LEVELS - duty_b);
}
2019-04-27 17:09:20 +08:00
// LED C
2019-04-26 07:31:14 +08:00
if (duty_c == 0) {
LED_C_OFF();
} else if (duty_c == LIGHT_LEVELS) {
LED_C_ON();
} else {
LED_C_ON();
SpinDelay(duty_c);
LED_C_OFF();
SpinDelay(LIGHT_LEVELS - duty_c);
}
2019-04-27 17:09:20 +08:00
// LED D
2019-04-26 07:31:14 +08:00
if (duty_d == 0) {
LED_D_OFF();
} else if (duty_d == LIGHT_LEVELS) {
LED_D_ON();
} else {
LED_D_ON();
SpinDelay(duty_d);
LED_D_OFF();
SpinDelay(LIGHT_LEVELS - duty_d);
2019-03-10 03:34:41 +08:00
}
}
}
}
2019-04-18 18:43:35 +08:00
static void PacketReceived(PacketCommandNG *packet) {
2019-04-19 03:41:48 +08:00
/*
2019-04-18 03:30:01 +08:00
if (packet->ng) {
2019-04-18 06:12:52 +08:00
Dbprintf("received NG frame with %d bytes payload, with command: 0x%04x", packet->length, cmd);
} else {
2019-04-18 06:12:52 +08:00
Dbprintf("received OLD frame of %d bytes, with command: 0x%04x and args: %d %d %d", packet->length, packet->cmd, packet->oldarg[0], packet->oldarg[1], packet->oldarg[2]);
}
2019-04-19 03:41:48 +08:00
*/
2019-04-18 06:12:52 +08:00
switch (packet->cmd) {
#ifdef WITH_LF
2019-03-10 03:34:41 +08:00
case CMD_SET_LF_T55XX_CONFIG:
2019-04-18 06:12:52 +08:00
setT55xxConfig(packet->oldarg[0], (t55xx_config *) packet->data.asBytes);
2019-03-10 03:34:41 +08:00
break;
case CMD_SET_LF_SAMPLING_CONFIG:
2019-04-18 06:12:52 +08:00
setSamplingConfig((sample_config *) packet->data.asBytes);
2019-03-10 03:34:41 +08:00
break;
case CMD_ACQUIRE_RAW_ADC_SAMPLES_125K: {
2019-04-18 06:12:52 +08:00
uint32_t bits = SampleLF(packet->oldarg[0], packet->oldarg[1]);
2019-04-18 18:43:35 +08:00
reply_old(CMD_ACK, bits, 0, 0, 0, 0);
2019-03-10 03:34:41 +08:00
break;
}
case CMD_MOD_THEN_ACQUIRE_RAW_ADC_SAMPLES_125K:
2019-04-18 06:12:52 +08:00
ModThenAcquireRawAdcSamples125k(packet->oldarg[0], packet->oldarg[1], packet->oldarg[2], packet->data.asBytes);
2019-03-10 03:34:41 +08:00
break;
2019-03-12 20:15:39 +08:00
case CMD_LF_SNIFF_RAW_ADC_SAMPLES: {
uint32_t bits = SniffLF();
2019-04-18 18:43:35 +08:00
reply_old(CMD_ACK, bits, 0, 0, 0, 0);
2019-03-10 03:34:41 +08:00
break;
}
case CMD_HID_DEMOD_FSK: {
uint32_t high, low;
2019-04-18 06:12:52 +08:00
CmdHIDdemodFSK(packet->oldarg[0], &high, &low, 1);
2019-03-10 03:34:41 +08:00
break;
}
case CMD_HID_SIM_TAG:
2019-04-18 06:12:52 +08:00
CmdHIDsimTAG(packet->oldarg[0], packet->oldarg[1], 1);
2019-03-10 03:34:41 +08:00
break;
case CMD_FSK_SIM_TAG:
2019-04-18 06:12:52 +08:00
CmdFSKsimTAG(packet->oldarg[0], packet->oldarg[1], packet->oldarg[2], packet->data.asBytes, 1);
2019-03-10 03:34:41 +08:00
break;
case CMD_ASK_SIM_TAG:
2019-04-18 06:12:52 +08:00
CmdASKsimTag(packet->oldarg[0], packet->oldarg[1], packet->oldarg[2], packet->data.asBytes, 1);
2019-03-10 03:34:41 +08:00
break;
case CMD_PSK_SIM_TAG:
2019-04-18 06:12:52 +08:00
CmdPSKsimTag(packet->oldarg[0], packet->oldarg[1], packet->oldarg[2], packet->data.asBytes, 1);
2019-03-10 03:34:41 +08:00
break;
case CMD_HID_CLONE_TAG:
2019-04-18 06:12:52 +08:00
CopyHIDtoT55x7(packet->oldarg[0], packet->oldarg[1], packet->oldarg[2], packet->data.asBytes[0]);
2019-03-10 03:34:41 +08:00
break;
case CMD_IO_DEMOD_FSK: {
uint32_t high, low;
2019-04-18 06:12:52 +08:00
CmdIOdemodFSK(packet->oldarg[0], &high, &low, 1);
2019-03-10 03:34:41 +08:00
break;
}
case CMD_IO_CLONE_TAG:
2019-04-18 06:12:52 +08:00
CopyIOtoT55x7(packet->oldarg[0], packet->oldarg[1]);
2019-03-10 03:34:41 +08:00
break;
case CMD_EM410X_DEMOD: {
uint32_t high;
uint64_t low;
2019-04-18 06:12:52 +08:00
CmdEM410xdemod(packet->oldarg[0], &high, &low, 1);
2019-03-10 03:34:41 +08:00
break;
}
case CMD_EM410X_WRITE_TAG:
2019-04-18 06:12:52 +08:00
WriteEM410x(packet->oldarg[0], packet->oldarg[1], packet->oldarg[2]);
2019-03-10 03:34:41 +08:00
break;
case CMD_READ_TI_TYPE:
ReadTItag();
break;
case CMD_WRITE_TI_TYPE:
2019-04-18 06:12:52 +08:00
WriteTItag(packet->oldarg[0], packet->oldarg[1], packet->oldarg[2]);
2019-03-10 03:34:41 +08:00
break;
case CMD_SIMULATE_TAG_125K:
LED_A_ON();
2019-04-18 06:12:52 +08:00
SimulateTagLowFrequency(packet->oldarg[0], packet->oldarg[1], 1);
reply_ng(CMD_SIMULATE_TAG_125K, PM3_EOPABORTED, NULL, 0);
2019-03-10 03:34:41 +08:00
LED_A_OFF();
break;
case CMD_LF_SIMULATE_BIDIR:
2019-04-18 06:12:52 +08:00
SimulateTagLowFrequencyBidir(packet->oldarg[0], packet->oldarg[1]);
2019-03-10 03:34:41 +08:00
break;
case CMD_INDALA_CLONE_TAG:
2019-04-18 06:12:52 +08:00
CopyIndala64toT55x7(packet->data.asDwords[0], packet->data.asDwords[1]);
2019-03-10 03:34:41 +08:00
break;
case CMD_INDALA_CLONE_TAG_L:
CopyIndala224toT55x7(
2019-04-18 06:12:52 +08:00
packet->data.asDwords[0], packet->data.asDwords[1], packet->data.asDwords[2], packet->data.asDwords[3],
packet->data.asDwords[4], packet->data.asDwords[5], packet->data.asDwords[6]
2019-03-10 07:00:59 +08:00
);
2019-03-10 03:34:41 +08:00
break;
case CMD_T55XX_READ_BLOCK: {
2019-04-18 06:12:52 +08:00
T55xxReadBlock(packet->oldarg[0], packet->oldarg[1], packet->oldarg[2]);
2019-03-10 03:34:41 +08:00
break;
}
case CMD_T55XX_WRITE_BLOCK:
// uses NG format
T55xxWriteBlock(packet->data.asBytes);
2019-03-10 03:34:41 +08:00
break;
case CMD_T55XX_WAKEUP:
2019-04-18 06:12:52 +08:00
T55xxWakeUp(packet->oldarg[0]);
2019-03-10 03:34:41 +08:00
break;
case CMD_T55XX_RESET_READ:
T55xxResetRead();
break;
case CMD_T55XX_CHKPWDS:
T55xx_ChkPwds();
break;
case CMD_PCF7931_READ:
ReadPCF7931();
break;
case CMD_PCF7931_WRITE:
WritePCF7931(
2019-04-18 06:12:52 +08:00
packet->data.asBytes[0], packet->data.asBytes[1], packet->data.asBytes[2], packet->data.asBytes[3],
packet->data.asBytes[4], packet->data.asBytes[5], packet->data.asBytes[6], packet->data.asBytes[9],
packet->data.asBytes[7] - 128, packet->data.asBytes[8] - 128,
packet->oldarg[0],
packet->oldarg[1],
packet->oldarg[2]
2019-03-10 07:00:59 +08:00
);
2019-03-10 03:34:41 +08:00
break;
case CMD_EM4X_READ_WORD:
2019-04-18 06:12:52 +08:00
EM4xReadWord(packet->oldarg[0], packet->oldarg[1], packet->oldarg[2]);
2019-03-10 03:34:41 +08:00
break;
case CMD_EM4X_WRITE_WORD:
2019-04-18 06:12:52 +08:00
EM4xWriteWord(packet->oldarg[0], packet->oldarg[1], packet->oldarg[2]);
2019-03-10 03:34:41 +08:00
break;
case CMD_AWID_DEMOD_FSK: {
uint32_t high, low;
// Set realtime AWID demodulation
2019-04-18 06:12:52 +08:00
CmdAWIDdemodFSK(packet->oldarg[0], &high, &low, 1);
2019-03-10 03:34:41 +08:00
break;
}
case CMD_VIKING_CLONE_TAG:
2019-04-18 06:12:52 +08:00
CopyVikingtoT55xx(packet->oldarg[0], packet->oldarg[1], packet->oldarg[2]);
2019-03-10 03:34:41 +08:00
break;
case CMD_COTAG:
2019-04-18 06:12:52 +08:00
Cotag(packet->oldarg[0]);
break;
#endif
#ifdef WITH_HITAG
2019-03-12 20:15:39 +08:00
case CMD_SNIFF_HITAG: // Eavesdrop Hitag tag, args = type
2019-05-13 18:27:00 +08:00
SniffHitag();
2019-03-10 03:34:41 +08:00
break;
case CMD_SIMULATE_HITAG: // Simulate Hitag tag, args = memory content
2019-04-18 06:12:52 +08:00
SimulateHitagTag((bool)packet->oldarg[0], packet->data.asBytes);
2019-03-10 03:34:41 +08:00
break;
case CMD_READER_HITAG: // Reader for Hitag tags, args = type and function
2019-04-18 06:12:52 +08:00
ReaderHitag((hitag_function)packet->oldarg[0], (hitag_data *)packet->data.asBytes);
2019-03-10 03:34:41 +08:00
break;
case CMD_SIMULATE_HITAG_S:// Simulate Hitag s tag, args = memory content
2019-04-18 06:12:52 +08:00
SimulateHitagSTag((bool)packet->oldarg[0], packet->data.asBytes);
2019-03-10 03:34:41 +08:00
break;
case CMD_TEST_HITAGS_TRACES:// Tests every challenge within the given file
2019-04-18 06:12:52 +08:00
check_challenges((bool)packet->oldarg[0], packet->data.asBytes);
2019-03-10 03:34:41 +08:00
break;
case CMD_READ_HITAG_S: //Reader for only Hitag S tags, args = key or challenge
2019-04-18 06:12:52 +08:00
ReadHitagS((hitag_function)packet->oldarg[0], (hitag_data *)packet->data.asBytes);
2019-03-10 03:34:41 +08:00
break;
case CMD_WR_HITAG_S: //writer for Hitag tags args=data to write,page and key or challenge
2019-04-18 06:12:52 +08:00
if ((hitag_function)packet->oldarg[0] < 10) {
WritePageHitagS((hitag_function)packet->oldarg[0], (hitag_data *)packet->data.asBytes, packet->oldarg[2]);
2019-03-13 05:52:15 +08:00
} else {
2019-04-18 06:12:52 +08:00
WriterHitag((hitag_function)packet->oldarg[0], (hitag_data *)packet->data.asBytes, packet->oldarg[2]);
2019-03-10 03:34:41 +08:00
}
break;
#endif
#ifdef WITH_ISO15693
2019-03-10 03:34:41 +08:00
case CMD_ACQUIRE_RAW_ADC_SAMPLES_ISO_15693:
AcquireRawAdcSamplesIso15693();
break;
case CMD_RECORD_RAW_ADC_SAMPLES_ISO_15693:
RecordRawAdcSamplesIso15693();
break;
case CMD_ISO_15693_COMMAND:
2019-04-18 06:12:52 +08:00
DirectTag15693Command(packet->oldarg[0], packet->oldarg[1], packet->oldarg[2], packet->data.asBytes);
2019-03-10 03:34:41 +08:00
break;
case CMD_ISO_15693_FIND_AFI:
2019-04-18 06:12:52 +08:00
BruteforceIso15693Afi(packet->oldarg[0]);
2019-03-10 03:34:41 +08:00
break;
case CMD_READER_ISO_15693:
2019-04-18 06:12:52 +08:00
ReaderIso15693(packet->oldarg[0]);
2019-03-10 03:34:41 +08:00
break;
case CMD_SIMTAG_ISO_15693:
2019-04-18 06:12:52 +08:00
SimTagIso15693(packet->oldarg[0], packet->data.asBytes);
2019-03-10 03:34:41 +08:00
break;
#endif
2011-12-16 19:00:51 +08:00
#ifdef WITH_LEGICRF
2019-03-10 03:34:41 +08:00
case CMD_SIMULATE_TAG_LEGIC_RF:
2019-04-18 06:12:52 +08:00
LegicRfSimulate(packet->oldarg[0]);
2019-03-10 03:34:41 +08:00
break;
case CMD_WRITER_LEGIC_RF:
2019-04-18 06:12:52 +08:00
LegicRfWriter(packet->oldarg[0], packet->oldarg[1], packet->oldarg[2], packet->data.asBytes);
2019-03-10 03:34:41 +08:00
break;
case CMD_READER_LEGIC_RF:
2019-04-18 06:12:52 +08:00
LegicRfReader(packet->oldarg[0], packet->oldarg[1], packet->oldarg[2]);
2019-03-10 03:34:41 +08:00
break;
case CMD_LEGIC_INFO:
LegicRfInfo();
break;
case CMD_LEGIC_ESET:
//-----------------------------------------------------------------------------
// Note: we call FpgaDownloadAndGo(FPGA_BITSTREAM_HF) here although FPGA is not
// involved in dealing with emulator memory. But if it is called later, it might
// destroy the Emulator Memory.
//-----------------------------------------------------------------------------
// arg0 = offset
// arg1 = num of bytes
FpgaDownloadAndGo(FPGA_BITSTREAM_HF);
2019-04-18 06:12:52 +08:00
emlSet(packet->data.asBytes, packet->oldarg[0], packet->oldarg[1]);
2019-03-10 03:34:41 +08:00
break;
#endif
#ifdef WITH_ISO14443b
2019-03-10 03:34:41 +08:00
case CMD_READ_SRI_TAG:
2019-04-18 06:12:52 +08:00
ReadSTMemoryIso14443b(packet->oldarg[0]);
2019-03-10 03:34:41 +08:00
break;
2019-03-12 20:15:39 +08:00
case CMD_SNIFF_ISO_14443B:
2019-03-10 03:34:41 +08:00
SniffIso14443b();
break;
case CMD_SIMULATE_TAG_ISO_14443B:
2019-04-18 06:12:52 +08:00
SimulateIso14443bTag(packet->oldarg[0]);
2019-03-10 03:34:41 +08:00
break;
case CMD_ISO_14443B_COMMAND:
2019-04-18 06:12:52 +08:00
//SendRawCommand14443B(packet->oldarg[0],packet->oldarg[1],packet->oldarg[2],packet->data.asBytes);
2019-04-18 03:30:01 +08:00
SendRawCommand14443B_Ex(packet);
2019-03-10 03:34:41 +08:00
break;
#endif
2017-10-21 02:27:44 +08:00
#ifdef WITH_FELICA
2019-03-10 03:34:41 +08:00
case CMD_FELICA_COMMAND:
2019-04-18 03:30:01 +08:00
felica_sendraw(packet);
2019-03-10 03:34:41 +08:00
break;
2017-10-21 02:27:44 +08:00
case CMD_FELICA_LITE_SIM:
2019-04-18 06:12:52 +08:00
felica_sim_lite(packet->oldarg[0]);
2017-10-21 02:27:44 +08:00
break;
2019-03-12 20:15:39 +08:00
case CMD_FELICA_SNIFF:
2019-04-18 06:12:52 +08:00
felica_sniff(packet->oldarg[0], packet->oldarg[1]);
2017-10-21 02:27:44 +08:00
break;
case CMD_FELICA_LITE_DUMP:
2019-03-10 03:34:41 +08:00
felica_dump_lite_s();
2017-10-21 02:27:44 +08:00
break;
#endif
#ifdef WITH_ISO14443a
2019-03-12 20:15:39 +08:00
case CMD_SNIFF_ISO_14443a:
2019-04-18 06:12:52 +08:00
SniffIso14443a(packet->oldarg[0]);
2019-03-10 03:34:41 +08:00
break;
case CMD_READER_ISO_14443a:
2019-04-18 03:30:01 +08:00
ReaderIso14443a(packet);
2019-03-10 03:34:41 +08:00
break;
case CMD_SIMULATE_TAG_ISO_14443a:
2019-04-18 06:12:52 +08:00
SimulateIso14443aTag(packet->oldarg[0], packet->oldarg[1], packet->data.asBytes); // ## Simulate iso14443a tag - pass tag type & UID
2019-03-10 03:34:41 +08:00
break;
case CMD_ANTIFUZZ_ISO_14443a:
2019-04-18 06:12:52 +08:00
iso14443a_antifuzz(packet->oldarg[0]);
2019-03-10 03:34:41 +08:00
break;
case CMD_EPA_PACE_COLLECT_NONCE:
2019-04-18 03:30:01 +08:00
EPA_PACE_Collect_Nonce(packet);
2019-03-10 03:34:41 +08:00
break;
case CMD_EPA_PACE_REPLAY:
2019-04-18 03:30:01 +08:00
EPA_PACE_Replay(packet);
2019-03-10 03:34:41 +08:00
break;
case CMD_READER_MIFARE:
2019-04-18 06:12:52 +08:00
ReaderMifare(packet->oldarg[0], packet->oldarg[1], packet->oldarg[2]);
2019-03-10 03:34:41 +08:00
break;
case CMD_MIFARE_READBL:
2019-05-13 18:49:41 +08:00
MifareReadBlock(packet->oldarg[0], packet->oldarg[1], packet->data.asBytes);
2019-03-10 03:34:41 +08:00
break;
case CMD_MIFAREU_READBL:
2019-04-18 06:12:52 +08:00
MifareUReadBlock(packet->oldarg[0], packet->oldarg[1], packet->data.asBytes);
2019-03-10 03:34:41 +08:00
break;
case CMD_MIFAREUC_AUTH:
2019-04-18 06:12:52 +08:00
MifareUC_Auth(packet->oldarg[0], packet->data.asBytes);
2019-03-10 03:34:41 +08:00
break;
case CMD_MIFAREU_READCARD:
2019-04-18 06:12:52 +08:00
MifareUReadCard(packet->oldarg[0], packet->oldarg[1], packet->oldarg[2], packet->data.asBytes);
2019-03-10 03:34:41 +08:00
break;
case CMD_MIFAREUC_SETPWD:
2019-04-18 06:12:52 +08:00
MifareUSetPwd(packet->oldarg[0], packet->data.asBytes);
2019-03-10 03:34:41 +08:00
break;
case CMD_MIFARE_READSC:
2019-05-13 18:49:41 +08:00
MifareReadSector(packet->oldarg[0], packet->oldarg[1], packet->data.asBytes);
2019-03-10 03:34:41 +08:00
break;
case CMD_MIFARE_WRITEBL:
2019-05-13 18:49:41 +08:00
MifareWriteBlock(packet->oldarg[0], packet->oldarg[1], packet->data.asBytes);
2019-03-10 03:34:41 +08:00
break;
//case CMD_MIFAREU_WRITEBL_COMPAT:
2019-04-18 06:12:52 +08:00
//MifareUWriteBlockCompat(packet->oldarg[0], packet->data.asBytes);
2019-03-10 07:00:59 +08:00
//break;
2019-03-10 03:34:41 +08:00
case CMD_MIFAREU_WRITEBL:
2019-04-18 06:12:52 +08:00
MifareUWriteBlock(packet->oldarg[0], packet->oldarg[1], packet->data.asBytes);
2019-03-10 03:34:41 +08:00
break;
case CMD_MIFARE_ACQUIRE_ENCRYPTED_NONCES:
2019-04-18 06:12:52 +08:00
MifareAcquireEncryptedNonces(packet->oldarg[0], packet->oldarg[1], packet->oldarg[2], packet->data.asBytes);
2019-03-10 03:34:41 +08:00
break;
case CMD_MIFARE_ACQUIRE_NONCES:
MifareAcquireNonces(packet->oldarg[0], packet->oldarg[2]);
2019-03-10 03:34:41 +08:00
break;
case CMD_MIFARE_NESTED:
2019-04-18 06:12:52 +08:00
MifareNested(packet->oldarg[0], packet->oldarg[1], packet->oldarg[2], packet->data.asBytes);
2019-03-10 03:34:41 +08:00
break;
case CMD_MIFARE_CHKKEYS: {
MifareChkKeys(packet->data.asBytes);
2019-03-10 03:34:41 +08:00
break;
}
case CMD_MIFARE_CHKKEYS_FAST: {
2019-04-18 06:12:52 +08:00
MifareChkKeys_fast(packet->oldarg[0], packet->oldarg[1], packet->oldarg[2], packet->data.asBytes);
2019-03-10 03:34:41 +08:00
break;
}
case CMD_SIMULATE_MIFARE_CARD:
2019-05-13 18:49:41 +08:00
Mifare1ksim(packet->oldarg[0], packet->oldarg[1], packet->data.asBytes);
2019-03-10 03:34:41 +08:00
break;
// emulator
case CMD_MIFARE_SET_DBGMODE:
2019-04-18 06:12:52 +08:00
MifareSetDbgLvl(packet->oldarg[0]);
2019-03-10 03:34:41 +08:00
break;
case CMD_MIFARE_EML_MEMCLR:
2019-05-13 18:30:27 +08:00
MifareEMemClr();
2019-03-10 03:34:41 +08:00
break;
case CMD_MIFARE_EML_MEMSET:
2019-04-18 06:12:52 +08:00
MifareEMemSet(packet->oldarg[0], packet->oldarg[1], packet->oldarg[2], packet->data.asBytes);
2019-03-10 03:34:41 +08:00
break;
case CMD_MIFARE_EML_MEMGET:
2019-05-13 18:49:41 +08:00
MifareEMemGet(packet->oldarg[0], packet->oldarg[1]);
2019-03-10 03:34:41 +08:00
break;
case CMD_MIFARE_EML_CARDLOAD:
2019-05-13 18:49:41 +08:00
MifareECardLoad(packet->oldarg[0], packet->oldarg[1]);
2019-03-10 03:34:41 +08:00
break;
// Work with "magic Chinese" card
case CMD_MIFARE_CSETBLOCK:
2019-04-18 06:12:52 +08:00
MifareCSetBlock(packet->oldarg[0], packet->oldarg[1], packet->data.asBytes);
2019-03-10 03:34:41 +08:00
break;
case CMD_MIFARE_CGETBLOCK:
2019-04-18 06:12:52 +08:00
MifareCGetBlock(packet->oldarg[0], packet->oldarg[1], packet->data.asBytes);
2019-03-10 03:34:41 +08:00
break;
case CMD_MIFARE_CIDENT:
MifareCIdent();
break;
// mifare sniffer
// case CMD_MIFARE_SNIFFER:
2019-04-18 06:12:52 +08:00
// SniffMifare(packet->oldarg[0]);
2019-03-10 03:34:41 +08:00
// break;
case CMD_MIFARE_SETMOD:
2019-04-18 06:12:52 +08:00
MifareSetMod(packet->oldarg[0], packet->data.asBytes);
2019-03-10 03:34:41 +08:00
break;
//mifare desfire
case CMD_MIFARE_DESFIRE_READBL:
break;
case CMD_MIFARE_DESFIRE_WRITEBL:
break;
case CMD_MIFARE_DESFIRE_AUTH1:
2019-04-18 06:12:52 +08:00
MifareDES_Auth1(packet->oldarg[0], packet->oldarg[1], packet->oldarg[2], packet->data.asBytes);
2019-03-10 03:34:41 +08:00
break;
case CMD_MIFARE_DESFIRE_AUTH2:
2019-04-18 06:12:52 +08:00
//MifareDES_Auth2(packet->oldarg[0],packet->data.asBytes);
2019-03-10 03:34:41 +08:00
break;
case CMD_MIFARE_DES_READER:
2019-04-18 06:12:52 +08:00
//readermifaredes(packet->oldarg[0], packet->oldarg[1], packet->data.asBytes);
2019-03-10 03:34:41 +08:00
break;
case CMD_MIFARE_DESFIRE_INFO:
MifareDesfireGetInformation();
break;
case CMD_MIFARE_DESFIRE:
2019-04-18 06:12:52 +08:00
MifareSendCommand(packet->oldarg[0], packet->oldarg[1], packet->data.asBytes);
2019-03-10 03:34:41 +08:00
break;
case CMD_MIFARE_COLLECT_NONCES:
break;
case CMD_MIFARE_NACK_DETECT:
DetectNACKbug();
break;
#endif
2017-11-25 17:20:52 +08:00
2011-12-16 19:00:51 +08:00
#ifdef WITH_ICLASS
2019-03-10 03:34:41 +08:00
// Makes use of ISO14443a FPGA Firmware
2019-03-12 20:15:39 +08:00
case CMD_SNIFF_ICLASS:
2019-03-10 03:34:41 +08:00
SniffIClass();
break;
case CMD_SIMULATE_TAG_ICLASS:
2019-04-18 06:12:52 +08:00
SimulateIClass(packet->oldarg[0], packet->oldarg[1], packet->oldarg[2], packet->data.asBytes);
2019-03-10 03:34:41 +08:00
break;
case CMD_READER_ICLASS:
2019-04-18 06:12:52 +08:00
ReaderIClass(packet->oldarg[0]);
2019-03-10 03:34:41 +08:00
break;
case CMD_READER_ICLASS_REPLAY:
2019-04-18 06:12:52 +08:00
ReaderIClass_Replay(packet->oldarg[0], packet->data.asBytes);
2019-03-10 03:34:41 +08:00
break;
case CMD_ICLASS_EML_MEMSET:
//iceman, should call FPGADOWNLOAD before, since it corrupts BigBuf
FpgaDownloadAndGo(FPGA_BITSTREAM_HF);
2019-04-18 06:12:52 +08:00
emlSet(packet->data.asBytes, packet->oldarg[0], packet->oldarg[1]);
2019-03-10 03:34:41 +08:00
break;
case CMD_ICLASS_WRITEBLOCK:
2019-04-18 06:12:52 +08:00
iClass_WriteBlock(packet->oldarg[0], packet->data.asBytes);
2019-03-10 03:34:41 +08:00
break;
case CMD_ICLASS_READCHECK: // auth step 1
2019-04-18 06:12:52 +08:00
iClass_ReadCheck(packet->oldarg[0], packet->oldarg[1]);
2019-03-10 03:34:41 +08:00
break;
case CMD_ICLASS_READBLOCK:
2019-04-18 06:12:52 +08:00
iClass_ReadBlk(packet->oldarg[0]);
2019-03-10 03:34:41 +08:00
break;
case CMD_ICLASS_AUTHENTICATION: //check
2019-04-18 06:12:52 +08:00
iClass_Authentication(packet->data.asBytes);
2019-03-10 03:34:41 +08:00
break;
case CMD_ICLASS_CHECK_KEYS:
2019-04-18 06:12:52 +08:00
iClass_Authentication_fast(packet->oldarg[0], packet->oldarg[1], packet->data.asBytes);
2019-03-10 03:34:41 +08:00
break;
case CMD_ICLASS_DUMP:
2019-04-18 06:12:52 +08:00
iClass_Dump(packet->oldarg[0], packet->oldarg[1]);
2019-03-10 03:34:41 +08:00
break;
case CMD_ICLASS_CLONE:
2019-04-18 06:12:52 +08:00
iClass_Clone(packet->oldarg[0], packet->oldarg[1], packet->data.asBytes);
2019-03-10 03:34:41 +08:00
break;
#endif
2018-07-04 21:29:27 +08:00
2019-03-12 20:15:39 +08:00
#ifdef WITH_HFSNIFF
2019-03-10 03:34:41 +08:00
case CMD_HF_SNIFFER:
2019-04-18 06:12:52 +08:00
HfSniff(packet->oldarg[0], packet->oldarg[1]);
2019-03-10 03:34:41 +08:00
break;
#endif
2018-07-04 21:29:27 +08:00
#ifdef WITH_SMARTCARD
2019-03-10 03:34:41 +08:00
case CMD_SMART_ATR: {
SmartCardAtr();
break;
}
2019-03-10 07:00:59 +08:00
case CMD_SMART_SETBAUD: {
2019-04-18 06:12:52 +08:00
SmartCardSetBaud(packet->oldarg[0]);
2019-03-10 03:34:41 +08:00
break;
}
2019-03-10 07:00:59 +08:00
case CMD_SMART_SETCLOCK: {
2019-04-18 06:12:52 +08:00
SmartCardSetClock(packet->oldarg[0]);
2019-03-10 03:34:41 +08:00
break;
}
2018-07-05 22:32:10 +08:00
case CMD_SMART_RAW: {
2019-04-18 06:12:52 +08:00
SmartCardRaw(packet->oldarg[0], packet->oldarg[1], packet->data.asBytes);
2019-03-10 03:34:41 +08:00
break;
}
case CMD_SMART_UPLOAD: {
// upload file from client
uint8_t *mem = BigBuf_get_addr();
memcpy(mem + packet->oldarg[0], packet->data.asBytes, PM3_CMD_DATA_SIZE);
2019-04-18 18:43:35 +08:00
reply_old(CMD_ACK, 1, 0, 0, 0, 0);
break;
}
case CMD_SMART_UPGRADE: {
2019-04-18 06:12:52 +08:00
SmartCardUpgrade(packet->oldarg[0]);
break;
2019-03-10 03:34:41 +08:00
}
#endif
#ifdef WITH_FPC_USART_DEV
case CMD_USART_TX: {
2019-05-07 15:37:43 +08:00
LED_B_ON();
usart_writebuffer_sync(packet->data.asBytes, packet->length);
reply_ng(CMD_USART_TX, PM3_SUCCESS, NULL, 0);
2019-05-07 15:37:43 +08:00
LED_B_OFF();
break;
}
case CMD_USART_RX: {
2019-05-07 15:37:43 +08:00
LED_B_ON();
uint8_t *dest = BigBuf_malloc(USART_FIFOLEN);
2019-04-21 01:17:32 +08:00
uint16_t available = usart_rxdata_available();
2019-05-08 07:35:51 +08:00
2019-04-21 01:17:32 +08:00
if (available > 0) {
uint16_t len = usart_read_ng(dest, available);
reply_ng(CMD_USART_RX, PM3_SUCCESS, dest, len);
} else {
reply_ng(CMD_USART_RX, PM3_ENODATA, NULL, 0);
}
2019-05-07 15:37:43 +08:00
BigBuf_free();
LED_B_OFF();
break;
}
case CMD_USART_TXRX: {
2019-05-07 15:37:43 +08:00
LED_B_ON();
struct p {
uint32_t waittime;
uint8_t data[PM3_CMD_DATA_SIZE - sizeof(uint32_t)];
} PACKED;
struct p *payload = (struct p *) &packet->data.asBytes;
usart_writebuffer_sync(payload->data, packet->length - sizeof(payload->waittime));
uint16_t available;
WaitMS(payload->waittime);
2019-05-07 15:37:43 +08:00
uint8_t *dest = BigBuf_malloc(USART_FIFOLEN);
2019-05-08 07:35:51 +08:00
available = usart_rxdata_available();
// Dbprintf("avail (%u)", available);
if (available > 0) {
uint16_t len = usart_read_ng(dest, available);
reply_ng(CMD_USART_TXRX, PM3_SUCCESS, dest, len);
} else {
reply_ng(CMD_USART_TXRX, PM3_ENODATA, NULL, 0);
2019-03-10 03:34:41 +08:00
}
2019-05-07 15:37:43 +08:00
BigBuf_free();
LED_B_OFF();
2019-03-10 03:34:41 +08:00
break;
}
#endif
2019-03-10 03:34:41 +08:00
case CMD_BUFF_CLEAR:
BigBuf_Clear();
BigBuf_free();
break;
case CMD_MEASURE_ANTENNA_TUNING:
MeasureAntennaTuning();
break;
2019-05-14 14:25:26 +08:00
case CMD_MEASURE_ANTENNA_TUNING_HF:
if (packet->length != 1)
reply_ng(CMD_MEASURE_ANTENNA_TUNING_HF, PM3_EINVARG, NULL, 0);
switch (packet->data.asBytes[0]) {
case 1: // MEASURE_ANTENNA_TUNING_HF_START
// Let the FPGA drive the high-frequency antenna around 13.56 MHz.
FpgaDownloadAndGo(FPGA_BITSTREAM_HF);
FpgaWriteConfWord(FPGA_MAJOR_MODE_HF_READER_RX_XCORR);
reply_ng(CMD_MEASURE_ANTENNA_TUNING_HF, PM3_SUCCESS, NULL, 0);
break;
case 2:
if (button_status == BUTTON_SINGLE_CLICK)
reply_ng(CMD_MEASURE_ANTENNA_TUNING_HF, PM3_EOPABORTED, NULL, 0);
uint16_t volt = MeasureAntennaTuningHfData();
reply_ng(CMD_MEASURE_ANTENNA_TUNING_HF, PM3_SUCCESS, (uint8_t *)&volt, sizeof(volt));
break;
case 3:
FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF);
reply_ng(CMD_MEASURE_ANTENNA_TUNING_HF, PM3_SUCCESS, NULL, 0);
break;
default:
reply_ng(CMD_MEASURE_ANTENNA_TUNING_HF, PM3_EINVARG, NULL, 0);
break;
}
2019-03-10 03:34:41 +08:00
break;
case CMD_LISTEN_READER_FIELD:
2019-04-18 06:12:52 +08:00
ListenReaderField(packet->oldarg[0]);
2019-03-10 03:34:41 +08:00
break;
case CMD_FPGA_MAJOR_MODE_OFF: // ## FPGA Control
FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF);
SpinDelay(200);
LED_D_OFF(); // LED D indicates field ON or OFF
break;
case CMD_DOWNLOAD_BIGBUF: {
2019-03-10 03:34:41 +08:00
LED_B_ON();
uint8_t *mem = BigBuf_get_addr();
2019-04-18 06:12:52 +08:00
uint32_t startidx = packet->oldarg[0];
uint32_t numofbytes = packet->oldarg[1];
2019-03-10 03:34:41 +08:00
// arg0 = startindex
// arg1 = length bytes to transfer
// arg2 = BigBuf tracelen
2019-04-18 06:12:52 +08:00
//Dbprintf("transfer to client parameters: %" PRIu32 " | %" PRIu32 " | %" PRIu32, startidx, numofbytes, packet->oldarg[2]);
2019-03-10 03:34:41 +08:00
for (size_t i = 0; i < numofbytes; i += PM3_CMD_DATA_SIZE) {
size_t len = MIN((numofbytes - i), PM3_CMD_DATA_SIZE);
int result = reply_old(CMD_DOWNLOADED_BIGBUF, i, len, BigBuf_get_traceLen(), mem + startidx + i, len);
if (result != PM3_SUCCESS)
Dbprintf("transfer to client failed :: | bytes between %d - %d (%d) | result: %d", i, i + len, len, result);
2019-03-10 03:34:41 +08:00
}
// Trigger a finish downloading signal with an ACK frame
// iceman, when did sending samplingconfig array got attached here?!?
// arg0 = status of download transfer
// arg1 = RFU
// arg2 = tracelen?
// asbytes = samplingconfig array
2019-04-18 18:43:35 +08:00
reply_old(CMD_ACK, 1, 0, BigBuf_get_traceLen(), getSamplingConfig(), sizeof(sample_config));
2019-03-10 03:34:41 +08:00
LED_B_OFF();
break;
}
#ifdef WITH_LF
2019-03-10 03:34:41 +08:00
case CMD_UPLOAD_SIM_SAMPLES_125K: {
// iceman; since changing fpga_bitstreams clears bigbuff, Its better to call it before.
// to be able to use this one for uploading data to device
// arg1 = 0 upload for LF usage
// 1 upload for HF usage
2019-03-10 07:00:59 +08:00
#define FPGA_LF 1
2019-04-18 06:12:52 +08:00
if (packet->oldarg[1] == FPGA_LF)
2019-03-10 03:34:41 +08:00
FpgaDownloadAndGo(FPGA_BITSTREAM_LF);
else
FpgaDownloadAndGo(FPGA_BITSTREAM_HF);
uint8_t *mem = BigBuf_get_addr();
memcpy(mem + packet->oldarg[0], packet->data.asBytes, PM3_CMD_DATA_SIZE);
2019-04-18 18:43:35 +08:00
reply_old(CMD_ACK, 1, 0, 0, 0, 0);
2019-03-10 03:34:41 +08:00
break;
}
#endif
2019-03-10 03:34:41 +08:00
case CMD_DOWNLOAD_EML_BIGBUF: {
LED_B_ON();
uint8_t *mem = BigBuf_get_EM_addr();
size_t len = 0;
2019-04-18 06:12:52 +08:00
uint32_t startidx = packet->oldarg[0];
uint32_t numofbytes = packet->oldarg[1];
2019-03-10 03:34:41 +08:00
// arg0 = startindex
// arg1 = length bytes to transfer
// arg2 = RFU
for (size_t i = 0; i < numofbytes; i += PM3_CMD_DATA_SIZE) {
len = MIN((numofbytes - i), PM3_CMD_DATA_SIZE);
int result = reply_old(CMD_DOWNLOADED_EML_BIGBUF, i, len, 0, mem + startidx + i, len);
if (result != PM3_SUCCESS)
Dbprintf("transfer to client failed :: | bytes between %d - %d (%d) | result: %d", i, i + len, len, result);
2019-03-10 03:34:41 +08:00
}
// Trigger a finish downloading signal with an ACK frame
2019-04-18 18:43:35 +08:00
reply_old(CMD_ACK, 1, 0, 0, 0, 0);
2019-03-10 03:34:41 +08:00
LED_B_OFF();
break;
}
case CMD_READ_MEM:
2019-04-18 06:12:52 +08:00
ReadMem(packet->oldarg[0]);
2019-03-10 03:34:41 +08:00
break;
#ifdef WITH_FLASH
2019-03-10 03:34:41 +08:00
case CMD_FLASHMEM_SET_SPIBAUDRATE:
2019-04-18 06:12:52 +08:00
FlashmemSetSpiBaudrate(packet->oldarg[0]);
2019-03-10 03:34:41 +08:00
break;
case CMD_FLASHMEM_READ: {
LED_B_ON();
2019-04-18 06:12:52 +08:00
uint32_t startidx = packet->oldarg[0];
uint16_t len = packet->oldarg[1];
2019-03-10 03:34:41 +08:00
Dbprintf("FlashMem read | %d - %d | ", startidx, len);
size_t size = MIN(PM3_CMD_DATA_SIZE, len);
2019-03-10 03:34:41 +08:00
if (!FlashInit()) {
break;
}
uint8_t *mem = BigBuf_malloc(size);
2019-03-10 07:00:59 +08:00
for (size_t i = 0; i < len; i += size) {
2019-03-10 03:34:41 +08:00
len = MIN((len - i), size);
Dbprintf("FlashMem reading | %d | %d | %d |", startidx + i, i, len);
2019-04-07 17:36:24 +08:00
uint16_t isok = Flash_ReadDataCont(startidx + i, mem, len);
2019-03-10 07:00:59 +08:00
if (isok == len) {
2019-03-10 03:34:41 +08:00
print_result("Chunk: ", mem, len);
} else {
Dbprintf("FlashMem reading failed | %d | %d", len, isok);
break;
}
}
BigBuf_free();
FlashStop();
LED_B_OFF();
break;
}
case CMD_FLASHMEM_WRITE: {
LED_B_ON();
uint8_t isok = 0;
uint16_t res = 0;
2019-04-18 06:12:52 +08:00
uint32_t startidx = packet->oldarg[0];
uint16_t len = packet->oldarg[1];
uint8_t *data = packet->data.asBytes;
2019-03-10 03:34:41 +08:00
uint32_t tmp = startidx + len;
if (!FlashInit()) {
break;
}
Flash_CheckBusy(BUSY_TIMEOUT);
Flash_WriteEnable();
2019-03-10 07:00:59 +08:00
if (startidx == DEFAULT_T55XX_KEYS_OFFSET)
2019-03-10 03:34:41 +08:00
Flash_Erase4k(3, 0xC);
2019-03-10 07:00:59 +08:00
else if (startidx == DEFAULT_MF_KEYS_OFFSET)
2019-03-10 03:34:41 +08:00
Flash_Erase4k(3, 0xB);
else if (startidx == DEFAULT_ICLASS_KEYS_OFFSET)
Flash_Erase4k(3, 0xA);
Flash_CheckBusy(BUSY_TIMEOUT);
Flash_WriteEnable();
// inside 256b page?
2019-03-10 07:00:59 +08:00
if ((tmp & 0xFF) != 0) {
2019-03-10 03:34:41 +08:00
2019-03-10 07:00:59 +08:00
// is offset+len larger than a page
tmp = (startidx & 0xFF) + len;
if (tmp > 0xFF) {
2019-03-10 03:34:41 +08:00
2019-03-10 07:00:59 +08:00
// data spread over two pages.
2019-03-10 03:34:41 +08:00
2019-03-10 07:00:59 +08:00
// offset xxxx10,
uint8_t first_len = (~startidx & 0xFF) + 1;
2019-03-10 03:34:41 +08:00
2019-03-10 07:00:59 +08:00
// first mem page
res = Flash_WriteDataCont(startidx, data, first_len);
2019-03-10 03:34:41 +08:00
2019-03-13 05:50:29 +08:00
isok = (res == first_len) ? 1 : 0;
2019-03-10 07:00:59 +08:00
// second mem page
res = Flash_WriteDataCont(startidx + first_len, data + first_len, len - first_len);
2019-03-10 03:34:41 +08:00
2019-03-13 05:50:29 +08:00
isok &= (res == (len - first_len)) ? 1 : 0;
2019-03-10 03:34:41 +08:00
2019-03-10 07:00:59 +08:00
} else {
res = Flash_WriteDataCont(startidx, data, len);
isok = (res == len) ? 1 : 0;
}
2019-03-10 03:34:41 +08:00
} else {
res = Flash_WriteDataCont(startidx, data, len);
isok = (res == len) ? 1 : 0;
}
FlashStop();
2019-04-18 18:43:35 +08:00
reply_old(CMD_ACK, isok, 0, 0, 0, 0);
2019-03-10 03:34:41 +08:00
LED_B_OFF();
break;
}
case CMD_FLASHMEM_WIPE: {
LED_B_ON();
2019-04-18 06:12:52 +08:00
uint8_t page = packet->oldarg[0];
uint8_t initalwipe = packet->oldarg[1];
2019-03-10 03:34:41 +08:00
bool isok = false;
2019-03-10 07:00:59 +08:00
if (initalwipe) {
2019-03-10 03:34:41 +08:00
isok = Flash_WipeMemory();
2019-04-18 18:43:35 +08:00
reply_old(CMD_ACK, isok, 0, 0, 0, 0);
2019-03-10 03:34:41 +08:00
LED_B_OFF();
break;
}
2019-03-10 07:00:59 +08:00
if (page < 3)
2019-03-10 03:34:41 +08:00
isok = Flash_WipeMemoryPage(page);
2019-04-18 18:43:35 +08:00
reply_old(CMD_ACK, isok, 0, 0, 0, 0);
2019-03-10 03:34:41 +08:00
LED_B_OFF();
break;
}
case CMD_FLASHMEM_DOWNLOAD: {
LED_B_ON();
uint8_t *mem = BigBuf_malloc(PM3_CMD_DATA_SIZE);
2019-04-18 06:12:52 +08:00
uint32_t startidx = packet->oldarg[0];
uint32_t numofbytes = packet->oldarg[1];
2019-03-10 03:34:41 +08:00
// arg0 = startindex
// arg1 = length bytes to transfer
// arg2 = RFU
if (!FlashInit()) {
break;
}
for (size_t i = 0; i < numofbytes; i += PM3_CMD_DATA_SIZE) {
size_t len = MIN((numofbytes - i), PM3_CMD_DATA_SIZE);
2019-03-10 03:34:41 +08:00
2019-04-07 17:36:24 +08:00
bool isok = Flash_ReadDataCont(startidx + i, mem, len);
2019-03-10 07:00:59 +08:00
if (!isok)
2019-03-10 03:34:41 +08:00
Dbprintf("reading flash memory failed :: | bytes between %d - %d", i, len);
2019-04-18 18:43:35 +08:00
isok = reply_old(CMD_FLASHMEM_DOWNLOADED, i, len, 0, mem, len);
2019-03-10 03:34:41 +08:00
if (isok != 0)
Dbprintf("transfer to client failed :: | bytes between %d - %d", i, len);
}
2019-03-10 07:00:59 +08:00
FlashStop();
2019-03-10 03:34:41 +08:00
2019-04-18 18:43:35 +08:00
reply_old(CMD_ACK, 1, 0, 0, 0, 0);
2019-03-13 19:46:03 +08:00
BigBuf_free();
2019-03-10 03:34:41 +08:00
LED_B_OFF();
break;
}
case CMD_FLASHMEM_INFO: {
LED_B_ON();
2019-03-10 07:00:59 +08:00
rdv40_validation_t *info = (rdv40_validation_t *)BigBuf_malloc(sizeof(rdv40_validation_t));
2019-03-10 03:34:41 +08:00
bool isok = Flash_ReadData(FLASH_MEM_SIGNATURE_OFFSET, info->signature, FLASH_MEM_SIGNATURE_LEN);
if (FlashInit()) {
2019-03-10 07:00:59 +08:00
Flash_UniqueID(info->flashid);
2019-03-10 03:34:41 +08:00
FlashStop();
}
2019-04-18 18:43:35 +08:00
reply_old(CMD_ACK, isok, 0, 0, info, sizeof(rdv40_validation_t));
2019-03-10 03:34:41 +08:00
BigBuf_free();
LED_B_OFF();
break;
}
2018-04-18 22:17:49 +08:00
#endif
2019-03-10 03:34:41 +08:00
case CMD_SET_LF_DIVISOR:
FpgaDownloadAndGo(FPGA_BITSTREAM_LF);
2019-04-18 06:12:52 +08:00
FpgaSendCommand(FPGA_CMD_SET_DIVISOR, packet->oldarg[0]);
2019-03-10 03:34:41 +08:00
break;
case CMD_SET_ADC_MUX:
2019-04-18 06:12:52 +08:00
switch (packet->oldarg[0]) {
2019-03-10 07:00:59 +08:00
case 0:
SetAdcMuxFor(GPIO_MUXSEL_LOPKD);
break;
case 2:
SetAdcMuxFor(GPIO_MUXSEL_HIPKD);
break;
#ifndef WITH_FPC_USART
2019-03-10 07:00:59 +08:00
case 1:
SetAdcMuxFor(GPIO_MUXSEL_LORAW);
break;
case 3:
SetAdcMuxFor(GPIO_MUXSEL_HIRAW);
break;
#endif
2019-03-10 07:00:59 +08:00
}
2019-03-10 03:34:41 +08:00
break;
case CMD_VERSION:
SendVersion();
break;
case CMD_STATUS:
SendStatus();
break;
case CMD_CAPABILITIES:
SendCapabilities();
break;
2019-03-10 03:34:41 +08:00
case CMD_PING:
2019-05-08 05:35:09 +08:00
reply_ng(CMD_PING, PM3_SUCCESS, packet->data.asBytes, packet->length);
2019-03-10 03:34:41 +08:00
break;
#ifdef WITH_LCD
2019-03-10 03:34:41 +08:00
case CMD_LCD_RESET:
LCDReset();
break;
case CMD_LCD:
2019-04-18 06:12:52 +08:00
LCDSend(packet->oldarg[0]);
2019-03-10 03:34:41 +08:00
break;
#endif
2019-03-10 03:34:41 +08:00
case CMD_SETUP_WRITE:
case CMD_FINISH_WRITE:
case CMD_HARDWARE_RESET:
usb_disable();
// (iceman) why this wait?
SpinDelay(1000);
AT91C_BASE_RSTC->RSTC_RCR = RST_CONTROL_KEY | AT91C_RSTC_PROCRST;
// We're going to reset, and the bootrom will take control.
2019-03-10 07:00:59 +08:00
for (;;) {}
2019-03-10 03:34:41 +08:00
break;
case CMD_START_FLASH:
2019-03-10 07:00:59 +08:00
if (common_area.flags.bootrom_present) {
2019-03-10 03:34:41 +08:00
common_area.command = COMMON_AREA_COMMAND_ENTER_FLASH_MODE;
}
usb_disable();
AT91C_BASE_RSTC->RSTC_RCR = RST_CONTROL_KEY | AT91C_RSTC_PROCRST;
// We're going to flash, and the bootrom will take control.
2019-03-10 07:00:59 +08:00
for (;;) {}
2019-03-10 03:34:41 +08:00
break;
case CMD_DEVICE_INFO: {
uint32_t dev_info = DEVICE_INFO_FLAG_OSIMAGE_PRESENT | DEVICE_INFO_FLAG_CURRENT_MODE_OS;
if (common_area.flags.bootrom_present) {
dev_info |= DEVICE_INFO_FLAG_BOOTROM_PRESENT;
}
2019-04-18 18:43:35 +08:00
reply_old(CMD_DEVICE_INFO, dev_info, 0, 0, 0, 0);
2019-03-10 03:34:41 +08:00
break;
2019-03-10 07:00:59 +08:00
}
2019-03-10 03:34:41 +08:00
default:
2019-04-18 06:12:52 +08:00
Dbprintf("%s: 0x%04x", "unknown command:", packet->cmd);
2019-03-10 03:34:41 +08:00
break;
}
}
void __attribute__((noreturn)) AppMain(void) {
2019-03-10 03:34:41 +08:00
SpinDelay(100);
clear_trace();
2019-03-10 07:00:59 +08:00
if (common_area.magic != COMMON_AREA_MAGIC || common_area.version != 1) {
2019-03-10 03:34:41 +08:00
/* Initialize common area */
memset(&common_area, 0, sizeof(common_area));
common_area.magic = COMMON_AREA_MAGIC;
common_area.version = 1;
}
common_area.flags.osimage_present = 1;
2019-03-10 03:34:41 +08:00
LEDsoff();
2019-03-10 03:34:41 +08:00
// The FPGA gets its clock from us from PCK0 output, so set that up.
AT91C_BASE_PIOA->PIO_BSR = GPIO_PCK0;
AT91C_BASE_PIOA->PIO_PDR = GPIO_PCK0;
AT91C_BASE_PMC->PMC_SCER |= AT91C_PMC_PCK0;
// PCK0 is PLL clock / 4 = 96Mhz / 4 = 24Mhz
AT91C_BASE_PMC->PMC_PCKR[0] = AT91C_PMC_CSS_PLL_CLK | AT91C_PMC_PRES_CLK_4; // 4 for 24Mhz pck0, 2 for 48 MHZ pck0
AT91C_BASE_PIOA->PIO_OER = GPIO_PCK0;
2019-03-10 03:34:41 +08:00
// Reset SPI
AT91C_BASE_SPI->SPI_CR = AT91C_SPI_SWRST;
AT91C_BASE_SPI->SPI_CR = AT91C_SPI_SWRST; // errata says it needs twice to be correctly set.
2019-03-10 03:34:41 +08:00
// Reset SSC
AT91C_BASE_SSC->SSC_CR = AT91C_SSC_SWRST;
2019-03-10 03:34:41 +08:00
// Configure MUX
SetAdcMuxFor(GPIO_MUXSEL_HIPKD);
2019-03-10 03:34:41 +08:00
// Load the FPGA image, which we have stored in our flash.
// (the HF version by default)
FpgaDownloadAndGo(FPGA_BITSTREAM_HF);
2019-03-10 03:34:41 +08:00
StartTickCount();
#ifdef WITH_LCD
2019-03-10 03:34:41 +08:00
LCDInit();
#endif
#ifdef WITH_SMARTCARD
2019-03-10 03:34:41 +08:00
I2C_init();
#endif
#ifdef WITH_FPC_USART
2019-03-10 03:34:41 +08:00
usart_init();
#endif
2019-03-10 03:34:41 +08:00
// This is made as late as possible to ensure enumeration without timeout
// against device such as http://www.hobbytronics.co.uk/usb-host-board-v2
usb_disable();
usb_enable();
#ifdef WITH_FLASH
// If flash is not present, BUSY_TIMEOUT kicks in, let's do it after USB
loadT55xxConfig();
#endif
2019-03-10 07:00:59 +08:00
for (;;) {
2019-03-10 03:34:41 +08:00
WDT_HIT();
// Check if there is a packet available
2019-04-18 18:43:35 +08:00
PacketCommandNG rx;
memset(&rx.data, 0, sizeof(rx.data));
int ret = receive_ng(&rx);
if (ret == PM3_SUCCESS) {
2019-04-18 18:43:35 +08:00
PacketReceived(&rx);
2019-04-20 16:34:54 +08:00
} else if (ret != PM3_ENODATA) {
2019-05-08 07:35:51 +08:00
Dbprintf("Error in frame reception: %d %s", ret, (ret == PM3_EIO) ? "PM3_EIO" : "");
2019-04-24 21:57:24 +08:00
// TODO if error, shall we resync ?
}
2019-03-10 03:34:41 +08:00
// Press button for one second to enter a possible standalone mode
button_status = BUTTON_HELD(1000);
if (button_status == BUTTON_HOLD) {
2019-03-10 07:00:59 +08:00
/*
* So this is the trigger to execute a standalone mod. Generic entrypoint by following the standalone/standalone.h headerfile
* All standalone mod "main loop" should be the RunMod() function.
*/
2019-03-10 03:34:41 +08:00
RunMod();
}
}
}