mirror of
https://github.com/RfidResearchGroup/proxmark3.git
synced 2024-11-14 13:44:49 +08:00
55 lines
1.6 KiB
INI
55 lines
1.6 KiB
INI
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## General OpenOCD configuration
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# Ports
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telnet_port 4444
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gdb_port 3333
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## Interface configuration section
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# Interface
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# you can use
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#source [find interface/ftdi/dp_busblaster.cfg]
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# or
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interface ftdi
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ftdi_device_desc "Dual RS232-HS"
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ftdi_vid_pid 0x0403 0x6010
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ftdi_layout_init 0x0c08 0x0f1b
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ftdi_layout_signal nTRST -data 0x0100 -noe 0x0400
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ftdi_layout_signal nSRST -data 0x0200 -noe 0x0800
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adapter_khz 1000
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## Chipset configuration section
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# use combined on interfaces or targets that can't set TRST/SRST separately
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reset_config srst_only srst_pulls_trst
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jtag newtap sam7x cpu -irlen 4 -ircapture 0x1 -irmask 0xf -expected-id 0x3f0f0f0f
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target create sam7x.cpu arm7tdmi -endian little -chain-position sam7x.cpu
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sam7x.cpu configure -event reset-init {
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soft_reset_halt
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mww 0xfffffd00 0xa5000004 # RSTC_CR: Reset peripherals
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mww 0xfffffd44 0x00008000 # WDT_MR: disable watchdog
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mww 0xfffffd08 0xa5000001 # RSTC_MR enable user reset
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mww 0xfffffc20 0x00005001 # CKGR_MOR : enable the main oscillator
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sleep 10
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mww 0xfffffc2c 0x000b1c02 # CKGR_PLLR: 16MHz * 12/2 = 96MHz
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sleep 10
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mww 0xfffffc30 0x00000007 # PMC_MCKR : MCK = PLL / 2 = 48 MHz
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sleep 10
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mww 0xffffff60 0x00480100 # MC_FMR: flash mode (FWS=1,FMCN=72)
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sleep 100
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}
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# GDB can also flash my flash!
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gdb_memory_map enable
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gdb_breakpoint_override hard
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#armv4_5 core_state arm
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sam7x.cpu configure -work-area-virt 0 -work-area-phys 0x00200000 -work-area-size 0x10000 -work-area-backup 0
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flash bank sam7x512.flash.0 at91sam7 0 0 0 0 sam7x.cpu 0 0 0 0 0 0 0 18432
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flash bank sam7x512.flash.1 at91sam7 0 0 0 0 sam7x.cpu 1 0 0 0 0 0 0 18432
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