2015-10-28 04:47:21 +08:00
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#include "proxmark3.h"
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#include "apps.h"
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#include "BigBuf.h"
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#include "util.h"
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2019-03-10 03:34:41 +08:00
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#include "usb_cdc.h" // for usb_poll_validate_length
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2015-10-28 04:47:21 +08:00
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2019-03-12 20:15:39 +08:00
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static void RAMFUNC optimizedSniff(void);
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2015-10-28 04:47:21 +08:00
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2019-03-12 20:15:39 +08:00
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static void RAMFUNC optimizedSniff(void) {
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2019-03-10 03:34:41 +08:00
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int n = BigBuf_max_traceLen() / sizeof(uint16_t); // take all memory
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2015-10-28 04:47:21 +08:00
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2019-03-10 03:34:41 +08:00
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uint16_t *dest = (uint16_t *)BigBuf_get_addr();
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2019-03-10 07:00:59 +08:00
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uint16_t *destend = dest + n - 1;
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2015-10-28 04:47:21 +08:00
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2019-03-10 03:34:41 +08:00
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// Reading data loop
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2019-03-10 07:00:59 +08:00
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while (dest <= destend) {
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if (AT91C_BASE_SSC->SSC_SR & AT91C_SSC_RXRDY) {
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2019-03-10 03:34:41 +08:00
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*dest = (uint16_t)(AT91C_BASE_SSC->SSC_RHR);
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dest++;
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}
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}
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2019-03-09 18:51:46 +08:00
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//setting tracelen - important! it was set by buffer overflow before
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2019-03-10 07:00:59 +08:00
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set_tracelen(BigBuf_max_traceLen());
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2015-10-28 04:47:21 +08:00
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}
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2019-03-12 20:15:39 +08:00
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void HfSniff(int samplesToSkip, int triggersToSkip) {
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2019-03-10 07:00:59 +08:00
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BigBuf_free();
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BigBuf_Clear();
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2019-03-09 15:59:13 +08:00
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2019-03-10 03:34:41 +08:00
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Dbprintf("Skipping first %d sample pairs, Skipping %d triggers.\n", samplesToSkip, triggersToSkip);
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int trigger_cnt = 0;
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2016-03-12 16:03:28 +08:00
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2019-03-10 03:34:41 +08:00
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LED_D_ON();
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2018-08-13 03:54:31 +08:00
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2019-03-10 03:34:41 +08:00
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FpgaDownloadAndGo(FPGA_BITSTREAM_HF);
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2019-03-09 15:59:13 +08:00
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2019-03-10 03:34:41 +08:00
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SetAdcMuxFor(GPIO_MUXSEL_HIPKD);
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2019-03-09 15:59:13 +08:00
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2019-03-10 03:34:41 +08:00
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// Set up the synchronous serial port
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FpgaSetupSsc();
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2018-08-13 03:54:31 +08:00
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2019-03-10 03:34:41 +08:00
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// Setting Frame Mode For better performance on high speed data transfer.
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AT91C_BASE_SSC->SSC_RFMR = SSC_FRAME_MODE_BITS_IN_WORD(16);
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2019-03-09 15:59:13 +08:00
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2019-03-10 03:34:41 +08:00
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FpgaWriteConfWord(FPGA_MAJOR_MODE_HF_SNOOP);
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2017-10-08 20:56:04 +08:00
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SpinDelay(100);
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2019-03-09 15:59:13 +08:00
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2019-03-10 03:34:41 +08:00
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uint16_t r = 0;
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2019-03-10 07:00:59 +08:00
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while (!BUTTON_PRESS() && !usb_poll_validate_length()) {
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2019-03-10 03:34:41 +08:00
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WDT_HIT();
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2019-03-09 15:59:13 +08:00
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2019-03-10 03:34:41 +08:00
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if (AT91C_BASE_SSC->SSC_SR & (AT91C_SSC_RXRDY)) {
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r = (uint16_t)AT91C_BASE_SSC->SSC_RHR;
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r = MAX(r & 0xff, r >> 8);
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2018-08-13 03:54:31 +08:00
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if (r >= 180) { // 0xB4 ??
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2017-10-08 20:56:04 +08:00
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if (++trigger_cnt > triggersToSkip)
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2019-03-10 07:00:59 +08:00
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break;
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2019-03-10 03:34:41 +08:00
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}
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}
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}
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if (!BUTTON_PRESS()) {
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int waitcount = samplesToSkip; // lets wait 40000 ticks of pck0
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2019-03-10 07:00:59 +08:00
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while (waitcount != 0) {
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2019-03-10 03:34:41 +08:00
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2019-03-10 07:00:59 +08:00
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if (AT91C_BASE_SSC->SSC_SR & (AT91C_SSC_RXRDY))
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2019-03-10 03:34:41 +08:00
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waitcount--;
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}
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2019-03-12 20:15:39 +08:00
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optimizedSniff();
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2019-03-10 03:34:41 +08:00
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Dbprintf("Trigger kicked! Value: %d, Dumping Samples Hispeed now.", r);
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}
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//Resetting Frame mode (First set in fpgaloader.c)
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AT91C_BASE_SSC->SSC_RFMR = SSC_FRAME_MODE_BITS_IN_WORD(8) | AT91C_SSC_MSBF | SSC_FRAME_MODE_WORDS_PER_TRANSFER(0);
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2019-03-12 20:15:39 +08:00
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DbpString("HF Sniffing end");
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2019-03-10 03:34:41 +08:00
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FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF);
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LED_D_OFF();
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2015-10-28 04:47:21 +08:00
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}
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