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CHG: spelling misstake
CHG: code cleanup. unused function.
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parent
fdf1566c23
commit
0ea06dbe9b
2 changed files with 9 additions and 7 deletions
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@ -251,7 +251,7 @@ static void DownloadFPGA_byte(unsigned char w) {
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// Download the fpga image starting at current stream position with length FpgaImageLen bytes
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static void DownloadFPGA(int bitstream_version, int FpgaImageLen, z_streamp compressed_fpga_stream, uint8_t *output_buffer) {
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int i=0;
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int i = 0;
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AT91C_BASE_PIOA->PIO_OER = GPIO_FPGA_ON;
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AT91C_BASE_PIOA->PIO_PER = GPIO_FPGA_ON;
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@ -289,7 +289,7 @@ static void DownloadFPGA(int bitstream_version, int FpgaImageLen, z_streamp comp
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SpinDelay(50);
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HIGH(GPIO_FPGA_NPROGRAM);
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i=100000;
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i = 100000;
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// wait for FPGA ready to accept data signal
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while ((i) && ( !(AT91C_BASE_PIOA->PIO_PDSR & GPIO_FPGA_NINIT ) ) ) {
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i--;
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@ -302,7 +302,7 @@ static void DownloadFPGA(int bitstream_version, int FpgaImageLen, z_streamp comp
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return;
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}
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for(i = 0; i < FpgaImageLen; i++) {
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for (i = 0; i < FpgaImageLen; i++) {
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int b = get_from_fpga_stream(bitstream_version, compressed_fpga_stream, output_buffer);
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if (b < 0) {
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Dbprintf("Error %d during FpgaDownload", b);
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@ -312,7 +312,7 @@ static void DownloadFPGA(int bitstream_version, int FpgaImageLen, z_streamp comp
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}
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// continue to clock FPGA until ready signal goes high
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i=100000;
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i = 100000;
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while ( (i--) && ( !(AT91C_BASE_PIOA->PIO_PDSR & GPIO_FPGA_DONE ) ) ) {
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HIGH(GPIO_FPGA_CCLK);
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LOW(GPIO_FPGA_CCLK);
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@ -525,7 +525,7 @@ void SetAdcMuxFor(uint32_t whichGpio) {
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}
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void Fpga_print_status(void) {
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DbpString("Fgpa");
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DbpString("Fpga");
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switch(downloaded_bitstream) {
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case FPGA_BITSTREAM_HF: DbpString(" mode....................HF"); break;
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case FPGA_BITSTREAM_LF: DbpString(" mode....................LF"); break;
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@ -541,6 +541,7 @@ int FpgaGetCurrent() {
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// log message
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// if HF, Disable SSC DMA
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// turn off trace and leds off.
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/*
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void switch_off() {
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if (MF_DBGLEVEL > 3) Dbprintf("switch_off");
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FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF);
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@ -550,3 +551,4 @@ void switch_off() {
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set_tracing(false);
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LEDsoff();
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}
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*/
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@ -32,7 +32,7 @@ int FpgaGetCurrent();
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#define FpgaEnableSscDma(void) AT91C_BASE_PDC_SSC->PDC_PTCR = AT91C_PDC_RXTEN;
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void SetAdcMuxFor(uint32_t whichGpio);
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extern void switch_off();
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//extern void switch_off();
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// definitions for multiple FPGA config files support
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#define FPGA_BITSTREAM_MAX 2 // the total number of FPGA bitstreams (configs)
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