mirror of
https://github.com/RfidResearchGroup/proxmark3.git
synced 2025-02-13 10:43:01 +08:00
ADD: added the 'max frame size' parameter set, valid sizes: 16|24|32|40|48|64|96|128|256
it can be verified by setting debuglevel to 3 or more.
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b62cbadb61
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1 changed files with 90 additions and 60 deletions
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@ -11,7 +11,8 @@
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#include "iso14443b.h"
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#ifndef FWT_TIMEOUT_14B
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# define FWT_TIMEOUT_14B 60000
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// defaults to 2000ms
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# define FWT_TIMEOUT_14B 35312
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#endif
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#ifndef ISO14443B_DMA_BUFFER_SIZE
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# define ISO14443B_DMA_BUFFER_SIZE 256
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@ -37,29 +38,19 @@
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// 4sample
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#define SEND4STUFFBIT(x) ToSendStuffBit(x);ToSendStuffBit(x);ToSendStuffBit(x);ToSendStuffBit(x);
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//#define SEND4STUFFBIT(x) ToSendStuffBit(x);
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// iceman, this threshold value, what makes 8 a good amplituted for this IQ values?
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#ifndef SUBCARRIER_DETECT_THRESHOLD
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# define SUBCARRIER_DETECT_THRESHOLD 6
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#endif
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static void iso14b_set_timeout(uint32_t timeout);
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static void iso14b_set_maxframesize(uint16_t size);
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static void switch_off(void);
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// the block number for the ISO14443-4 PCB (used with APDUs)
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static uint8_t pcb_blocknum = 0;
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static uint32_t iso14b_timeout = FWT_TIMEOUT_14B;
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// param timeout is in ftw_
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void iso14b_set_timeout(uint32_t timeout) {
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// 9.4395us = 1etu.
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// clock is about 1.5 us
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iso14b_timeout = timeout;
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if(MF_DBGLEVEL >= 3) Dbprintf("ISO14443B Timeout set to %ld fwt", iso14b_timeout);
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}
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static void switch_off(void){
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if (MF_DBGLEVEL > 3) Dbprintf("switch_off");
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FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF);
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SpinDelay(100);
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FpgaDisableSscDma();
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set_tracing(FALSE);
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LEDsoff();
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}
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//=============================================================================
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// An ISO 14443 Type B tag. We listen for commands from the reader, using
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@ -150,6 +141,44 @@ static void DemodInit(uint8_t *data) {
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// memset(Demod.output, 0x00, MAX_FRAME_SIZE);
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}
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/*
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* 9.4395 us = 1 ETU and clock is about 1.5 us
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* 13560000Hz
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* 1000ms/s
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* timeout in ETUs (time to transfer 1 bit, 9.4395 us)
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*
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* Formula to calculate FWT (in ETUs) by timeout (in ms):
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* fwt = 13560000 * 1000 / (8*16) * timeout;
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* Sample: 3sec == 3000ms
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* 13560000 * 1000 / (8*16) * 3000 ==
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* 13560000000 / 384000 = 35312 FWT
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* @param timeout is in frame wait time, fwt, measured in ETUs
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*/
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static void iso14b_set_timeout(uint32_t timeout) {
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#define MAX_TIMEOUT 40542464 // 13560000Hz * 1000ms / (2^32-1) * (8*16)
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if(timeout > MAX_TIMEOUT)
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timeout = MAX_TIMEOUT;
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iso14b_timeout = timeout;
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if(MF_DBGLEVEL >= 3) Dbprintf("ISO14443B Timeout set to %ld fwt", iso14b_timeout);
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}
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static void iso14b_set_maxframesize(uint16_t size) {
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if (size > 256)
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size = MAX_FRAME_SIZE;
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Uart.byteCntMax = size;
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if(MF_DBGLEVEL >= 3) Dbprintf("ISO14443B Max frame size set to %d bytes", Uart.byteCntMax);
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}
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static void switch_off(void){
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if (MF_DBGLEVEL > 3) Dbprintf("switch_off");
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FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF);
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SpinDelay(100);
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FpgaDisableSscDma();
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set_tracing(FALSE);
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LEDsoff();
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}
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void AppendCrc14443b(uint8_t* data, int len) {
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ComputeCrc14443(CRC_14443_B, data, len, data+len, data+len+1);
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}
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@ -298,9 +327,9 @@ static void CodeIso14443bAsTag(const uint8_t *cmd, int len) {
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* false if we are still waiting for some more
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*/
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static RAMFUNC int Handle14443bReaderUartBit(uint8_t bit) {
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switch(Uart.state) {
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switch (Uart.state) {
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case STATE_UNSYNCD:
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if(!bit) {
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if (!bit) {
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// we went low, so this could be the beginning of an SOF
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Uart.state = STATE_GOT_FALLING_EDGE_OF_SOF;
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Uart.posCnt = 0;
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@ -310,9 +339,9 @@ static RAMFUNC int Handle14443bReaderUartBit(uint8_t bit) {
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case STATE_GOT_FALLING_EDGE_OF_SOF:
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Uart.posCnt++;
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if(Uart.posCnt == 2) { // sample every 4 1/fs in the middle of a bit
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if(bit) {
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if(Uart.bitCnt > 9) {
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if (Uart.posCnt == 2) { // sample every 4 1/fs in the middle of a bit
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if (bit) {
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if (Uart.bitCnt > 9) {
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// we've seen enough consecutive
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// zeros that it's a valid SOF
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Uart.posCnt = 0;
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@ -320,8 +349,7 @@ static RAMFUNC int Handle14443bReaderUartBit(uint8_t bit) {
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Uart.state = STATE_AWAITING_START_BIT;
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LED_A_ON(); // Indicate we got a valid SOF
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} else {
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// didn't stay down long enough
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// before going high, error
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// didn't stay down long enough before going high, error
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Uart.state = STATE_UNSYNCD;
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}
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} else {
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@ -329,10 +357,9 @@ static RAMFUNC int Handle14443bReaderUartBit(uint8_t bit) {
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}
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Uart.bitCnt++;
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}
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if(Uart.posCnt >= 4) Uart.posCnt = 0;
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if(Uart.bitCnt > 12) {
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// Give up if we see too many zeros without
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// a one, too.
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if (Uart.posCnt >= 4) Uart.posCnt = 0;
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if (Uart.bitCnt > 12) {
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// Give up if we see too many zeros without a one, too.
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LED_A_OFF();
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Uart.state = STATE_UNSYNCD;
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}
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@ -340,10 +367,9 @@ static RAMFUNC int Handle14443bReaderUartBit(uint8_t bit) {
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case STATE_AWAITING_START_BIT:
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Uart.posCnt++;
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if(bit) {
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if(Uart.posCnt > 50/2) { // max 57us between characters = 49 1/fs, max 3 etus after low phase of SOF = 24 1/fs
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// stayed high for too long between
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// characters, error
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if (bit) {
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if (Uart.posCnt > 50/2) { // max 57us between characters = 49 1/fs, max 3 etus after low phase of SOF = 24 1/fs
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// stayed high for too long between characters, error
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Uart.state = STATE_UNSYNCD;
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}
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} else {
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@ -357,26 +383,26 @@ static RAMFUNC int Handle14443bReaderUartBit(uint8_t bit) {
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case STATE_RECEIVING_DATA:
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Uart.posCnt++;
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if(Uart.posCnt == 2) {
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if (Uart.posCnt == 2) {
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// time to sample a bit
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Uart.shiftReg >>= 1;
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if(bit) {
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if (bit) {
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Uart.shiftReg |= 0x200;
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}
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Uart.bitCnt++;
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}
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if(Uart.posCnt >= 4) {
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if (Uart.posCnt >= 4) {
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Uart.posCnt = 0;
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}
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if(Uart.bitCnt == 10) {
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if((Uart.shiftReg & 0x200) && !(Uart.shiftReg & 0x001))
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if (Uart.bitCnt == 10) {
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if ((Uart.shiftReg & 0x200) && !(Uart.shiftReg & 0x001))
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{
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// this is a data byte, with correct
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// start and stop bits
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Uart.output[Uart.byteCnt] = (Uart.shiftReg >> 1) & 0xff;
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Uart.byteCnt++;
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if(Uart.byteCnt >= Uart.byteCntMax) {
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if (Uart.byteCnt >= Uart.byteCntMax) {
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// Buffer overflowed, give up
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LED_A_OFF();
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Uart.state = STATE_UNSYNCD;
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@ -389,9 +415,9 @@ static RAMFUNC int Handle14443bReaderUartBit(uint8_t bit) {
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// this is an EOF byte
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LED_A_OFF(); // Finished receiving
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Uart.state = STATE_UNSYNCD;
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if (Uart.byteCnt != 0) {
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if (Uart.byteCnt != 0)
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return TRUE;
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}
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} else {
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// this is an error
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LED_A_OFF();
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Uart.state = STATE_UNSYNCD;
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break;
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}
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return FALSE;
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}
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@ -716,13 +741,9 @@ void SimulateIso14443bTag(uint32_t pupi) {
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* false if we are still waiting for some more
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*
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*/
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// iceman, this threshold value, what makes 8 a good amplituted for this IQ values?
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#ifndef SUBCARRIER_DETECT_THRESHOLD
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# define SUBCARRIER_DETECT_THRESHOLD 6
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#endif
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static RAMFUNC int Handle14443bTagSamplesDemod(int ci, int cq) {
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int v = 0, myI = 0, myQ = 0;
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int v = 0, myI = ABS(ci), myQ = ABS(cq);
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// The soft decision on the bit uses an estimate of just the
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// quadrant of the reference angle, not the exact angle.
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#define MAKE_SOFT_DECISION() { \
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@ -774,8 +795,6 @@ static RAMFUNC int Handle14443bTagSamplesDemod(int ci, int cq) {
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//note: couldn't we just use MAX(ABS(ci),ABS(cq)) + (MIN(ABS(ci),ABS(cq))/2) from common.h - marshmellow
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#define CHECK_FOR_SUBCARRIER() { \
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myI = ABS(ci); \
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myQ = ABS(cq); \
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v = MAX(myI, myQ) + (MIN(myI, myQ) >> 1); \
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}
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@ -895,18 +914,19 @@ static RAMFUNC int Handle14443bTagSamplesDemod(int ci, int cq) {
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uint16_t s = Demod.shiftReg;
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// stop bit == '1', start bit == '0'
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if((s & 0x200) && !(s & 0x001)) {
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uint8_t b = (s >> 1);
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Demod.output[Demod.len] = b;
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if ((s & 0x200) && (s & 0x001) == 0 ) {
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// left shift to drop the startbit
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Demod.output[Demod.len] = (s >> 1) & 0xFF;
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++Demod.len;
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Demod.state = DEMOD_AWAITING_START_BIT;
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} else {
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// this one is a bit hard, either its a correc byte or its unsynced.
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Demod.state = DEMOD_UNSYNCD;
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Demod.endTime = GetCountSspClk();
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LED_C_OFF();
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// This is EOF (start, stop and all data bits == '0'
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if(s == 0) return TRUE;
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if (s == 0) return TRUE;
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}
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}
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Demod.posCount = 0;
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static void GetTagSamplesFor14443bDemod() {
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bool gotFrame = FALSE, finished = FALSE;
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int lastRxCounter = ISO14443B_DMA_BUFFER_SIZE;
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int ci = 0, cq = 0, samples = 0;
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int ci = 0, cq = 0;
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uint32_t time_0 = 0, time_stop = 0;
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BigBuf_free();
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@ -963,8 +983,6 @@ static void GetTagSamplesFor14443bDemod() {
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ci = upTo[0] >> 1;
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cq = upTo[1] >> 1;
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upTo += 2;
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samples += 2;
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lastRxCounter -= 2;
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// restart DMA buffer to receive again.
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@ -976,7 +994,6 @@ static void GetTagSamplesFor14443bDemod() {
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}
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// https://github.com/Proxmark/proxmark3/issues/103
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//gotFrame = Handle14443bTagSamplesDemod(ci & 0xfe, cq & 0xfe);
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gotFrame = Handle14443bTagSamplesDemod(ci, cq);
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time_stop = GetCountSspClk() - time_0;
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@ -1286,9 +1303,22 @@ uint8_t iso14443b_select_card(iso14b_card_select_t *card )
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if ( crc[0] != Demod.output[1] || crc[1] != Demod.output[2] )
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return 3;
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// CID
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if (card) {
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// CID
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card->cid = Demod.output[0];
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// MAX FRAME
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uint16_t maxFrame = card->atqb[5] >> 4;
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if (maxFrame < 5) maxFrame = 8 * maxFrame + 16;
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else if (maxFrame == 5) maxFrame = 64;
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else if (maxFrame == 6) maxFrame = 96;
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else if (maxFrame == 7) maxFrame = 128;
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else if (maxFrame == 8) maxFrame = 256;
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else maxFrame = 257;
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iso14b_set_maxframesize(maxFrame);
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// FWT
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uint8_t fwt = card->atqb[6] >> 4;
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if ( fwt < 16 ){
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uint32_t fwt_time = (302 << fwt);
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