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chg: OR in values.

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Chris 2018-07-02 18:54:12 +02:00
parent dfa4f62ab6
commit 35b7989b1c
3 changed files with 3 additions and 9 deletions
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2
bootrom/bootrom.c
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@ -29,7 +29,7 @@ static void ConfigClocks(void) {
// slow clock runs at 32Khz typical regardless of crystal
// enable system clock and USB clock
AT91C_BASE_PMC->PMC_SCER = AT91C_PMC_PCK | AT91C_PMC_UDP;
AT91C_BASE_PMC->PMC_SCER |= AT91C_PMC_PCK | AT91C_PMC_UDP;
// enable the clock to the following peripherals
AT91C_BASE_PMC->PMC_PCER =

2
common/usb_cdc.c
View file

@ -489,7 +489,7 @@ void usb_enable() {
// Specific Chip USB Initialisation
// Enables the 48MHz USB clock UDPCK and System Peripheral USB Clock
AT91C_BASE_PMC->PMC_SCER = AT91C_PMC_UDP;
AT91C_BASE_PMC->PMC_SCER |= AT91C_PMC_UDP;
AT91C_BASE_PMC->PMC_PCER = (1 << AT91C_ID_UDP);
AT91C_BASE_UDP->UDP_FADDR = 0;

8
include/config_gpio.h
View file

@ -36,16 +36,10 @@
#define GPIO_MUXSEL_HIPKD AT91C_PIO_PA19
#define GPIO_MUXSEL_LOPKD AT91C_PIO_PA20
// RDV40 has no HIRAW/LORAW, its used for FPC
#define GPIO_MUXSEL_HIRAW AT91C_PIO_PA21
#define GPIO_MUXSEL_LORAW AT91C_PIO_PA22
// RDV40 has no HIRAW/LORAW, its used for FPC
#ifdef WITH_FPC
#define GPIO_FPC_RDX AT91C_PA21_RXD1
#define GPIO_FPC_TDX AT91C_PA22_TXD1
#endif
#define GPIO_BUTTON AT91C_PIO_PA23
#define GPIO_USB_PU AT91C_PIO_PA24
#define GPIO_RELAY AT91C_PIO_PA25