From 3edd6b5b36671b11bcc1fb0a170a85353756392a Mon Sep 17 00:00:00 2001 From: pieterg Date: Thu, 18 Nov 2021 12:20:09 +0100 Subject: [PATCH] armsrc/felica: fix crc offsets in felica_sim_lite the sync bytes should not be included in the crc calculation (and the crc bytes should be placed at the end of the response buffers) --- armsrc/felica.c | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/armsrc/felica.c b/armsrc/felica.c index 9eacea99d..703786949 100644 --- a/armsrc/felica.c +++ b/armsrc/felica.c @@ -681,9 +681,9 @@ void felica_sim_lite(uint8_t *uid) { } // calculate and set CRC - AddCrc(resp_poll0, resp_poll0[2]); - AddCrc(resp_poll1, resp_poll1[2]); - AddCrc(resp_readblk, resp_readblk[2]); + AddCrc(&resp_poll0[2], resp_poll0[2]); + AddCrc(&resp_poll1[2], resp_poll1[2]); + AddCrc(&resp_readblk[2], resp_readblk[2]); iso18092_setup(FPGA_HF_ISO18092_FLAG_NOMOD);