diff --git a/tools/at91sam7s256-jlink.cfg b/tools/at91sam7s256-jlink.cfg
new file mode 100644
index 000000000..c022c59a1
--- /dev/null
+++ b/tools/at91sam7s256-jlink.cfg
@@ -0,0 +1,38 @@
+#define our ports
+telnet_port 4444
+gdb_port 3333
+
+interface jlink
+transport select jtag
+adapter_khz 1000
+
+#reset_config <signals> [combination] [trst_type] [srst_type]
+reset_config srst_only srst_pulls_trst
+
+jtag newtap sam7x cpu -irlen 4 -ircapture 0x1 -irmask 0xf -expected-id 0x3f0f0f0f
+
+target create sam7x.cpu arm7tdmi -endian little -chain-position sam7x.cpu
+
+sam7x.cpu configure -event reset-init {
+	soft_reset_halt
+	mww 0xfffffd00 0xa5000004	# RSTC_CR: Reset peripherals
+	mww 0xfffffd44 0x00008000	# WDT_MR: disable watchdog
+	mww 0xfffffd08 0xa5000001	# RSTC_MR enable user reset
+	mww 0xfffffc20 0x00005001	# CKGR_MOR : enable the main oscillator
+	sleep 10
+	mww 0xfffffc2c 0x000b1c02	# CKGR_PLLR: 16MHz * 12/2 = 96MHz
+	sleep 10
+	mww 0xfffffc30 0x00000007	# PMC_MCKR : MCK = PLL / 2 = 48 MHz
+	sleep 10
+	mww 0xffffff60 0x00480100	# MC_FMR: flash mode (FWS=1,FMCN=72)
+	sleep 100
+}
+
+gdb_memory_map enable
+#gdb_breakpoint_override hard
+#armv4_5 core_state arm
+
+sam7x.cpu configure -work-area-virt 0 -work-area-phys 0x00200000 -work-area-size 0x10000 -work-area-backup 0
+#flash bank sam7x.flash.0 at91sam7 0x100000 0x40000 0 4 sam7x.cpu
+flash bank sam7x.flash.0 at91sam7 0 0 0 0 sam7x.cpu 0 0 0 0 0 0 0 18432
+flash bank sam7x.flash.1 at91sam7 0 0 0 0 sam7x.cpu 1 0 0 0 0 0 0 18432
diff --git a/tools/at91sam7s512-jlink.cfg b/tools/at91sam7s512-jlink.cfg
new file mode 100644
index 000000000..8582dc02b
--- /dev/null
+++ b/tools/at91sam7s512-jlink.cfg
@@ -0,0 +1,38 @@
+#define our ports
+telnet_port 4444
+gdb_port 3333
+
+interface jlink
+transport select jtag
+adapter_khz 1000
+
+#reset_config <signals> [combination] [trst_type] [srst_type]
+reset_config srst_only srst_pulls_trst
+
+jtag newtap sam7x cpu -irlen 4 -ircapture 0x1 -irmask 0xf -expected-id 0x3f0f0f0f
+
+target create sam7x.cpu arm7tdmi -endian little -chain-position sam7x.cpu
+
+sam7x.cpu configure -event reset-init {
+	soft_reset_halt
+	mww 0xfffffd00 0xa5000004	# RSTC_CR: Reset peripherals
+	mww 0xfffffd44 0x00008000	# WDT_MR: disable watchdog
+	mww 0xfffffd08 0xa5000001	# RSTC_MR enable user reset
+	mww 0xfffffc20 0x00005001	# CKGR_MOR : enable the main oscillator
+	sleep 10
+	mww 0xfffffc2c 0x000b1c02	# CKGR_PLLR: 16MHz * 12/2 = 96MHz
+	sleep 10
+	mww 0xfffffc30 0x00000007	# PMC_MCKR : MCK = PLL / 2 = 48 MHz
+	sleep 10
+	mww 0xffffff60 0x00480100	# MC_FMR: flash mode (FWS=1,FMCN=72)
+	sleep 100
+}
+
+gdb_memory_map enable
+#gdb_breakpoint_override hard
+#armv4_5 core_state arm
+
+sam7x.cpu configure -work-area-virt 0 -work-area-phys 0x00200000 -work-area-size 0x10000 -work-area-backup 0
+#flash bank sam7x.flash.0 at91sam7 0x100000 0x40000 0 4 sam7x.cpu
+flash bank sam7x512.flash.0 at91sam7 0 0 0 0 sam7x.cpu 0 0 0 0 0 0 0 18432
+flash bank sam7x512.flash.1 at91sam7 0 0 0 0 sam7x.cpu 1 0 0 0 0 0 0 18432