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https://github.com/RfidResearchGroup/proxmark3.git
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all prepped for EM4x05 to be used with clone commands
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2479b54eb9
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527d1c9442
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@ -402,6 +402,29 @@ int em4x05_read_word_ext(uint8_t addr, uint32_t pwd, bool usePwd, uint32_t *word
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return em4x05_demod_resp(word, false);
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return em4x05_demod_resp(word, false);
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}
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}
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int em4x05_write_word_ext(uint8_t addr, uint32_t pwd, bool usePwd, uint32_t data) {
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struct {
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uint32_t password;
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uint32_t data;
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uint8_t address;
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uint8_t usepwd;
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} PACKED payload;
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payload.password = pwd;
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payload.data = data;
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payload.address = addr;
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payload.usepwd = usePwd;
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clearCommandBuffer();
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SendCommandNG(CMD_LF_EM4X_WRITEWORD, (uint8_t *)&payload, sizeof(payload));
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PacketResponseNG resp;
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if (!WaitForResponseTimeout(CMD_LF_EM4X_WRITEWORD, &resp, 2000)) {
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PrintAndLogEx(ERR, "Error occurred, device did not respond during write operation.");
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return PM3_ETIMEOUT;
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}
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return PM3_SUCCESS;
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}
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int CmdEM4x05Demod(const char *Cmd) {
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int CmdEM4x05Demod(const char *Cmd) {
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uint32_t dummy = 0;
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uint32_t dummy = 0;
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return em4x05_demod_resp(&dummy, false);
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return em4x05_demod_resp(&dummy, false);
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@ -711,26 +734,9 @@ int CmdEM4x05Write(const char *Cmd) {
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return PM3_ETIMEOUT;
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return PM3_ETIMEOUT;
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}
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}
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} else {
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} else {
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struct {
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em4x05_write_word_ext(addr, pwd, usePwd, data);
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uint32_t password;
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uint32_t data;
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uint8_t address;
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uint8_t usepwd;
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} PACKED payload;
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payload.password = pwd;
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payload.data = data;
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payload.address = addr;
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payload.usepwd = usePwd;
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clearCommandBuffer();
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SendCommandNG(CMD_LF_EM4X_WRITEWORD, (uint8_t *)&payload, sizeof(payload));
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PacketResponseNG resp;
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if (!WaitForResponseTimeout(CMD_LF_EM4X_WRITEWORD, &resp, 2000)) {
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PrintAndLogEx(ERR, "Error occurred, device did not respond during write operation.");
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return PM3_ETIMEOUT;
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}
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}
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}
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if (em4x05_download_samples() == false)
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if (em4x05_download_samples() == false)
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return PM3_ENODATA;
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return PM3_ENODATA;
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@ -13,31 +13,43 @@
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#include "common.h"
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#include "common.h"
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#define EM_SERIAL_BLOCK 1
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#define EM_SERIAL_BLOCK 1
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#define EM_CONFIG_BLOCK 4
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#define EM_CONFIG_BLOCK 4
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#define EM4305_PROT1_BLOCK 14
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#define EM4305_PROT1_BLOCK 14
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#define EM4305_PROT2_BLOCK 15
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#define EM4305_PROT2_BLOCK 15
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#define EM4469_PROT_BLOCK 3
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#define EM4469_PROT_BLOCK 3
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#define EM4305_INFO_BLOCK 0x00
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#define EM4305_UID_BLOCK 0x01
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#define EM4305_PWD_BLOCK 0x02
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#define EM4305_CONFIGURATION_BLOCK 0x04
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// config blocks
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// config blocks
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#define EM4305_DEFAULT_CONFIG_BLOCK 0x0002008F // ASK/ BIPHASE , data rate 32, 4 data blocks
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#define EM4305_DEFAULT_CONFIG_BLOCK (EM4x05_SET_BITRATE(32) | EM4x05_MODULATION_MANCHESTER | EM4x05_SET_NUM_BLOCKS(4) ) // ASK/MAN , data rate 32, 4 data blocks
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//#define EM4305_DEFAULT_CONFIG_BLOCK (EM4x05_SET_BITRATE(32) | EM4x05_MODULATION_BIPHASE | EM4x05_SET_NUM_BLOCKS(4) ) // ASK/BIPHASE , data rate 32, 4 data blocks
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#define EM4305_EM_UNIQUE_CONFIG_BLOCK 0x0001805F // ASK, EM4x02/unique - manchester, data rate 64, 2 data blocks
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#define EM4305_EM_UNIQUE_CONFIG_BLOCK (EM4x05_SET_BITRATE(64) | EM4x05_MODULATION_MANCHESTER | EM4x05_SET_NUM_BLOCKS(2) ) // ASK/MAN, EM4x02/unique - data rate 64, 2 data blocks
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#define EM4305_PAXTON_CONFIG_BLOCK 0x0001805F // ASK, EM4x02/paxton - manchester, data rate 64, 2 data blocks
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#define EM4305_PAXTON_CONFIG_BLOCK (EM4x05_SET_BITRATE(64) | EM4x05_MODULATION_MANCHESTER | EM4x05_SET_NUM_BLOCKS(2) ) // ASK/MAN, EM4x02/paxton - data rate 64, 2 data blocks
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#define EM4305_VISA2000_CONFIG_BLOCK 0x0001805F // ASK, data rate 64, 3 data blocks
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#define EM4305_VISA2000_CONFIG_BLOCK (EM4x05_SET_BITRATE(64) | EM4x05_MODULATION_MANCHESTER | EM4x05_SET_NUM_BLOCKS(3) ) // ASK, data rate 64, 3 data blocks
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#define EM4305_VIKING_CONFIG_BLOCK 0x0001805F // ASK, data rate 32, Manchester, 2 data blocks
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#define EM4305_VIKING_CONFIG_BLOCK (EM4x05_SET_BITRATE(32) | EM4x05_MODULATION_MANCHESTER | EM4x05_SET_NUM_BLOCKS(2) ) // ASK/MAN, data rate 32, 2 data blocks
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#define EM4305_NORALSY_CONFIG_BLOCK 0x0001805F // ASK, data rate 32, 3 data blocks
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#define EM4305_NORALSY_CONFIG_BLOCK (EM4x05_SET_BITRATE(32) | EM4x05_MODULATION_MANCHESTER | EM4x05_SET_NUM_BLOCKS(3) ) // ASK, data rate 32, 3 data blocks
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#define EM4305_PRESCO_CONFIG_BLOCK 0x0001805F // ASK, data rate 32, Manchester, 4 data blocks
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#define EM4305_PRESCO_CONFIG_BLOCK (EM4x05_SET_BITRATE(32) | EM4x05_MODULATION_MANCHESTER | EM4x05_SET_NUM_BLOCKS(4) ) // ASK/MAN, data rate 32, 4 data blocks
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#define EM4305_SECURAKEY_CONFIG_BLOCK 0x0001805F // ASK, Manchester, data rate 40, 3 data blocks
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#define EM4305_SECURAKEY_CONFIG_BLOCK (EM4x05_SET_BITRATE(40) | EM4x05_MODULATION_MANCHESTER | EM4x05_SET_NUM_BLOCKS(3) ) // ASK/MAN, data rate 40, 3 data blocks
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#define EM4305_HID_26_CONFIG_BLOCK (EM4x05_SET_BITRATE(50) | EM4x05_MODULATION_FSK2 | EM4x05_SET_NUM_BLOCKS(3) ) // FSK2a, hid 26 bit, data rate 50, 3 data blocks
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#define EM4305_PARADOX_CONFIG_BLOCK (EM4x05_SET_BITRATE(50) | EM4x05_MODULATION_FSK2 | EM4x05_SET_NUM_BLOCKS(3) ) // FSK2a, hid 26 bit, data rate 50, 3 data blocks
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#define EM4305_AWID_CONFIG_BLOCK (EM4x05_SET_BITRATE(50) | EM4x05_MODULATION_FSK2 | EM4x05_SET_NUM_BLOCKS(3) ) // FSK2a, hid 26 bit, data rate 50, 3 data blocks
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#define EM4305_PYRAMID_CONFIG_BLOCK (EM4x05_SET_BITRATE(50) | EM4x05_MODULATION_FSK2 | EM4x05_SET_NUM_BLOCKS(4) ) // FSK2a, Pyramid 26 bit, data rate 50, 4 data blocks
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#define EM4305_IOPROX_CONFIG_BLOCK (EM4x05_SET_BITRATE(64) | EM4x05_MODULATION_FSK2 | EM4x05_SET_NUM_BLOCKS(2) ) // FSK2a, data rate 64, 2 data blocks
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#define EM4305_INDALA_64_CONFIG_BLOCK (EM4x05_SET_BITRATE(64) | EM4x05_MODULATION_PSK1 | EM4x05_PSK_RF_2 | EM4x05_SET_NUM_BLOCKS(2) ) // PSK1, indala 64 bit, psk carrier FC * 2, data rate 32, maxblock 2
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#define EM4305_INDALA_224_CONFIG_BLOCK (EM4x05_SET_BITRATE(64) | EM4x05_MODULATION_PSK1 | EM4x05_PSK_RF_2 | EM4x05_SET_NUM_BLOCKS(7) ) // PSK1, indala 224 bit, psk carrier FC * 2, data rate 32, maxblock 7
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#define EM4305_MOTOROLA_CONFIG_BLOCK (EM4x05_SET_BITRATE(32) | EM4x05_MODULATION_PSK1 | EM4x05_PSK_RF_2 | EM4x05_SET_NUM_BLOCKS(2) ) // PSK1, data rate 32, 2 data blocks
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#define EM4305_NEXWATCH_CONFIG_BLOCK (EM4x05_SET_BITRATE(64) | EM4x05_MODULATION_PSK1 | EM4x05_PSK_RF_2 | EM4x05_SET_NUM_BLOCKS(3) ) // PSK1 data rate 16, psk carrier FC * 2, 3 data blocks
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#define EM4305_KERI_CONFIG_BLOCK (EM4x05_SET_BITRATE(64) | EM4x05_MODULATION_PSK1 | EM4x05_PSK_RF_2 | EM4x05_SET_NUM_BLOCKS(2) ) // PSK1, 2 data blocks
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#define EM4305_JABLOTRON_CONFIG_BLOCK (EM4x05_SET_BITRATE(64) | EM4x05_MODULATION_BIPHASE | EM4x05_SET_NUM_BLOCKS(2) ) // Biphase, data rate 64, 2 data blocks
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#define EM4305_GUARDPROXII_CONFIG_BLOCK (EM4x05_SET_BITRATE(64) | EM4x05_MODULATION_BIPHASE | EM4x05_SET_NUM_BLOCKS(3) ) // Biphase, data rate 64, Direct modulation, 3 data blocks
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#define EM4305_NEDAP_64_CONFIG_BLOCK (EM4x05_SET_BITRATE(64) | EM4x05_MODULATION_BIPHASE | EM4x05_SET_NUM_BLOCKS(2) ) // Biphase, data rate 64, 2 data blocks
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#define EM4305_NEDAP_128_CONFIG_BLOCK (EM4x05_SET_BITRATE(64) | EM4x05_MODULATION_BIPHASE | EM4x05_SET_NUM_BLOCKS(4) ) // Biphase, data rate 64, 4 data blocks
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#define EM4305_PAC_CONFIG_BLOCK (EM4x05_SET_BITRATE(32) | EM4x05_MODULATION_NRZ | EM4x05_SET_NUM_BLOCKS(4) ) // NRZ, data rate 32, 4 data blocks
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#define EM4305_VERICHIP_CONFIG_BLOCK (EM4x05_SET_BITRATE(40) | EM4x05_MODULATION_NRZ | EM4x05_SET_NUM_BLOCKS(4) ) // NRZ, data rate 40, 4 data blocks
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typedef enum {
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typedef enum {
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EM_UNKNOWN,
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EM_UNKNOWN,
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@ -50,6 +62,7 @@ int CmdLFEM4X05(const char *Cmd);
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bool em4x05_isblock0(uint32_t *word);
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bool em4x05_isblock0(uint32_t *word);
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int em4x05_read_word_ext(uint8_t addr, uint32_t pwd, bool usePwd, uint32_t *word);
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int em4x05_read_word_ext(uint8_t addr, uint32_t pwd, bool usePwd, uint32_t *word);
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int em4x05_write_word_ext(uint8_t addr, uint32_t pwd, bool usePwd, uint32_t data);
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int CmdEM4x05Demod(const char *Cmd);
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int CmdEM4x05Demod(const char *Cmd);
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int CmdEM4x05Dump(const char *Cmd);
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int CmdEM4x05Dump(const char *Cmd);
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@ -559,13 +559,13 @@ ISO 7816-4 Basic interindustry commands. For command APDU's.
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#define EM4x05_FIRST_USER_BLOCK 5
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#define EM4x05_FIRST_USER_BLOCK 5
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#define EM4x05_SET_NUM_BLOCKS(x) ((x+5-1)<<14) //# of blocks sent during default read mode
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#define EM4x05_SET_NUM_BLOCKS(x) ((x+5-1)<<14) //# of blocks sent during default read mode
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#define EM4x05_GET_NUM_BLOCKS(x) (((x>>14) & 0xF)-5+1)
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#define EM4x05_GET_NUM_BLOCKS(x) (((x>>14) & 0xF)-5+1)
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#define EM4x05_READ_LOGIN_REQ 1<<18
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#define EM4x05_READ_LOGIN_REQ (1 << 18)
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#define EM4x05_READ_HK_LOGIN_REQ 1<<19
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#define EM4x05_READ_HK_LOGIN_REQ (1 << 19)
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#define EM4x05_WRITE_LOGIN_REQ 1<<20
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#define EM4x05_WRITE_LOGIN_REQ (1 << 20)
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#define EM4x05_WRITE_HK_LOGIN_REQ 1<<21
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#define EM4x05_WRITE_HK_LOGIN_REQ (1 << 21)
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#define EM4x05_READ_AFTER_WRITE 1<<22
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#define EM4x05_READ_AFTER_WRITE (1 << 22)
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#define EM4x05_DISABLE_ALLOWED 1<<23
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#define EM4x05_DISABLE_ALLOWED (1 << 23)
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#define EM4x05_READER_TALK_FIRST 1<<24
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#define EM4x05_READER_TALK_FIRST (1 << 24)
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// FeliCa protocol
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// FeliCa protocol
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