since we split the image for iclass, every time we swap back to hf / mf commands there is a penalty for swapping fpga image. this fix some allow for fast simulation part

This commit is contained in:
iceman1001 2023-10-18 20:43:52 +02:00
parent 1f3cf80898
commit 5ae919d8ee

View file

@ -1686,6 +1686,7 @@ static void PacketReceived(PacketCommandNG *packet) {
case CMD_HF_MIFARE_EML_MEMCLR: { case CMD_HF_MIFARE_EML_MEMCLR: {
MifareEMemClr(); MifareEMemClr();
reply_ng(CMD_HF_MIFARE_EML_MEMCLR, PM3_SUCCESS, NULL, 0); reply_ng(CMD_HF_MIFARE_EML_MEMCLR, PM3_SUCCESS, NULL, 0);
FpgaDownloadAndGo(FPGA_BITSTREAM_HF);
break; break;
} }
case CMD_HF_MIFARE_EML_MEMSET: { case CMD_HF_MIFARE_EML_MEMSET: {