CmdFSKsimTAG: avoid padding with very short cycles, this confused lf io sim

This commit is contained in:
Philippe Teuwen 2019-09-13 00:36:25 +02:00
parent 5d24d7a85b
commit 64d2e43592

View file

@ -941,7 +941,7 @@ static void fcSTT(int *n) {
}
// compose fc/X fc/Y waveform (FSKx)
static void fcAll(uint8_t fc, int *n, uint8_t clock, uint16_t *modCnt) {
static uint8_t fcAll(uint8_t fc, int *n, uint8_t clock, uint16_t *modCnt) {
uint8_t *dest = BigBuf_get_addr();
uint8_t halfFC = fc >> 1;
uint8_t wavesPerClock = clock / fc;
@ -966,12 +966,15 @@ static void fcAll(uint8_t fc, int *n, uint8_t clock, uint16_t *modCnt) {
*n += fc;
}
}
/* This code interfers with FSK2 and I don't see any example of FSK1 simulation in the code...
if (!modAdjOk) { //fsk1
memset(dest + (*n), 0, mod - (mod >> 1));
memset(dest + (*n) + (mod - (mod >> 1)), 1, mod >> 1);
*n += mod;
}
*/
}
return mod;
}
// prepare a waveform pattern in the buffer based on the ID given then
@ -1059,17 +1062,17 @@ void CmdFSKsimTAG(uint8_t fchigh, uint8_t fclow, uint8_t separator, uint8_t clk,
int n = 0, i = 0;
uint16_t modCnt = 0;
uint8_t mod = 0;
if (separator) {
//int fsktype = ( fchigh == 8 && fclow == 5) ? 1 : 2;
//fcSTT(&n);
}
for (i = 0; i < bitslen; i++) {
if (bits[i])
fcAll(fclow, &n, clk, &modCnt);
mod = fcAll(fclow, &n, clk+mod, &modCnt);
else
fcAll(fchigh, &n, clk, &modCnt);
mod = fcAll(fchigh, &n, clk+mod, &modCnt);
}
WDT_HIT();