RfidResearchGroup/proxmark3
1
1
Fork 0
mirror of https://github.com/RfidResearchGroup/proxmark3.git synced 2025-01-21 15:43:39 +08:00
Code Issues Projects Releases Packages Wiki Activity

Minor dox

Browse source
This commit is contained in:
Martin Holst Swende 2015-01-15 15:45:54 +01:00
parent 1eb874ee3f
commit 6b038d192a
1 changed files with 2 additions and 7 deletions
Show stats Download patch file Download diff file Expand all files Collapse all files

9
armsrc/iclass.c
View file

@ -921,7 +921,7 @@ static void CodeIClassTagAnswer(const uint8_t *cmd, int len)
* - A 1-bit input to the FPGA becomes 8 pulses on 423.5kHz (fc/32) (18.88us). * - A 1-bit input to the FPGA becomes 8 pulses on 423.5kHz (fc/32) (18.88us).
* - A 0-bit inptu to the FPGA becomes an unmodulated time of 18.88us * - A 0-bit inptu to the FPGA becomes an unmodulated time of 18.88us
* *
* In thist mode the SOF can be written as 00011101 = 0x1D * In this mode the SOF can be written as 00011101 = 0x1D
* The EOF can be written as 10111000 = 0xb8 * The EOF can be written as 10111000 = 0xb8
* A logic 1 is 01 * A logic 1 is 01
* A logic 0 is 10 * A logic 0 is 10
@ -1215,12 +1215,7 @@ int doIClassSimulation(uint8_t csn[], int breakAfterMacReceived, uint8_t *reader
cmdsRecvd++; cmdsRecvd++;
} }
/** /**
After changes to parity calculation A legit tag has about 380us delay between reader EOT and tag SOF.
Time between reader EOT and pm3 SOF
delay 21 -> 480uS
delay 10 -> 220us
delay 16 -> 388us
A legit tag has about 380us.
**/ **/
if(modulated_response_size > 0) { if(modulated_response_size > 0) {
SendIClassAnswer(modulated_response, modulated_response_size, 1); SendIClassAnswer(modulated_response, modulated_response_size, 1);