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https://github.com/RfidResearchGroup/proxmark3.git
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Merge pull request #60 from pwpiwi/master
Bugfix hw tune, hf tune: voltage measures were VERY wrong
This commit is contained in:
commit
6d3e6c740b
2 changed files with 60 additions and 39 deletions
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@ -135,12 +135,25 @@ static int ReadAdc(int ch)
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AT91C_BASE_ADC->ADC_CR = AT91C_ADC_SWRST;
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AT91C_BASE_ADC->ADC_MR =
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ADC_MODE_PRESCALE(32) |
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ADC_MODE_STARTUP_TIME(16) |
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ADC_MODE_SAMPLE_HOLD_TIME(8);
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ADC_MODE_PRESCALE(63 /* was 32 */) | // ADC_CLK = MCK / ((63+1) * 2) = 48MHz / 128 = 375kHz
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ADC_MODE_STARTUP_TIME(1 /* was 16 */) | // Startup Time = (1+1) * 8 / ADC_CLK = 16 / 375kHz = 42,7us Note: must be > 20us
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ADC_MODE_SAMPLE_HOLD_TIME(15 /* was 8 */); // Sample & Hold Time SHTIM = 15 / ADC_CLK = 15 / 375kHz = 40us
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// Note: ADC_MODE_PRESCALE and ADC_MODE_SAMPLE_HOLD_TIME are set to the maximum allowed value.
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// Both AMPL_LO and AMPL_HI are very high impedance (10MOhm) outputs, the input capacitance of the ADC is 12pF (typical). This results in a time constant
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// of RC = 10MOhm * 12pF = 120us. Even after the maximum configurable sample&hold time of 40us the input capacitor will not be fully charged.
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//
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// The maths are:
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// If there is a voltage v_in at the input, the voltage v_cap at the capacitor (this is what we are measuring) will be
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//
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// v_cap = v_in * (1 - exp(-RC/SHTIM)) = v_in * (1 - exp(-3)) = v_in * 0,95 (i.e. an error of 5%)
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//
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// Note: with the "historic" values in the comments above, the error was 34% !!!
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AT91C_BASE_ADC->ADC_CHER = ADC_CHANNEL(ch);
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AT91C_BASE_ADC->ADC_CR = AT91C_ADC_START;
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while(!(AT91C_BASE_ADC->ADC_SR & ADC_END_OF_CONVERSION(ch)))
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;
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d = AT91C_BASE_ADC->ADC_CDR[ch];
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@ -183,9 +196,7 @@ void MeasureAntennaTuning(void)
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WDT_HIT();
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FpgaSendCommand(FPGA_CMD_SET_DIVISOR, i);
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SpinDelay(20);
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// Vref = 3.3V, and a 10000:240 voltage divider on the input
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// can measure voltages up to 137500 mV
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adcval = ((137500 * AvgAdc(ADC_CHAN_LF)) >> 10);
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adcval = ((MAX_ADC_LF_VOLTAGE * AvgAdc(ADC_CHAN_LF)) >> 10);
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if (i==95) vLf125 = adcval; // voltage at 125Khz
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if (i==89) vLf134 = adcval; // voltage at 134Khz
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@ -205,11 +216,9 @@ void MeasureAntennaTuning(void)
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FpgaDownloadAndGo(FPGA_BITSTREAM_HF);
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FpgaWriteConfWord(FPGA_MAJOR_MODE_HF_READER_RX_XCORR);
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SpinDelay(20);
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// Vref = 3300mV, and an 10:1 voltage divider on the input
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// can measure voltages up to 33000 mV
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vHf = (33000 * AvgAdc(ADC_CHAN_HF)) >> 10;
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vHf = (MAX_ADC_HF_VOLTAGE * AvgAdc(ADC_CHAN_HF)) >> 10;
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cmd_send(CMD_MEASURED_ANTENNA_TUNING,vLf125|(vLf134<<16),vHf,peakf|(peakv<<16),LF_Results,256);
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cmd_send(CMD_MEASURED_ANTENNA_TUNING, vLf125 | (vLf134<<16), vHf, peakf | (peakv<<16), LF_Results, 256);
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FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF);
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LED_A_OFF();
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LED_B_OFF();
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@ -222,19 +231,21 @@ void MeasureAntennaTuningHf(void)
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DbpString("Measuring HF antenna, press button to exit");
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// Let the FPGA drive the high-frequency antenna around 13.56 MHz.
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FpgaDownloadAndGo(FPGA_BITSTREAM_HF);
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FpgaWriteConfWord(FPGA_MAJOR_MODE_HF_READER_RX_XCORR);
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for (;;) {
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// Let the FPGA drive the high-frequency antenna around 13.56 MHz.
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FpgaDownloadAndGo(FPGA_BITSTREAM_HF);
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FpgaWriteConfWord(FPGA_MAJOR_MODE_HF_READER_RX_XCORR);
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SpinDelay(20);
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// Vref = 3300mV, and an 10:1 voltage divider on the input
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// can measure voltages up to 33000 mV
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vHf = (33000 * AvgAdc(ADC_CHAN_HF)) >> 10;
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vHf = (MAX_ADC_HF_VOLTAGE * AvgAdc(ADC_CHAN_HF)) >> 10;
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Dbprintf("%d mV",vHf);
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if (BUTTON_PRESS()) break;
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}
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DbpString("cancelled");
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FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF);
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}
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@ -512,26 +523,32 @@ static const int LIGHT_LEN = sizeof(LIGHT_SCHEME)/sizeof(LIGHT_SCHEME[0]);
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void ListenReaderField(int limit)
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{
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int lf_av, lf_av_new, lf_baseline= 0, lf_count= 0, lf_max;
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int hf_av, hf_av_new, hf_baseline= 0, hf_count= 0, hf_max;
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int lf_av, lf_av_new, lf_baseline= 0, lf_max;
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int hf_av, hf_av_new, hf_baseline= 0, hf_max;
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int mode=1, display_val, display_max, i;
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#define LF_ONLY 1
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#define HF_ONLY 2
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#define LF_ONLY 1
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#define HF_ONLY 2
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#define REPORT_CHANGE 10 // report new values only if they have changed at least by REPORT_CHANGE
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// switch off FPGA - we don't want to measure our own signal
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FpgaDownloadAndGo(FPGA_BITSTREAM_HF);
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FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF);
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LEDsoff();
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lf_av=lf_max=ReadAdc(ADC_CHAN_LF);
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lf_av = lf_max = AvgAdc(ADC_CHAN_LF);
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if(limit != HF_ONLY) {
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Dbprintf("LF 125/134 Baseline: %d", lf_av);
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Dbprintf("LF 125/134kHz Baseline: %dmV", (MAX_ADC_LF_VOLTAGE * lf_av) >> 10);
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lf_baseline = lf_av;
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}
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hf_av=hf_max=ReadAdc(ADC_CHAN_HF);
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hf_av = hf_max = AvgAdc(ADC_CHAN_HF);
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if (limit != LF_ONLY) {
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Dbprintf("HF 13.56 Baseline: %d", hf_av);
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Dbprintf("HF 13.56MHz Baseline: %dmV", (MAX_ADC_HF_VOLTAGE * hf_av) >> 10);
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hf_baseline = hf_av;
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}
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@ -554,38 +571,38 @@ void ListenReaderField(int limit)
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WDT_HIT();
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if (limit != HF_ONLY) {
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if(mode==1) {
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if (abs(lf_av - lf_baseline) > 10) LED_D_ON();
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else LED_D_OFF();
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if(mode == 1) {
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if (abs(lf_av - lf_baseline) > REPORT_CHANGE)
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LED_D_ON();
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else
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LED_D_OFF();
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}
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++lf_count;
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lf_av_new= ReadAdc(ADC_CHAN_LF);
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lf_av_new = AvgAdc(ADC_CHAN_LF);
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// see if there's a significant change
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if(abs(lf_av - lf_av_new) > 10) {
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Dbprintf("LF 125/134 Field Change: %x %x %x", lf_av, lf_av_new, lf_count);
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if(abs(lf_av - lf_av_new) > REPORT_CHANGE) {
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Dbprintf("LF 125/134kHz Field Change: %5dmV", (MAX_ADC_LF_VOLTAGE * lf_av_new) >> 10);
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lf_av = lf_av_new;
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if (lf_av > lf_max)
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lf_max = lf_av;
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lf_count= 0;
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}
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}
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if (limit != LF_ONLY) {
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if (mode == 1){
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if (abs(hf_av - hf_baseline) > 10) LED_B_ON();
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else LED_B_OFF();
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if (abs(hf_av - hf_baseline) > REPORT_CHANGE)
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LED_B_ON();
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else
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LED_B_OFF();
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}
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++hf_count;
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hf_av_new= ReadAdc(ADC_CHAN_HF);
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hf_av_new = AvgAdc(ADC_CHAN_HF);
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// see if there's a significant change
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if(abs(hf_av - hf_av_new) > 10) {
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Dbprintf("HF 13.56 Field Change: %x %x %x", hf_av, hf_av_new, hf_count);
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if(abs(hf_av - hf_av_new) > REPORT_CHANGE) {
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Dbprintf("HF 13.56MHz Field Change: %5dmV", (MAX_ADC_HF_VOLTAGE * hf_av_new) >> 10);
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hf_av = hf_av_new;
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if (hf_av > hf_max)
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hf_max = hf_av;
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hf_count= 0;
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}
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}
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@ -38,6 +38,10 @@ void DbpString(char *str);
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void Dbprintf(const char *fmt, ...);
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void Dbhexdump(int len, uint8_t *d, bool bAsci);
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// ADC Vref = 3300mV, and an (10M+1M):1M voltage divider on the HF input can measure voltages up to 36300 mV
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#define MAX_ADC_HF_VOLTAGE 36300
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// ADC Vref = 3300mV, and an (10000k+240k):240k voltage divider on the LF input can measure voltages up to 140800 mV
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#define MAX_ADC_LF_VOLTAGE 140800
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int AvgAdc(int ch);
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void ToSendStuffBit(int b);
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