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chg: syntax sugar
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ceb34a3c1b
commit
701ad7cb3a
1 changed files with 6 additions and 6 deletions
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@ -85,7 +85,7 @@ void StartCountUS(void) {
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AT91C_BASE_TC1->TC_CCR = AT91C_TC_CLKEN | AT91C_TC_SWTRG;
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AT91C_BASE_TCB->TCB_BCR = 1;
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while (AT91C_BASE_TC1->TC_CV >= 1);
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while (AT91C_BASE_TC1->TC_CV > 0);
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}
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uint32_t RAMFUNC GetCountUS(void){
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@ -152,14 +152,14 @@ void StartCountSspClk(void) {
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// The high word of the counter (TC2) will not reset until the low word (TC0) overflows.
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// Therefore need to wait quite some time before we can use the counter.
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while (AT91C_BASE_TC2->TC_CV >= 1);
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while (AT91C_BASE_TC2->TC_CV > 0);
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}
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void ResetSspClk(void) {
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//enable clock of timer and software trigger
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AT91C_BASE_TC0->TC_CCR = AT91C_TC_CLKEN | AT91C_TC_SWTRG;
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AT91C_BASE_TC1->TC_CCR = AT91C_TC_CLKEN | AT91C_TC_SWTRG;
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AT91C_BASE_TC2->TC_CCR = AT91C_TC_CLKEN | AT91C_TC_SWTRG;
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while (AT91C_BASE_TC2->TC_CV >= 1);
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while (AT91C_BASE_TC2->TC_CV > 0);
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}
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uint32_t RAMFUNC GetCountSspClk(void) {
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uint32_t tmp_count = (AT91C_BASE_TC2->TC_CV << 16) | AT91C_BASE_TC0->TC_CV;
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@ -193,7 +193,7 @@ void StartTicks(void){
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AT91C_BASE_TCB->TCB_BCR = 1;
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// wait until timer becomes zero.
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while (AT91C_BASE_TC1->TC_CV >= 1);
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while (AT91C_BASE_TC1->TC_CV > 0);
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}
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// Wait - Spindelay in ticks.
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// if called with a high number, this will trigger the WDT...
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@ -216,11 +216,11 @@ void WaitMS(uint16_t ms){
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void ResetTicks(void){
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AT91C_BASE_TC0->TC_CCR = AT91C_TC_CLKEN | AT91C_TC_SWTRG;
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AT91C_BASE_TC1->TC_CCR = AT91C_TC_CLKEN | AT91C_TC_SWTRG;
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while (AT91C_BASE_TC1->TC_CV >= 1);
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while (AT91C_BASE_TC1->TC_CV > 0);
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}
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void ResetTimer(AT91PS_TC timer){
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timer->TC_CCR = AT91C_TC_CLKEN | AT91C_TC_SWTRG;
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while(timer->TC_CV >= 1) ;
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while(timer->TC_CV > 0) ;
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}
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// stop clock
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void StopTicks(void){
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