Merge pull request #2481 from douniwan5788/fpga

fix: bitstream_index_map overflow
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Iceman 2024-08-30 11:03:36 +02:00 committed by GitHub
commit 8243c8c46e
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4 changed files with 7 additions and 5 deletions

View file

@ -797,7 +797,7 @@ static void PacketReceived(PacketCommandNG *packet) {
}
case CMD_SET_FPGAMODE: {
uint8_t mode = packet->data.asBytes[0];
if (mode >= FPGA_BITSTREAM_LF && mode <= FPGA_BITSTREAM_HF_15) {
if (mode >= FPGA_BITSTREAM_MIN && mode <= FPGA_BITSTREAM_MAX) {
FpgaDownloadAndGo(mode);
reply_ng(CMD_SET_FPGAMODE, PM3_SUCCESS, NULL, 0);
}

View file

@ -222,11 +222,11 @@ static int get_from_fpga_combined_stream(lz4_streamp_t compressed_fpga_stream, u
}
static int bitstream_target_to_index(FPGA_config bitstream_target) {
static int8_t bitstream_index_map[FPGA_BITSTREAM_MAX] = {-1};
static int8_t bitstream_index_map[FPGA_CONFIG_COUNT] = {-1};
// Initialize
if (bitstream_index_map[0] == -1) {
bitstream_index_map[0] = 0;
if (bitstream_index_map[FPGA_BITSTREAM_UNKNOWN] == -1) {
bitstream_index_map[FPGA_BITSTREAM_UNKNOWN] = 0;
for (size_t i = 0; i < g_fpga_bitstream_num; i++) {
FPGA_VERSION_INFORMATION info = g_fpga_version_information[i];

View file

@ -1432,7 +1432,7 @@ static int CmdBootloader(const char *Cmd) {
}
int set_fpga_mode(uint8_t mode) {
if (mode < FPGA_BITSTREAM_LF || mode > FPGA_BITSTREAM_HF_15) {
if (mode < FPGA_BITSTREAM_MIN || mode > FPGA_BITSTREAM_MAX) {
return PM3_EINVARG;
}
uint8_t d[] = {mode};

View file

@ -36,10 +36,12 @@
typedef enum {
FPGA_BITSTREAM_UNKNOWN = 0,
FPGA_BITSTREAM_LF = 1,
FPGA_BITSTREAM_MIN = FPGA_BITSTREAM_LF,
FPGA_BITSTREAM_HF,
FPGA_BITSTREAM_HF_FELICA,
FPGA_BITSTREAM_HF_15,
FPGA_BITSTREAM_MAX = FPGA_BITSTREAM_HF_15,
FPGA_CONFIG_COUNT
} FPGA_config;
typedef struct {