diff --git a/armsrc/fpgaloader.c b/armsrc/fpgaloader.c
index 101ddfac9..9a95a0304 100644
--- a/armsrc/fpgaloader.c
+++ b/armsrc/fpgaloader.c
@@ -39,7 +39,7 @@ typedef struct {
 typedef lz4_stream_t *lz4_streamp_t;
 
 // remember which version of the bitstream we have already downloaded to the FPGA
-static int downloaded_bitstream = 0;
+static int downloaded_bitstream = FPGA_BITSTREAM_UNKNOWN;
 
 // this is where the bitstreams are located in memory:
 extern uint32_t _binary_obj_fpga_all_bit_z_start[], _binary_obj_fpga_all_bit_z_end[];
@@ -464,7 +464,7 @@ static bool FpgaConfCurrentMode(int bitstream_target) {
     // fpga "XC3S100E" image merge
     // If fpga image is no init
     // We need load hf_lf_allinone.bit
-    if (downloaded_bitstream != 0) {
+    if (downloaded_bitstream != FPGA_BITSTREAM_UNKNOWN) {
         // test start
         // PIO controls the following pins
         AT91C_BASE_PIOA->PIO_PER = GPIO_FPGA_SWITCH;
diff --git a/common_arm/Makefile.hal b/common_arm/Makefile.hal
index a5ea1e274..6c9318fd5 100644
--- a/common_arm/Makefile.hal
+++ b/common_arm/Makefile.hal
@@ -148,8 +148,8 @@ else ifeq ($(PLATFORM),PM3GENERIC)
         PLATFORM_DEFS = -DLED_ORDER_PM3EASY
     endif
 else ifeq ($(PLATFORM),PM3ICOPYX)
-    # FPGA bitstream files, the order doesn't matter anymore - only hf has a bitstream, the other 3 files are 0 bytes
-    FPGA_BITSTREAMS = fpga_icopyx_lf.bit fpga_icopyx_hf.bit fpga_icopyx_felica.bit fpga_icopyx_hf_15.bit
+    # FPGA bitstream files, the order doesn't matter anymore - only hf has a bitstream
+    FPGA_BITSTREAMS = fpga_icopyx_hf.bit
     PLATFORM_DEFS = -DWITH_FLASH -DICOPYX -DXC3
     PLTNAME = iCopy-X with XC3S100E
     PLATFORM_FPGA = xc3s100e
diff --git a/fpga/Makefile b/fpga/Makefile
index 8a95c7638..821ac0ec7 100644
--- a/fpga/Makefile
+++ b/fpga/Makefile
@@ -182,12 +182,6 @@ work:
 	$(Q)$(XILINX_TOOLS_PREFIX)par $(VERBOSITY) -w $< $@
 
 %.bit: %.ncd
-	# Hacky hack, make empty files for icopyx
-	if echo "$@" | grep -qi "icopyx"; then \
-		truncate -s0 ../fpga_icopyx_lf.bit; \
-		truncate -s0 ../fpga_icopyx_hf_15.bit; \
-		truncate -s0 ../fpga_icopyx_felica.bit; \
-	fi
 	$(Q)$(RM) $@ $*.drc $*.rbt
 	$(info [=] BITGEN $@)
 	$(Q)$(XILINX_TOOLS_PREFIX)bitgen $(VERBOSITY) -w $* $@