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https://github.com/RfidResearchGroup/proxmark3.git
synced 2025-02-25 00:25:48 +08:00
- added missing timeout checks
- relocated timer resets in standalone mode
This commit is contained in:
parent
a67c82ff6d
commit
b20f532282
2 changed files with 31 additions and 17 deletions
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@ -133,6 +133,7 @@ void RunMod(void) {
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rdv40_spiffs_lazy_mount();
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StandAloneMode();
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FpgaDownloadAndGo(FPGA_BITSTREAM_LF);
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Dbprintf(_YELLOW_("Standalone mode THAREXDE started"));
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for (;;) {
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@ -204,10 +205,11 @@ void RunMod(void) {
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for (int i = 0; i < EM4X50_NO_WORDS; i++) {
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sprintf((char *)entry + strlen((char *)entry), "%08"PRIx32"\n", tag[i]);
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}
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log_exists = exists_in_spiffs(LF_EM4X50_LOGFILE_SIM);
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Dbprintf("log_exists = %i", log_exists);
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//append(LF_EM4X50_LOGFILE_SIM, entry, strlen((char *)entry));
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if (exists_in_spiffs(LF_EM4X50_LOGFILE_SIM)) {
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rdv40_spiffs_remove(LF_EM4X50_LOGFILE_SIM, RDV40_SPIFFS_SAFETY_SAFE);
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}
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rdv40_spiffs_write(LF_EM4X50_LOGFILE_SIM, entry, strlen((char *)entry), RDV40_SPIFFS_SAFETY_SAFE);
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}
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// stop if key (pm3 button or enter key) has been pressed
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@ -253,13 +255,13 @@ void RunMod(void) {
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sprintf((char *)entry + strlen((char *)entry), "\n");
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append(LF_EM4X50_LOGFILE_COLLECT, entry, strlen((char *)entry));
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}
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// reset timer
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AT91C_BASE_TC1->TC_CCR = AT91C_TC_CLKEN | AT91C_TC_SWTRG; // re-enable timer and wait for TC0
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AT91C_BASE_TC0->TC_RC = 0; // set TIOA (carry bit) on overflow, return to zero
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AT91C_BASE_TC0->TC_RA = 1; // clear carry bit on next clock cycle
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AT91C_BASE_TC0->TC_CCR = AT91C_TC_CLKEN | AT91C_TC_SWTRG; // reset and re-enable timer
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}
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// reset timer
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AT91C_BASE_TC1->TC_CCR = AT91C_TC_CLKEN | AT91C_TC_SWTRG; // re-enable timer and wait for TC0
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AT91C_BASE_TC0->TC_RC = 0; // set TIOA (carry bit) on overflow, return to zero
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AT91C_BASE_TC0->TC_RA = 1; // clear carry bit on next clock cycle
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AT91C_BASE_TC0->TC_CCR = AT91C_TC_CLKEN | AT91C_TC_SWTRG; // reset and re-enable timer
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}
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if (state == STATE_READ) {
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@ -1222,11 +1222,19 @@ static int em4x50_sim_read_bit(void) {
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while (cycles < EM4X50_T_TAG_FULL_PERIOD) {
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// wait until reader field disappears
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while (!(AT91C_BASE_PIOA->PIO_PDSR & GPIO_SSC_CLK));
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while ((timeout--) && !(AT91C_BASE_PIOA->PIO_PDSR & GPIO_SSC_CLK));
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if (timeout <= 0) {
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return PM3_ETIMEOUT;
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}
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timeout = EM4X50_T_SIMULATION_TIMEOUT_READ;
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// now check until reader switches on carrier field
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tval = GetTicks();
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while (AT91C_BASE_PIOA->PIO_PDSR & GPIO_SSC_CLK) {
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while ((timeout--) && (AT91C_BASE_PIOA->PIO_PDSR & GPIO_SSC_CLK)) {
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if (timeout <= 0) {
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return PM3_ETIMEOUT;
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}
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// check if current cycle takes longer than "usual""
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if (GetTicks() - tval > EM4X50_T_ZERO_DETECTION * CYCLES2TICKS) {
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@ -1237,7 +1245,7 @@ static int em4x50_sim_read_bit(void) {
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if (timeout <= 0) {
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return PM3_ETIMEOUT;
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}
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// timeout = EM4X50_T_SIMULATION_TIMEOUT_READ;
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//timeout = EM4X50_T_SIMULATION_TIMEOUT_READ;
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// now we have a reference "position", from here it will take
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// slightly less than 32 cycles until the end of the bit period
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@ -1248,6 +1256,7 @@ static int em4x50_sim_read_bit(void) {
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return 0;
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}
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}
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timeout = EM4X50_T_SIMULATION_TIMEOUT_READ;
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// no gap detected, i.e. reader field is still up;
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// continue with counting cycles
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@ -1431,11 +1440,14 @@ static int em4x50_sim_handle_standard_read_command(uint32_t *tag) {
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// last word read protected
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int lwrp = (reflect32(tag[EM4X50_PROTECTION]) >> 8) & 0xFF;
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int command = PM3_SUCCESS;
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while ((BUTTON_PRESS() == false) && (data_available() == false)) {
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WDT_HIT();
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int command = em4x50_sim_send_listen_window(tag);
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command = em4x50_sim_send_listen_window(tag);
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if (command != PM3_SUCCESS) {
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return command;
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}
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@ -1737,19 +1749,19 @@ void em4x50_handle_commands(int *command, uint32_t *tag) {
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break;
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case EM4X50_COMMAND_RESET:
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*command = em4x50_sim_handle_reset_command(tag);
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*command = em4x50_sim_handle_reset_command(tag);
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break;
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case EM4X50_COMMAND_WRITE:
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*command = em4x50_sim_handle_write_command(tag);
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*command = em4x50_sim_handle_write_command(tag);
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break;
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case EM4X50_COMMAND_WRITE_PASSWORD:
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*command = em4x50_sim_handle_writepwd_command(tag);
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*command = em4x50_sim_handle_writepwd_command(tag);
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break;
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case EM4X50_COMMAND_SELECTIVE_READ:
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*command = em4x50_sim_handle_selective_read_command(tag);
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*command = em4x50_sim_handle_selective_read_command(tag);
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break;
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case EM4X50_COMMAND_STANDARD_READ:
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