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chg: 't55' more style
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parent
a597382530
commit
b4eb41ee66
1 changed files with 27 additions and 28 deletions
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@ -1570,37 +1570,36 @@ void T55xx_SendCMD(uint32_t data, uint32_t pwd, uint16_t arg) {
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/*
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/*
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arg bits
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arg bits
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xxxx xxxxxxx1 0x001 PwdMode
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xxxx xxxxxxx1 0x001 password mode (Y/N)
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xxxx xxxxxx1x 0x002 Page
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xxxx xxxxxx1x 0x002 page (0|1)
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xxxx xxxxx1xx 0x004 testMode
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xxxx xxxxx1xx 0x004 test mode (Y/N)
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xxxx xxx11xxx 0x018 downlink mode
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xxxx xxx11xxx 0x018 selected downlink mode (0|1|2|3|)
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xxxx xx1xxxxx 0x020 !reg_readmode
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xxxx xx1xxxxx 0x020 !reg_readmode (ICEMAN ?? Why use negative in the bool ??)
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xxxx x1xxxxxx 0x040 called for a read, so no data packet
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xxxx x1xxxxxx 0x040 called for a read, so no data packet (Y/N)
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xxxx 1xxxxxxx 0x080 reset
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xxxx 1xxxxxxx 0x080 reset (Y/N)
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xxx1 xxxxxxxx 0x100 brute force
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xxx1 xxxxxxxx 0x100 brute force (Y/N)
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111x xxxxxxxx 0xE00 Block
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111x xxxxxxxx 0xE00 block to write (0-7)
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*/
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*/
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bool t55_send_pwdmode = (arg & 0x1);
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bool t55_send_pwdmode = (arg & 0x1);
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bool t55_send_page = ((arg >> 1) & 0x1);
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bool t55_send_page = ((arg >> 1) & 0x1);
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bool t55_send_testmode = ((arg >> 2) & 0x1);
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bool t55_send_testmode = ((arg >> 2) & 0x1);
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bool t55_send_regreadmode = ((arg >> 5) & 0x1);
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bool t55_send_regreadmode = ((arg >> 5) & 0x1);
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bool t55_send_readcmd = ((arg >> 6) & 0x1);
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bool t55_send_readcmd = ((arg >> 6) & 0x1);
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bool t55_send_reset = ((arg >> 7) & 0x1);
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bool t55_send_reset = ((arg >> 7) & 0x1);
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bool t55_brute_mem = ((arg >> 8) & 0x1);
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// Max Downlink Command size ~74 bits, so 10 bytes (80 bits)
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uint8_t downlink_mode = (arg >> 3) & 0x03;
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uint8_t bs[10];
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uint8_t block_no = (arg >> 9) & 0x07;
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uint8_t i = 0, len = 0;
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uint8_t downlink_mode = (arg >> 3) & 0x03;
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uint8_t block = (arg >> 9) & 0x07;
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bool brute_mem = (arg & 0x100);
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// no startup delay when in bruteforce command
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// no startup delay when in bruteforce command
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uint8_t start_wait = (brute_mem) ? 0 : 4;
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uint8_t start_wait = (t55_brute_mem) ? 0 : 4;
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// Max Downlink Command size ~74 bits, so 10 bytes (80 bits)
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uint8_t bs[10];
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memset(bs, 0x00, sizeof(bs));
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memset(bs, 0x00, sizeof(bs));
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uint8_t len = 0;
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// build bit stream to send.
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// build bit stream to send.
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// add Leading 0
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// add Leading 0
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@ -1645,7 +1644,7 @@ bool t55_send_reset = ((arg >> 7) & 0x1);
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// Add Address
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// Add Address
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if (t55_send_regreadmode == false)
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if (t55_send_regreadmode == false)
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len = T55xx_SetBits(bs, len, block, 3, sizeof(bs));
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len = T55xx_SetBits(bs, len, block_no, 3, sizeof(bs));
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}
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}
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// Send Bits to T55xx
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// Send Bits to T55xx
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@ -1665,13 +1664,13 @@ bool t55_send_reset = ((arg >> 7) & 0x1);
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uint8_t sendbits;
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uint8_t sendbits;
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if ((downlink_mode == T55XX_DLMODE_1OF4) && (len > 0)) { // 1 of 4 need to send 2 bits at a time
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if ((downlink_mode == T55XX_DLMODE_1OF4) && (len > 0)) { // 1 of 4 need to send 2 bits at a time
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for (i = 0; i < len - 1; i += 2) {
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for (uint8_t i = 0; i < len - 1; i += 2) {
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sendbits = (bs[BITSTREAM_BYTE(i)] >> (BITSTREAM_BIT(i)) & 1) << 1; // Bit i
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sendbits = (bs[BITSTREAM_BYTE(i)] >> (BITSTREAM_BIT(i)) & 1) << 1; // Bit i
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sendbits += (bs[BITSTREAM_BYTE(i + 1)] >> (BITSTREAM_BIT(i + 1)) & 1); // Bit i+1;
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sendbits += (bs[BITSTREAM_BYTE(i + 1)] >> (BITSTREAM_BIT(i + 1)) & 1); // Bit i+1;
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T55xxWriteBit(sendbits & 3, downlink_mode);
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T55xxWriteBit(sendbits & 3, downlink_mode);
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}
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}
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} else {
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} else {
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for (i = 0; i < len; i++) {
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for (uint8_t i = 0; i < len; i++) {
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sendbits = (bs[BITSTREAM_BYTE(i)] >> BITSTREAM_BIT(i));
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sendbits = (bs[BITSTREAM_BYTE(i)] >> BITSTREAM_BIT(i));
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T55xxWriteBit(sendbits & 1, downlink_mode);
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T55xxWriteBit(sendbits & 1, downlink_mode);
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}
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}
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