perform startup delay also during TIA

armsrc/appmain.c

@@ -307,7 +307,7 @@ void SendVersion(void) {
 void TimingIntervalAcquisition(void) {
     // trigger new acquisition by turning main oscillator off and on
     mck_from_pll_to_slck();
-    mck_from_slck_to_pll(false);
+    mck_from_slck_to_pll();
     // wait for MCFR and recompute RTMR scaler
     StartTickCount();
 }

bootrom/bootrom.c

@@ -69,7 +69,7 @@ static void ConfigClocks(void) {
         (1 << AT91C_ID_PWMC)   |
         (1 << AT91C_ID_UDP);
 
-    mck_from_slck_to_pll(true);
+    mck_from_slck_to_pll();
 }
 
 static void Fatal(void) {

common_arm/clocks.c

@@ -15,7 +15,7 @@ void mck_from_pll_to_slck(void) {
     AT91C_BASE_PMC->PMC_MOR = 0;
 }
 
-void mck_from_slck_to_pll(bool cold) {
+void mck_from_slck_to_pll(void) {
     // worst case scenario, with MAINCK = 16MHz xtal, startup delay is 1.4ms
     // if SLCK slow clock runs at its worst case (max) frequency of 42kHz
     // max startup delay = (1.4ms*42k)/8 = 7.356 so round up to 8
@@ -23,14 +23,10 @@ void mck_from_slck_to_pll(bool cold) {
     // we observed on 10% of the devices very wrong initial slow clock RC TIA measures.
     // Bumping delay to 16 helps fixing the issue even on the most screwed RC.
 
-    // enable main oscillator and set startup delay if cold boot
-    if (cold) {
-        AT91C_BASE_PMC->PMC_MOR =
-            AT91C_CKGR_MOSCEN |
-            PMC_MAIN_OSC_STARTUP_DELAY(16);
-    } else {
-        AT91C_BASE_PMC->PMC_MOR = AT91C_CKGR_MOSCEN;
-    }
+    // enable main oscillator and set startup delay
+    AT91C_BASE_PMC->PMC_MOR =
+        AT91C_CKGR_MOSCEN |
+        PMC_MAIN_OSC_STARTUP_DELAY(16);
 
     // wait for main oscillator to stabilize
     while (!(AT91C_BASE_PMC->PMC_SR & AT91C_PMC_MOSCS)) {};

common_arm/clocks.h

@@ -5,6 +5,6 @@
 #include "at91sam7s512.h"
 
 void mck_from_pll_to_slck(void);
-void mck_from_slck_to_pll(bool cold);
+void mck_from_slck_to_pll(void);
 
 #endif // _CLOCKS_H_