mirror of
https://github.com/RfidResearchGroup/proxmark3.git
synced 2024-12-30 20:23:46 +08:00
CHG; added an option wither or not to clear emulator mem on init
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parent
f9eeab99a4
commit
c2723575de
2 changed files with 52 additions and 32 deletions
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@ -180,7 +180,7 @@ void frame_send_tag(uint16_t response, uint8_t bits) {
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AT91C_BASE_PIOA->PIO_PER = GPIO_SSC_DOUT;
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/* TAG_FRAME_WAIT -> shift by 2 */
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legic_prng_forward(2);
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legic_prng_forward(3);
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response ^= legic_prng_get_bits(bits);
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/* Wait for the frame start */
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@ -333,7 +333,7 @@ static uint32_t setup_phase_reader(uint8_t iv) {
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return current_frame.data;
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}
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static void LegicCommonInit(void) {
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void LegicCommonInit(bool clear_mem) {
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FpgaDownloadAndGo(FPGA_BITSTREAM_HF);
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FpgaWriteConfWord(FPGA_MAJOR_MODE_HF_READER_TX);
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@ -347,7 +347,8 @@ static void LegicCommonInit(void) {
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// reserve a cardmem, meaning we can use the tracelog function in bigbuff easier.
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cardmem = BigBuf_get_EM_addr();
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memset(cardmem, 0x00, LEGIC_CARD_MEMSIZE);
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if ( clear_mem )
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memset(cardmem, 0x00, LEGIC_CARD_MEMSIZE);
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clear_trace();
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set_tracing(TRUE);
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@ -470,7 +471,7 @@ int LegicRfReader(uint16_t offset, uint16_t len, uint8_t iv) {
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uint8_t isOK = 1;
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legic_card_select_t card;
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LegicCommonInit();
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LegicCommonInit(TRUE);
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if ( legic_select_card_iv(&card, iv) ) {
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isOK = 0;
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@ -513,7 +514,7 @@ void LegicRfWriter(uint16_t offset, uint16_t len, uint8_t iv, uint8_t *data) {
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goto OUT;
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}
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LegicCommonInit();
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LegicCommonInit(TRUE);
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if ( legic_select_card_iv(&card, iv) ) {
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isOK = 0;
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@ -613,7 +614,7 @@ void LegicRfInfo(void){
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uint8_t buf[sizeof(legic_card_select_t)] = {0x00};
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legic_card_select_t *card = (legic_card_select_t*) buf;
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LegicCommonInit();
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LegicCommonInit(FALSE);
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if ( legic_select_card(card) ) {
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cmd_send(CMD_ACK,0,0,0,0,0);
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@ -654,31 +655,35 @@ static void frame_handle_tag(struct legic_frame const * const f)
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// log
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//uint8_t cmdbytes[] = {bits, BYTEx(data, 0), BYTEx(data, 1)};
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//LogTrace(cmdbytes, sizeof(cmdbytes), starttime, GET_TICKS, NULL, FALSE);
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cardmem = BigBuf_get_EM_addr();
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Dbprintf("ICE: enter frame_handle_tag: %02x ", f->bits);
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/* First Part of Handshake (IV) */
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if(f->bits == 7) {
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LED_C_ON();
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// Reset prng timer
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ResetTimer(prng_timer);
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//ResetTimer(prng_timer);
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ResetTicks();
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// IV from reader.
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legic_prng_init(f->data);
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Dbprintf("ICE: IV: %02x ", f->data);
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// We should have three tagtypes with three different answers.
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frame_send_tag(0x3d, 6); /* 0x3d^0x26 = 0x1B */
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legic_prng_forward(2);
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//frame_send_tag(0x3d, 6); /* MIM1024 0x3d^0x26 = 0x1B */
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frame_send_tag(0x1d, 6); // MIM256
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legic_state = STATE_IV;
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legic_read_count = 0;
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legic_prng_bc = 0;
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legic_prng_iv = f->data;
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ResetTimer(timer);
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WaitUS(280);
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//ResetTimer(timer);
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//WaitUS(280);
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WaitTicks(388);
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return;
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}
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@ -689,8 +694,10 @@ static void frame_handle_tag(struct legic_frame const * const f)
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if((f->bits == 6) && (f->data == xored)) {
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legic_state = STATE_CON;
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ResetTimer(timer);
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WaitUS(200);
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//ResetTimer(timer);
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//WaitUS(200);
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WaitTicks(300);
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return;
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} else {
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@ -708,13 +715,14 @@ static void frame_handle_tag(struct legic_frame const * const f)
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uint16_t addr = f->data ^ key;
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addr >>= 1;
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uint8_t data = cardmem[addr];
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int hash = legic4Crc(LEGIC_READ, addr, data, 11) << 8;
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uint32_t crc = legic4Crc(LEGIC_READ, addr, data, 11) << 8;
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legic_read_count++;
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legic_prng_forward(legic_reqresp_drift);
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//legic_read_count++;
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//legic_prng_forward(legic_reqresp_drift);
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frame_send_tag(hash | data, 12);
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ResetTimer(timer);
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frame_send_tag(crc | data, 12);
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//ResetTimer(timer);
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legic_prng_forward(2);
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WaitTicks(330);
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return;
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@ -745,11 +753,11 @@ static void frame_handle_tag(struct legic_frame const * const f)
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Dbprintf("IV: %03.3x", legic_prng_iv);
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}
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legic_state = STATE_DISCON;
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legic_read_count = 0;
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SpinDelay(10);
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LED_C_OFF();
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return;
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legic_state = STATE_DISCON;
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legic_read_count = 0;
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WaitMS(10);
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LED_C_OFF();
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return;
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}
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/* Read bit by bit untill full frame is received
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@ -757,6 +765,7 @@ static void frame_handle_tag(struct legic_frame const * const f)
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*/
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static void emit(int bit) {
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Dbprintf("ICE: enter emit:");
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switch (bit) {
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case 1:
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frame_append_bit(¤t_frame, 1);
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@ -790,18 +799,24 @@ void LegicRfSimulate(int phase, int frame, int reqresp)
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*/
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int old_level = 0, active = 0;
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volatile uint32_t level = 0;
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legic_state = STATE_DISCON;
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legic_phase_drift = phase;
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legic_frame_drift = frame;
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legic_reqresp_drift = reqresp;
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FpgaDownloadAndGo(FPGA_BITSTREAM_HF);
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/* to get the stream of bits from FPGA in sim mode.*/
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SetAdcMuxFor(GPIO_MUXSEL_HIPKD);
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FpgaSetupSsc();
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FpgaWriteConfWord(FPGA_MAJOR_MODE_HF_SIMULATOR | FPGA_HF_SIMULATOR_MODULATE_212K);
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/* Bitbang the receiver */
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LINE_IN;
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// LINE_IN;
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AT91C_BASE_PIOA->PIO_ODR = GPIO_SSC_DIN;
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AT91C_BASE_PIOA->PIO_PER = GPIO_SSC_DIN;
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// need a way to determine which tagtype we are simulating
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@ -819,7 +834,8 @@ void LegicRfSimulate(int phase, int frame, int reqresp)
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DbpString("Starting Legic emulator, press button to end");
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while(!BUTTON_PRESS() && !usb_poll_validate_length()) {
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volatile uint32_t level = !!(AT91C_BASE_PIOA->PIO_PDSR & GPIO_SSC_DIN);
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level = !!(AT91C_BASE_PIOA->PIO_PDSR & GPIO_SSC_DIN);
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uint32_t time = GET_TICKS;
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@ -849,7 +865,7 @@ void LegicRfSimulate(int phase, int frame, int reqresp)
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}
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/* Frame end */
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if(time >= (RWD_TIME_1+RWD_TIME_FUZZ) && active) {
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if(time >= (RWD_TIME_1 + RWD_TIME_FUZZ) && active) {
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emit(-1);
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active = 0;
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LED_A_OFF();
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@ -860,14 +876,16 @@ void LegicRfSimulate(int phase, int frame, int reqresp)
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* shutdown in its status register. Reading the SR has the
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* side-effect of clearing any pending state in there.
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*/
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if(time >= (20*RWD_TIME_1) && (timer->TC_SR & AT91C_TC_CLKSTA))
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StopTicks();
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//if(time >= (20*RWD_TIME_1) && (timer->TC_SR & AT91C_TC_CLKSTA))
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//if(time >= (20 * RWD_TIME_1) )
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//StopTicks();
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old_level = level;
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WDT_HIT();
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}
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WDT_HIT();
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DbpString("LEGIC Prime emulator stopped");
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switch_off_tag_rwd();
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LEDsoff();
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cmd_send(CMD_ACK, 1, 0, 0, 0, 0);
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@ -35,6 +35,8 @@ bool legic_write_byte(uint16_t index, uint8_t byte, uint8_t addr_sz);
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int legic_select_card(legic_card_select_t *p_card);
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int legic_select_card_iv(legic_card_select_t *p_card, uint8_t iv);
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void LegicCommonInit(bool clear_mem);
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// emulator mem
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void LegicEMemSet(uint32_t arg0, uint32_t arg1, uint8_t *data);
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void LegicEMemGet(uint32_t arg0, uint32_t arg1);
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