armsrc: clarify static vars vs global vars, part 3

This commit is contained in:
Philippe Teuwen 2020-05-19 17:43:13 +02:00
parent 1784a3437f
commit cb8d589fc4
16 changed files with 25 additions and 32 deletions

View file

@ -157,7 +157,7 @@ version.c: default_version.c $(OBJDIR)/fpga_version_info.o $(OBJDIR)/fpga_all.o
$(info [-] GEN $@)
$(Q)sh ../tools/mkversion.sh > $@ || perl ../tools/mkversion.pl > $@ || $(CP) $^ $@
fpga_version_info.c: $(FPGA_BITSTREAMS) | $(FPGA_COMPRESSOR)
fpga_version_info.c: $(FPGA_BITSTREAMS) $(FPGA_COMPRESSOR)
$(info [-] GEN $@)
$(Q)$(FPGA_COMPRESSOR) -v $(filter %.bit,$^) $@

View file

@ -278,9 +278,9 @@ static void SendVersion(void) {
strncat(VersionString, "\n [ FPGA ]\n ", sizeof(VersionString) - strlen(VersionString) - 1);
for (int i = 0; i < fpga_bitstream_num; i++) {
strncat(VersionString, fpga_version_information[i], sizeof(VersionString) - strlen(VersionString) - 1);
if (i < fpga_bitstream_num - 1) {
for (int i = 0; i < g_fpga_bitstream_num; i++) {
strncat(VersionString, g_fpga_version_information[i], sizeof(VersionString) - strlen(VersionString) - 1);
if (i < g_fpga_bitstream_num - 1) {
strncat(VersionString, "\n ", sizeof(VersionString) - strlen(VersionString) - 1);
}
}

View file

@ -16,8 +16,8 @@
/// Calculates the value of the CSR DLYBCT field given the desired delay (in ns)
#define SPI_DLYBCT(delay, masterClock) ((uint32_t) ((((masterClock) / 1000000) * (delay)) / 32000) << 24)
uint32_t FLASHMEM_SPIBAUDRATE = FLASH_BAUD;
static uint32_t FLASHMEM_SPIBAUDRATE = FLASH_BAUD;
#define FASTFLASH (FLASHMEM_SPIBAUDRATE > FLASH_MINFAST)
void FlashmemSetSpiBaudrate(uint32_t baudrate) {
FLASHMEM_SPIBAUDRATE = baudrate;

View file

@ -106,8 +106,6 @@
#define FLASH_FASTBAUD MCK
#define FLASH_MINBAUD FLASH_FASTBAUD
#define FASTFLASH (FLASHMEM_SPIBAUDRATE > FLASH_MINFAST)
//~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~//
void FlashmemSetSpiBaudrate(uint32_t baudrate);

View file

@ -203,7 +203,7 @@ static int get_from_fpga_combined_stream(z_streamp compressed_fpga_stream, uint8
// 288 bytes from FPGA file 1, followed by 288 bytes from FGPA file 2, etc.
//----------------------------------------------------------------------------
static int get_from_fpga_stream(int bitstream_version, z_streamp compressed_fpga_stream, uint8_t *output_buffer) {
while ((uncompressed_bytes_cnt / FPGA_INTERLEAVE_SIZE) % fpga_bitstream_num != (bitstream_version - 1)) {
while ((uncompressed_bytes_cnt / FPGA_INTERLEAVE_SIZE) % g_fpga_bitstream_num != (bitstream_version - 1)) {
// skip undesired data belonging to other bitstream_versions
get_from_fpga_combined_stream(compressed_fpga_stream, output_buffer);
}
@ -509,7 +509,7 @@ void SetAdcMuxFor(uint32_t whichGpio) {
void Fpga_print_status(void) {
DbpString(_BLUE_("Currently loaded FPGA image"));
Dbprintf(" mode....................%s", fpga_version_information[downloaded_bitstream - 1]);
Dbprintf(" mode....................%s", g_fpga_version_information[downloaded_bitstream - 1]);
}
int FpgaGetCurrent(void) {

View file

@ -32,7 +32,7 @@
#define I2C_ERROR "I2C_WaitAck Error"
volatile unsigned long c;
static volatile unsigned long c;
// Direct use the loop to delay. 6 instructions loop, Masterclock 48MHz,
// delay=1 is about 200kbps

View file

@ -184,7 +184,7 @@ static tUart14a Uart;
// 0011 - a 2 tick wide pause, or a three tick wide pause shifted left
// 0111 - a 2 tick wide pause shifted left
// 1001 - a 2 tick wide pause shifted right
const bool Mod_Miller_LUT[] = {
static const bool Mod_Miller_LUT[] = {
false, true, false, true, false, false, false, true,
false, true, false, false, false, false, false, false
};
@ -351,11 +351,11 @@ RAMFUNC bool MillerDecoding(uint8_t bit, uint32_t non_real_time) {
// 8 ticks modulated: A collision. Save the collision position and treat as Sequence D
// Note 1: the bitstream may start at any time. We therefore need to sync.
// Note 2: parameter offset is used to determine the position of the parity bits (required for the anticollision command only)
tDemod14a Demod;
static tDemod14a Demod;
// Lookup-Table to decide if 4 raw bits are a modulation.
// We accept three or four "1" in any position
const bool Mod_Manchester_LUT[] = {
static const bool Mod_Manchester_LUT[] = {
false, false, false, false, false, false, false, true,
false, false, false, true, false, true, true, true
};

View file

@ -100,10 +100,10 @@ static void pushBit(BitstreamOut *stream, uint8_t bit) {
}
// Holds bit packed struct of samples.
BitstreamOut data = {0, 0, 0};
static BitstreamOut data = {0, 0, 0};
// internal struct to keep track of samples gathered
sampling_t samples = {0, 0, 0, 0};
static sampling_t samples = {0, 0, 0, 0};
void initSampleBuffer(uint32_t *sample_size) {
initSampleBufferEx(sample_size, false);

View file

@ -33,7 +33,7 @@ static uint8_t deselect_cmd[] = {0xc2, 0xe0, 0xb4};
/* PCB CID CMD PAYLOAD */
//static uint8_t __res[MAX_FRAME_SIZE];
struct desfire_key skey = {0};
static struct desfire_key skey = {0};
static desfirekey_t sessionkey = &skey;
bool InitDesfireCard(void) {

View file

@ -27,8 +27,6 @@
#define FLASH_FASTBAUD MCK
#define FLASH_MINBAUD FLASH_FASTBAUD
#define FASTFLASH (FLASHMEM_SPIBAUDRATE > FLASH_MINFAST)
static int CmdHelp(const char *Cmd);
static int usage_flashmem_spibaud(void) {

View file

@ -12,7 +12,7 @@
// b is 8bit lsfr
// c keeps track on which step the prng is.
// legic_prng_get_bit() = gets a bit muxed from a and b.
struct lfsr {
static struct lfsr {
uint8_t a;
uint8_t b;
uint32_t c;

View file

@ -25,7 +25,7 @@ const uint8_t OddByteParity[256] = {
0, 1, 1, 0, 1, 0, 0, 1, 1, 0, 0, 1, 0, 1, 1, 0,
1, 0, 0, 1, 0, 1, 1, 0, 0, 1, 1, 0, 1, 0, 0, 1
};
/*
const uint8_t EvenByteParity[256] = {
0, 1, 1, 0, 1, 0, 0, 1, 1, 0, 0, 1, 0, 1, 1, 0,
1, 0, 0, 1, 0, 1, 1, 0, 0, 1, 1, 0, 1, 0, 0, 1,
@ -44,4 +44,4 @@ const uint8_t EvenByteParity[256] = {
1, 0, 0, 1, 0, 1, 1, 0, 0, 1, 1, 0, 1, 0, 0, 1,
0, 1, 1, 0, 1, 0, 0, 1, 1, 0, 0, 1, 0, 1, 1, 0
};
*/

View file

@ -130,9 +130,9 @@ AT91SAM7S256 USB Device Port
#define SET_CONTROL_LINE_STATE 0x2221
AT91PS_UDP pUdp = AT91C_BASE_UDP;
uint8_t btConfiguration = 0;
uint8_t btConnection = 0;
uint8_t btReceiveBank = AT91C_UDP_RX_DATA_BK0;
static uint8_t btConfiguration = 0;
static uint8_t btConnection = 0;
static uint8_t btReceiveBank = AT91C_UDP_RX_DATA_BK0;
static const char devDescriptor[] = {
/* Device descriptor */

View file

@ -17,7 +17,7 @@
#define FPGA_TRACE_SIZE 3072
static const uint8_t bitparse_fixed_header[] = {0x00, 0x09, 0x0f, 0xf0, 0x0f, 0xf0, 0x0f, 0xf0, 0x0f, 0xf0, 0x00, 0x00, 0x01};
extern const int fpga_bitstream_num;
extern const char *const fpga_version_information[];
extern const int g_fpga_bitstream_num;
extern const char *const g_fpga_version_information[];
#endif

View file

@ -14,9 +14,6 @@
#include "common.h"
// Flashmem spi baudrate
extern uint32_t FLASHMEM_SPIBAUDRATE;
// RDV40 Section
// 256kb divided into 4k sectors.
//

View file

@ -378,8 +378,8 @@ static void print_version_info_preamble(FILE *outfile, int num_infiles) {
fprintf(outfile, "//-----------------------------------------------------------------------------\n");
fprintf(outfile, "\n");
fprintf(outfile, "\n");
fprintf(outfile, "const int fpga_bitstream_num = %d;\n", num_infiles);
fprintf(outfile, "const char *const fpga_version_information[%d] = {\n", num_infiles);
fprintf(outfile, "const int g_fpga_bitstream_num = %d;\n", num_infiles);
fprintf(outfile, "const char *const g_fpga_version_information[%d] = {\n", num_infiles);
}
static int generate_fpga_version_info(FILE *infile[], char *infile_names[], int num_infiles, FILE *outfile) {