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armsrc: clarify static vars vs global vars, part 3
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@ -157,7 +157,7 @@ version.c: default_version.c $(OBJDIR)/fpga_version_info.o $(OBJDIR)/fpga_all.o
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$(info [-] GEN $@)
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$(Q)sh ../tools/mkversion.sh > $@ || perl ../tools/mkversion.pl > $@ || $(CP) $^ $@
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fpga_version_info.c: $(FPGA_BITSTREAMS) | $(FPGA_COMPRESSOR)
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fpga_version_info.c: $(FPGA_BITSTREAMS) $(FPGA_COMPRESSOR)
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$(info [-] GEN $@)
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$(Q)$(FPGA_COMPRESSOR) -v $(filter %.bit,$^) $@
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@ -278,9 +278,9 @@ static void SendVersion(void) {
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strncat(VersionString, "\n [ FPGA ]\n ", sizeof(VersionString) - strlen(VersionString) - 1);
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for (int i = 0; i < fpga_bitstream_num; i++) {
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strncat(VersionString, fpga_version_information[i], sizeof(VersionString) - strlen(VersionString) - 1);
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if (i < fpga_bitstream_num - 1) {
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for (int i = 0; i < g_fpga_bitstream_num; i++) {
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strncat(VersionString, g_fpga_version_information[i], sizeof(VersionString) - strlen(VersionString) - 1);
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if (i < g_fpga_bitstream_num - 1) {
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strncat(VersionString, "\n ", sizeof(VersionString) - strlen(VersionString) - 1);
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}
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}
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@ -16,8 +16,8 @@
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/// Calculates the value of the CSR DLYBCT field given the desired delay (in ns)
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#define SPI_DLYBCT(delay, masterClock) ((uint32_t) ((((masterClock) / 1000000) * (delay)) / 32000) << 24)
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uint32_t FLASHMEM_SPIBAUDRATE = FLASH_BAUD;
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static uint32_t FLASHMEM_SPIBAUDRATE = FLASH_BAUD;
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#define FASTFLASH (FLASHMEM_SPIBAUDRATE > FLASH_MINFAST)
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void FlashmemSetSpiBaudrate(uint32_t baudrate) {
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FLASHMEM_SPIBAUDRATE = baudrate;
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@ -106,8 +106,6 @@
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#define FLASH_FASTBAUD MCK
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#define FLASH_MINBAUD FLASH_FASTBAUD
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#define FASTFLASH (FLASHMEM_SPIBAUDRATE > FLASH_MINFAST)
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//~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~//
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void FlashmemSetSpiBaudrate(uint32_t baudrate);
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@ -203,7 +203,7 @@ static int get_from_fpga_combined_stream(z_streamp compressed_fpga_stream, uint8
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// 288 bytes from FPGA file 1, followed by 288 bytes from FGPA file 2, etc.
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//----------------------------------------------------------------------------
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static int get_from_fpga_stream(int bitstream_version, z_streamp compressed_fpga_stream, uint8_t *output_buffer) {
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while ((uncompressed_bytes_cnt / FPGA_INTERLEAVE_SIZE) % fpga_bitstream_num != (bitstream_version - 1)) {
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while ((uncompressed_bytes_cnt / FPGA_INTERLEAVE_SIZE) % g_fpga_bitstream_num != (bitstream_version - 1)) {
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// skip undesired data belonging to other bitstream_versions
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get_from_fpga_combined_stream(compressed_fpga_stream, output_buffer);
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}
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@ -509,7 +509,7 @@ void SetAdcMuxFor(uint32_t whichGpio) {
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void Fpga_print_status(void) {
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DbpString(_BLUE_("Currently loaded FPGA image"));
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Dbprintf(" mode....................%s", fpga_version_information[downloaded_bitstream - 1]);
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Dbprintf(" mode....................%s", g_fpga_version_information[downloaded_bitstream - 1]);
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}
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int FpgaGetCurrent(void) {
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@ -32,7 +32,7 @@
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#define I2C_ERROR "I2C_WaitAck Error"
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volatile unsigned long c;
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static volatile unsigned long c;
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// Direct use the loop to delay. 6 instructions loop, Masterclock 48MHz,
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// delay=1 is about 200kbps
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@ -184,7 +184,7 @@ static tUart14a Uart;
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// 0011 - a 2 tick wide pause, or a three tick wide pause shifted left
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// 0111 - a 2 tick wide pause shifted left
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// 1001 - a 2 tick wide pause shifted right
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const bool Mod_Miller_LUT[] = {
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static const bool Mod_Miller_LUT[] = {
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false, true, false, true, false, false, false, true,
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false, true, false, false, false, false, false, false
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};
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@ -351,11 +351,11 @@ RAMFUNC bool MillerDecoding(uint8_t bit, uint32_t non_real_time) {
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// 8 ticks modulated: A collision. Save the collision position and treat as Sequence D
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// Note 1: the bitstream may start at any time. We therefore need to sync.
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// Note 2: parameter offset is used to determine the position of the parity bits (required for the anticollision command only)
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tDemod14a Demod;
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static tDemod14a Demod;
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// Lookup-Table to decide if 4 raw bits are a modulation.
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// We accept three or four "1" in any position
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const bool Mod_Manchester_LUT[] = {
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static const bool Mod_Manchester_LUT[] = {
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false, false, false, false, false, false, false, true,
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false, false, false, true, false, true, true, true
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};
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@ -100,10 +100,10 @@ static void pushBit(BitstreamOut *stream, uint8_t bit) {
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}
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// Holds bit packed struct of samples.
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BitstreamOut data = {0, 0, 0};
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static BitstreamOut data = {0, 0, 0};
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// internal struct to keep track of samples gathered
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sampling_t samples = {0, 0, 0, 0};
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static sampling_t samples = {0, 0, 0, 0};
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void initSampleBuffer(uint32_t *sample_size) {
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initSampleBufferEx(sample_size, false);
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@ -33,7 +33,7 @@ static uint8_t deselect_cmd[] = {0xc2, 0xe0, 0xb4};
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/* PCB CID CMD PAYLOAD */
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//static uint8_t __res[MAX_FRAME_SIZE];
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struct desfire_key skey = {0};
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static struct desfire_key skey = {0};
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static desfirekey_t sessionkey = &skey;
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bool InitDesfireCard(void) {
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@ -27,8 +27,6 @@
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#define FLASH_FASTBAUD MCK
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#define FLASH_MINBAUD FLASH_FASTBAUD
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#define FASTFLASH (FLASHMEM_SPIBAUDRATE > FLASH_MINFAST)
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static int CmdHelp(const char *Cmd);
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static int usage_flashmem_spibaud(void) {
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@ -12,7 +12,7 @@
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// b is 8bit lsfr
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// c keeps track on which step the prng is.
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// legic_prng_get_bit() = gets a bit muxed from a and b.
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struct lfsr {
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static struct lfsr {
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uint8_t a;
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uint8_t b;
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uint32_t c;
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@ -25,7 +25,7 @@ const uint8_t OddByteParity[256] = {
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0, 1, 1, 0, 1, 0, 0, 1, 1, 0, 0, 1, 0, 1, 1, 0,
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1, 0, 0, 1, 0, 1, 1, 0, 0, 1, 1, 0, 1, 0, 0, 1
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};
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/*
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const uint8_t EvenByteParity[256] = {
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0, 1, 1, 0, 1, 0, 0, 1, 1, 0, 0, 1, 0, 1, 1, 0,
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1, 0, 0, 1, 0, 1, 1, 0, 0, 1, 1, 0, 1, 0, 0, 1,
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@ -44,4 +44,4 @@ const uint8_t EvenByteParity[256] = {
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1, 0, 0, 1, 0, 1, 1, 0, 0, 1, 1, 0, 1, 0, 0, 1,
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0, 1, 1, 0, 1, 0, 0, 1, 1, 0, 0, 1, 0, 1, 1, 0
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};
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*/
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@ -130,9 +130,9 @@ AT91SAM7S256 USB Device Port
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#define SET_CONTROL_LINE_STATE 0x2221
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AT91PS_UDP pUdp = AT91C_BASE_UDP;
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uint8_t btConfiguration = 0;
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uint8_t btConnection = 0;
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uint8_t btReceiveBank = AT91C_UDP_RX_DATA_BK0;
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static uint8_t btConfiguration = 0;
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static uint8_t btConnection = 0;
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static uint8_t btReceiveBank = AT91C_UDP_RX_DATA_BK0;
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static const char devDescriptor[] = {
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/* Device descriptor */
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@ -17,7 +17,7 @@
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#define FPGA_TRACE_SIZE 3072
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static const uint8_t bitparse_fixed_header[] = {0x00, 0x09, 0x0f, 0xf0, 0x0f, 0xf0, 0x0f, 0xf0, 0x0f, 0xf0, 0x00, 0x00, 0x01};
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extern const int fpga_bitstream_num;
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extern const char *const fpga_version_information[];
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extern const int g_fpga_bitstream_num;
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extern const char *const g_fpga_version_information[];
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#endif
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@ -14,9 +14,6 @@
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#include "common.h"
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// Flashmem spi baudrate
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extern uint32_t FLASHMEM_SPIBAUDRATE;
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// RDV40 Section
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// 256kb divided into 4k sectors.
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//
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@ -378,8 +378,8 @@ static void print_version_info_preamble(FILE *outfile, int num_infiles) {
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fprintf(outfile, "//-----------------------------------------------------------------------------\n");
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fprintf(outfile, "\n");
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fprintf(outfile, "\n");
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fprintf(outfile, "const int fpga_bitstream_num = %d;\n", num_infiles);
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fprintf(outfile, "const char *const fpga_version_information[%d] = {\n", num_infiles);
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fprintf(outfile, "const int g_fpga_bitstream_num = %d;\n", num_infiles);
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fprintf(outfile, "const char *const g_fpga_version_information[%d] = {\n", num_infiles);
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}
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static int generate_fpga_version_info(FILE *infile[], char *infile_names[], int num_infiles, FILE *outfile) {
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