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<a id="Top"></a>
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# Notes on device side clocks
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The device side firmware uses a range of different clocks. Here is an attempt to document the clocks in use and for what they are used.
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@ -17,24 +19,28 @@ The device side firmware uses a range of different clocks. Here is an attempt t
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- [Occasional TC0+TC1 / Ticks functions](#occasional-tc0tc1--ticks-functions)
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## Slow clock
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^[Top](#top)
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~32kHz internal RC clock
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Can be between 22 and 42 kHz
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## Main Oscillator / MAINCK
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^[Top](#top)
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cf `PMC_MOR` register
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16 MHz, based on external Xtal
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## PLL clock
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^[Top](#top)
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cf `PMC_PLLR` register
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96 MHz (MAINCK * 12 / 2)
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## Master Clock MCK, Processor Clock PCK, USB clock UDPCK
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^[Top](#top)
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cf `common_arm/clocks.c`
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@ -51,6 +57,7 @@ USB need to be clocked at 48 MHz from the PLL, so PLL / 2 (cf `CKGR_PLLR`).
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## Peripheral clocks
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^[Top](#top)
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cf `bootrom.c`:
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@ -61,6 +68,7 @@ cf `appmain.c`
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Activate PCK0 pin as clock output, based on PLL / 4 = 24 MHz, for the FPGA.
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## 1 kHz RTC: TickCount functions
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^[Top](#top)
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cf `armsrc/ticks.c`
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@ -91,6 +99,7 @@ Current usages:
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* USB connection speed measure
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## Occasional PWM timer
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^[Top](#top)
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* `void SpinDelayUs(int us)`
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* `void SpinDelay(int ms)` based on SpinDelayUs
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@ -102,6 +111,7 @@ Busy wait based on 46.875 kHz PWM Channel 0
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* *Precision* variant: 0.7 us precision and maximum 43 ms
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## Occasional TC0+TC1 / CountUS functions
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^[Top](#top)
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cf `armsrc/ticks.c`
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@ -118,6 +128,7 @@ Maximal value: 0x7fffffff = 2147 s
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Can't be used at the same time as CountSspClk or Ticks functions.
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## Occasional TC0+TC1+TC2 SSP_CLK from FPGA / CountSspClk functions
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^[Top](#top)
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cf `armsrc/ticks.c`
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@ -139,6 +150,7 @@ Usage:
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Can't be used at the same time as CountUS or Ticks functions.
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## Occasional TC0+TC1 / Ticks functions
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^[Top](#top)
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cf `armsrc/ticks.c`
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