From d3d98282acd0ae068ebc788f799cf8bb9f7684b5 Mon Sep 17 00:00:00 2001 From: iceman1001 Date: Sat, 18 May 2019 17:57:30 +0200 Subject: [PATCH] comments about Fractional parts in the baudrate generator --- common/usart.c | 13 ++++++++++++- 1 file changed, 12 insertions(+), 1 deletion(-) diff --git a/common/usart.c b/common/usart.c index ecae58d0b..e6c7373c5 100644 --- a/common/usart.c +++ b/common/usart.c @@ -199,7 +199,7 @@ void usart_init(uint32_t baudrate, uint8_t parity) { pPIO->PIO_PPUER |= (AT91C_PA21_RXD1 | AT91C_PA22_TXD1); // set mode - uint32_t mode = AT91C_US_USMODE_NORMAL | // normal mode + uint32_t mode = AT91C_US_USMODE_NORMAL | // normal mode AT91C_US_CLKS_CLOCK | // MCK (48MHz) AT91C_US_OVER | // oversampling AT91C_US_CHRL_8_BITS | // 8 bits @@ -222,9 +222,20 @@ void usart_init(uint32_t baudrate, uint8_t parity) { // all interrupts disabled pUS1->US_IDR = 0xFFFF; + // http://ww1.microchip.com/downloads/en/DeviceDoc/doc6175.pdf // note that for very large baudrates, error is not neglectible: // b921600 => 8.6% // b1382400 => 8.6% + // FP, Fractional Part (Datasheet p402, Supported in AT91SAM512 / 256) (31.6.1.3) + // FP = 0 disabled; + // FP = 1-7 Baudrate resolution, + // CD, Clock divider, + // sync == 0 , (async?) + // OVER = 0, -no + // baudrate == selected clock/16/CD + // OVER = 1, -yes we are oversampling + // baudrate == selected clock/8/CD --> this is ours + // pUS1->US_BRGR = 48000000 / (usart_baudrate << 3); // Write the Timeguard Register