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CHG: lowered the timout again, but re-added the spindelay since 14a requires 5ms powerup before entering the idle-state where tag starts to listen.

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CHG: fix the ticks compare xx > 1 into  xx >= 1
This commit is contained in:
iceman1001 2016-09-23 23:23:17 +02:00
parent 93b7aa8f88
commit d5bded10e2
2 changed files with 4 additions and 2 deletions
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4
armsrc/iso14443a.c
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@ -2001,6 +2001,8 @@ void iso14443a_setup(uint8_t fpga_minor_mode) {
LED_D_ON(); LED_D_ON();
FpgaWriteConfWord(FPGA_MAJOR_MODE_HF_ISO14443A | fpga_minor_mode); FpgaWriteConfWord(FPGA_MAJOR_MODE_HF_ISO14443A | fpga_minor_mode);
SpinDelay(20);
// Start the timer // Start the timer
StartCountSspClk(); StartCountSspClk();
@ -2009,7 +2011,7 @@ void iso14443a_setup(uint8_t fpga_minor_mode) {
DemodReset(); DemodReset();
UartReset(); UartReset();
NextTransferTime = 2 * DELAY_ARM2AIR_AS_READER; NextTransferTime = 2 * DELAY_ARM2AIR_AS_READER;
iso14a_set_timeout(20*106); // 20ms default iso14a_set_timeout(10*106); // 20ms default
} }
int iso14_apdu(uint8_t *cmd, uint16_t cmd_len, void *data) { int iso14_apdu(uint8_t *cmd, uint16_t cmd_len, void *data) {

2
armsrc/ticks.c
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@ -211,5 +211,5 @@ void ResetTicks(){
} }
void ResetTimer(AT91PS_TC timer){ void ResetTimer(AT91PS_TC timer){
timer->TC_CCR = AT91C_TC_CLKEN | AT91C_TC_SWTRG; timer->TC_CCR = AT91C_TC_CLKEN | AT91C_TC_SWTRG;
while(timer->TC_CV > 1) ; while(timer->TC_CV >= 1) ;
} }