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FIX: lf hitag : Mea culpa, simulation should not have reader_field on. thanks to @Tiberius and @aczid for pointing out one of my mistakes from 2014.
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2 changed files with 2 additions and 2 deletions
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@ -999,7 +999,7 @@ void SimulateHitagTag(bool tag_mem_supplied, byte_t* data) {
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// Set up simulator mode, frequency divisor which will drive the FPGA
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// Set up simulator mode, frequency divisor which will drive the FPGA
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// and analog mux selection.
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// and analog mux selection.
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FpgaWriteConfWord(FPGA_MAJOR_MODE_LF_EDGE_DETECT | FPGA_LF_EDGE_DETECT_READER_FIELD);
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FpgaWriteConfWord(FPGA_MAJOR_MODE_LF_EDGE_DETECT);
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FpgaSendCommand(FPGA_CMD_SET_DIVISOR, 95); //125Khz
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FpgaSendCommand(FPGA_CMD_SET_DIVISOR, 95); //125Khz
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SetAdcMuxFor(GPIO_MUXSEL_LOPKD);
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SetAdcMuxFor(GPIO_MUXSEL_LOPKD);
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RELAY_OFF();
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RELAY_OFF();
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@ -1026,7 +1026,7 @@ void SimulateHitagSTag(bool tag_mem_supplied, byte_t* data) {
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// Set up simulator mode, frequency divisor which will drive the FPGA
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// Set up simulator mode, frequency divisor which will drive the FPGA
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// and analog mux selection.
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// and analog mux selection.
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FpgaDownloadAndGo(FPGA_BITSTREAM_LF);
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FpgaDownloadAndGo(FPGA_BITSTREAM_LF);
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FpgaWriteConfWord(FPGA_MAJOR_MODE_LF_EDGE_DETECT | FPGA_LF_EDGE_DETECT_READER_FIELD);
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FpgaWriteConfWord(FPGA_MAJOR_MODE_LF_EDGE_DETECT);
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FpgaSendCommand(FPGA_CMD_SET_DIVISOR, 95); //125Khz
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FpgaSendCommand(FPGA_CMD_SET_DIVISOR, 95); //125Khz
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SetAdcMuxFor(GPIO_MUXSEL_LOPKD);
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SetAdcMuxFor(GPIO_MUXSEL_LOPKD);
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RELAY_OFF();
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RELAY_OFF();
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