From f4409ab3750a35f12bbdc848998f3a61ae7e22bc Mon Sep 17 00:00:00 2001 From: iceman1001 Date: Sat, 9 Mar 2019 11:51:18 +0100 Subject: [PATCH] chg: revert it --- armsrc/fpgaloader.c | 11 +++-------- armsrc/fpgaloader.h | 1 - 2 files changed, 3 insertions(+), 9 deletions(-) diff --git a/armsrc/fpgaloader.c b/armsrc/fpgaloader.c index 6f8489026..18430b78b 100644 --- a/armsrc/fpgaloader.c +++ b/armsrc/fpgaloader.c @@ -118,7 +118,7 @@ void SetupSpi(int mode) { // Set up the synchronous serial port, with the one set of options that we // always use when we are talking to the FPGA. Both RX and TX are enabled. //----------------------------------------------------------------------------- -void FpgaSetupSscExt(uint8_t clearPCER) { +void FpgaSetupSsc(void) { // First configure the GPIOs, and get ourselves a clock. AT91C_BASE_PIOA->PIO_ASR = GPIO_SSC_FRAME | @@ -127,10 +127,7 @@ void FpgaSetupSscExt(uint8_t clearPCER) { GPIO_SSC_CLK; AT91C_BASE_PIOA->PIO_PDR = GPIO_SSC_DOUT; - if ( clearPCER ) AT91C_BASE_PMC->PMC_PCER = (1 << AT91C_ID_SSC); - else - AT91C_BASE_PMC->PMC_PCER |= (1 << AT91C_ID_SSC); // Now set up the SSC proper, starting from a known state. AT91C_BASE_SSC->SSC_CR = AT91C_SSC_SWRST; @@ -152,9 +149,7 @@ void FpgaSetupSscExt(uint8_t clearPCER) { AT91C_BASE_SSC->SSC_CR = AT91C_SSC_RXEN | AT91C_SSC_TXEN; } -void FpgaSetupSsc(void) { - FpgaSetupSscExt(true); -} + //----------------------------------------------------------------------------- // Set up DMA to receive samples from the FPGA. We will use the PDC, with // a single buffer as a circular buffer (so that we just chain back to @@ -247,7 +242,7 @@ static bool reset_fpga_stream(int bitstream_version, z_streamp compressed_fpga_s return false; } -static void DownloadFPGA_byte(unsigned char w) { +static void DownloadFPGA_byte( uint8_t w) { #define SEND_BIT(x) { if(w & (1<