diff --git a/fpga/fpga_hf.v b/fpga/fpga_hf.v
index ff7c904a5..a2100df65 100644
--- a/fpga/fpga_hf.v
+++ b/fpga/fpga_hf.v
@@ -10,6 +10,7 @@
 //
 // Jonathan Westhues, March 2006
 // Added ISO14443-A support by Gerhard de Koning Gans, April 2008
+// iZsh <izsh at fail0verflow.com>, June 2014
 //-----------------------------------------------------------------------------
 
 `include "hi_read_tx.v"
diff --git a/fpga/fpga_lf.v b/fpga/fpga_lf.v
index 8dea68d75..1e20aa903 100644
--- a/fpga/fpga_lf.v
+++ b/fpga/fpga_lf.v
@@ -9,7 +9,7 @@
 // could be improved.
 //
 // Jonathan Westhues, March 2006
-// Added ISO14443-A support by Gerhard de Koning Gans, April 2008
+// iZsh <izsh at fail0verflow.com>, June 2014
 //-----------------------------------------------------------------------------
 
 `include "lo_read.v"
diff --git a/fpga/lo_edge_detect.v b/fpga/lo_edge_detect.v
index af600b833..2856e5c65 100644
--- a/fpga/lo_edge_detect.v
+++ b/fpga/lo_edge_detect.v
@@ -4,6 +4,7 @@
 // (because it is so slow).
 //
 // Jonathan Westhues, April 2006
+// iZsh <izsh at fail0verflow.com>, June 2014
 //-----------------------------------------------------------------------------
 
 module lo_edge_detect(
diff --git a/fpga/lo_passthru.v b/fpga/lo_passthru.v
index 933728eb0..3507f660e 100644
--- a/fpga/lo_passthru.v
+++ b/fpga/lo_passthru.v
@@ -2,6 +2,7 @@
 // For reading TI tags, we need to place the FPGA in pass through mode
 // and pass everything through to the ARM
 //-----------------------------------------------------------------------------
+// iZsh <izsh at fail0verflow.com>, June 2014
 
 module lo_passthru(
 	input pck_divclk,
diff --git a/fpga/lo_read.v b/fpga/lo_read.v
index f2d79127c..b1fa7fc70 100644
--- a/fpga/lo_read.v
+++ b/fpga/lo_read.v
@@ -4,6 +4,7 @@
 // The A/D samples at that same rate and the result is serialized.
 //
 // Jonathan Westhues, April 2006
+// iZsh <izsh at fail0verflow.com>, June 2014
 //-----------------------------------------------------------------------------
 
 module lo_read(