mirror of
https://github.com/RfidResearchGroup/proxmark3.git
synced 2025-01-02 05:33:42 +08:00
ADD: flashmemory functionality for RDV40 Huge thanks to @willok !
This commit is contained in:
iceman1001
parent
e182d12ba8
commit
fd1b86d607
3 changed files with 281 additions and 316 deletions
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@ -3,6 +3,7 @@ All notable changes to this project will be documented in this file.
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This project uses the changelog in accordance with [keepchangelog](http://keepachangelog.com/). Please use this to write notable changes, which is not the same as git commit log...
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## [unreleased][unreleased]
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- Add FlashMemory functionality (RDV40) (Thanks @willok)
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- Fix 'hf mfu dump' - partial reads lead to corrupt data (Thanks @elafargue for pointing it out)
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- 'hf mfu dumop / read' - now retries five times. (@jamchamb)
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- Added `hf list mf` - deciphers crypto1 stream and works with first authentication and weak nested authentications (@Merlok)
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@ -3,9 +3,6 @@
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#define address_length 3
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/* here: use NCPS2 @ PA10: */
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#define NCPS_PDR_BIT AT91C_PA10_NPCS2 // GPIO
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#define NCPS_ASR_BIT 0 // SPI peripheral A
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#define NCPS_BSR_BIT AT91C_PA10_NPCS2 // SPI peripheral B
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#define SPI_CSR_NUM 2 // Chip Select register[] 0,1,2,3 (at91samv512 has 4)
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/* PCS_0 for NPCS0, PCS_1 for NPCS1 ... */
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@ -28,97 +25,72 @@
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// not realy - when using an external address decoder...
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// but this code takes over the complete SPI-interace anyway
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#endif
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/*
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1. variable chip select (PS=1) ChipSelect number is written to TDR in EVERY transfer
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2. fixed chip select (PS=0),
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FIXED = you manage the CS lines
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VARIABLE = SPI module manages the CS lines
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/*
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读取指令，可以从一个位置开始持续的读，最多能将整块芯片读取完
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页写指令，每次写入为1-256字节，但是不能跨越256字节边界
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擦除指令，擦除指令后必须将CS拉高，否则不会执行
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*/
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void FlashSetup(void) {
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// 初始化Flash
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void FlashSetup()
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{
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// PA1 -> SPI_NCS3 chip select (MEM)
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// PA10 -> SPI_NCS2 chip select (LCD)
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// PA11 -> SPI_NCS0 chip select (FPGA)
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// PA12 -> SPI_MISO Master-In Slave-Out
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// PA13 -> SPI_MOSI Master-Out Slave-In
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// PA14 -> SPI_SPCK Serial Clock
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// Kill all the pullups,
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//AT91C_BASE_PIOA->PIO_PPUDR = GPIO_NCS1 | GPIO_MOSI | GPIO_SPCK | GPIO_MISO;
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// Disable PIO control of the following pins, allows use by the SPI peripheral
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AT91C_BASE_PIOA->PIO_PDR = GPIO_NCS0 | GPIO_MISO | GPIO_MOSI | GPIO_SPCK | GPIO_NCS2;
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// These pins are outputs
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//AT91C_BASE_PIOA->PIO_OER = GPIO_NCS1 | GPIO_MOSI | GPIO_SPCK;
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// PIO controls the following pins
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//AT91C_BASE_PIOA->PIO_PER = GPIO_NCS1 | GPIO_MOSI | GPIO_SPCK | GPIO_MISO;
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// Disable PIO control of the following pins, hand over to SPI control
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AT91C_BASE_PIOA->PIO_PDR = GPIO_MISO | GPIO_MOSI | GPIO_SPCK | NCPS_PDR_BIT;
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// Pull-up Enable
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AT91C_BASE_PIOA->PIO_PPUER = GPIO_NCS0 | GPIO_MISO | GPIO_MOSI | GPIO_SPCK | GPIO_NCS2;
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// Peripheral A
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AT91C_BASE_PIOA->PIO_ASR = GPIO_MISO | GPIO_MOSI | GPIO_SPCK | NCPS_ASR_BIT;
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// Peripheral B
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AT91C_BASE_PIOA->PIO_BSR = GPIO_MISO | GPIO_MOSI | GPIO_SPCK | NCPS_BSR_BIT ;
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AT91C_BASE_PIOA->PIO_ASR = GPIO_NCS0 | GPIO_MISO | GPIO_MOSI | GPIO_SPCK;
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// set chip-select as output high (unselect card)
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AT91C_BASE_PIOA->PIO_PER = NCPS_PDR_BIT; // enable GPIO of CS-pin
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AT91C_BASE_PIOA->PIO_SODR = NCPS_PDR_BIT; // set high
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AT91C_BASE_PIOA->PIO_OER = NCPS_PDR_BIT; // output enable
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// Peripheral B
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AT91C_BASE_PIOA->PIO_BSR |= GPIO_NCS2;
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//enable the SPI Peripheral clock
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AT91C_BASE_PMC->PMC_PCER = (1 << AT91C_ID_SPI);
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// SPI Mode register
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/*
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AT91C_BASE_SPI->SPI_MR =
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(0 << 24) | // DLYBCS, Delay between chip selects (take default: 6 MCK periods)
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(0 << 7) | // LLB, Local Loopback Disabled
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AT91C_SPI_MODFDIS | // Mode Fault Detection disabled
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(0 << 2) | // PCSDEC, Chip selects connected directly to peripheral
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AT91C_SPI_PS_FIXED | // PS, Fixed Peripheral Select
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AT91C_SPI_MSTR; // MSTR, Master Mode
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*/
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AT91C_BASE_SPI->SPI_MR = AT91C_SPI_MSTR | AT91C_SPI_PS_FIXED | AT91C_SPI_MODFDIS;
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// PCS, Peripheral Chip Select
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AT91C_BASE_SPI->SPI_MR |= ( (SPI_MR_PCS << 16) & AT91C_SPI_PCS );
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// SPI Chip select register
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/*
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AT91C_BASE_SPI->SPI_CSR[SPI_CSR_NUM] =
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(1 << 24) | // Delay between Consecutive Transfers (32 MCK periods)
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(1 << 16) | // Delay Before SPCK (1 MCK period)
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(6 << 8) | // Serial Clock Baud Rate (baudrate = MCK/6 = 24Mhz/6 = 4M baud
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AT91C_SPI_BITS_8 | // Bits per Transfer (8 bits)
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(0 << 3) | // CSAAT, Chip Select inactive after transfer
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AT91C_SPI_NCPHA | // NCPHA, Clock Phase data captured on leading edge, changes on following edge
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(0 << 0); // CPOL, Clock Polarity inactive state is logic 0
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*/
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AT91C_BASE_SPI->SPI_CSR[SPI_CSR_NUM] = AT91C_SPI_NCPHA | AT91C_SPI_BITS_8 | (6 << 8);
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// Enable SPI
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AT91C_BASE_SPI->SPI_CR = AT91C_SPI_SPIEN;
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/* Send 20 spi commands with card not selected */
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for (int i=0; i<21; i++)
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FlashSend(0xFF);
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// NPCS2 Mode 0
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AT91C_BASE_SPI->SPI_MR =
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( 0 << 24) | // Delay between chip selects (take default: 6 MCK periods)
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(0xB << 16) | // Peripheral Chip Select (selects SPI_NCS2 or PA10)
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( 0 << 7) | // Local Loopback Disabled
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( 1 << 4) | // Mode Fault Detection disabled
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( 0 << 2) | // Chip selects connected directly to peripheral
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( 0 << 1) | // Fixed Peripheral Select
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( 1 << 0); // Master Mode
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// 8 bit
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AT91C_BASE_SPI->SPI_CSR[2] =
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( 0 << 24) | // Delay between Consecutive Transfers (32 MCK periods)
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( 0 << 16) | // Delay Before SPCK (1 MCK period)
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( 6 << 8) | // Serial Clock Baud Rate (baudrate = MCK/6 = 24Mhz/6 = 4M baud
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( 0 << 4) | // Bits per Transfer (8 bits)
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( 1 << 3) | // Chip Select inactive after transfer
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( 1 << 1) | // Clock Phase data captured on leading edge, changes on following edge
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( 0 << 0); // Clock Polarity inactive state is logic 0
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// read first, empty buffer
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if (AT91C_BASE_SPI->SPI_RDR == 0)
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;
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/* enable automatic chip-select */
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// reset PIO-registers of CS-pin to default
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AT91C_BASE_PIOA->PIO_ODR |= NCPS_PDR_BIT; // input
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AT91C_BASE_PIOA->PIO_CODR |= NCPS_PDR_BIT; // clear
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// disable PIO from controlling the CS pin (=hand over to SPI)
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AT91C_BASE_PIOA->PIO_PDR |= NCPS_PDR_BIT;
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// set pin-functions in PIO Controller (function NCPS for CS-pin)
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AT91C_BASE_PIOA->PIO_ASR |= NCPS_ASR_BIT;
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AT91C_BASE_PIOA->PIO_BSR |= NCPS_BSR_BIT;
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}
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void FlashStop(void) {
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//NCS_1_HIGH;
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StopTicks();
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Dbprintf("FlashStop");
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LED_A_OFF();
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// end up SPI
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void FlashStop(void)
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{
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//* Reset all the Chip Select register
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AT91C_BASE_SPI->SPI_CSR[0] = 0;
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AT91C_BASE_SPI->SPI_CSR[1] = 0;
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@ -133,91 +105,87 @@ void FlashStop(void) {
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// SPI disable
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AT91C_BASE_SPI->SPI_CR = AT91C_SPI_SPIDIS;
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Dbprintf("FlashStop");
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}
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uint16_t FlashSend(uint16_t data) {
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// 发送一个字节 send one byte
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uint16_t FlashSendByte(uint32_t data)
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{
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uint16_t incoming = 0;
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WDT_HIT();
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// wait until SPI is ready for transfer
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while ( !(AT91C_BASE_SPI->SPI_SR & AT91C_SPI_TXEMPTY)) {};
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while ((AT91C_BASE_SPI->SPI_SR & AT91C_SPI_TXEMPTY) == 0) {};
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// send the data
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AT91C_BASE_SPI->SPI_TDR = data;
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// wait recive transfer is complete
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while ( !(AT91C_BASE_SPI->SPI_SR & AT91C_SPI_RDRF)) {};
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while ((AT91C_BASE_SPI->SPI_SR & AT91C_SPI_RDRF) == 0)
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WDT_HIT();
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// reading incoming data
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incoming = ((AT91C_BASE_SPI->SPI_RDR) & 0xFFFF);
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return incoming;
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}
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// send last one byte
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uint16_t FlashSendLastByte(uint32_t data) {
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return FlashSendByte(data | AT91C_SPI_LASTXFER);
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}
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// Read state register 1
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uint8_t Flash_ReadStat1(void) {
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uint8_t stat2 = FlashSend(READSTAT1);
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uint8_t stat1 = FlashSend(0xFF);
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Dbprintf("stat1 [%02x] %02x ", stat1, stat2);
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// NCS_1_HIGH;
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FlashSendByte(READSTAT1);
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uint8_t stat1 = FlashSendLastByte(0xFF);
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Dbprintf("stat1 [%02x]", stat1);
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return stat1;
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}
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/*
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static uint8_t Flash_ReadStat2(void) {
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FlashSend(READSTAT2);
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uint8_t stat2 = FlashSend(0xff);
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NCS_1_HIGH;
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// Read state register 2
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uint8_t Flash_ReadStat2(void) {
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FlashSendByte(READSTAT2);
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uint8_t stat2 = FlashSendLastByte(0xFF);
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Dbprintf("stat2 [%02x]", stat2);
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return stat2;
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}
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*/
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bool Flash_NOTBUSY(void) {
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WDT_HIT();
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uint8_t state, count = 0;
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do {
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state = Flash_ReadStat1();
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if (count > 100) {
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return false;
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}
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count++;
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} while (state & BUSY);
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return true;
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}
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/*
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static uint8_t FlashWriteRead(uint8_t data){
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FlashSend(READDATA);
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FlashSend(data);
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uint8_t ret = MISO_VALUE;
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return ret;
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}
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// Determine whether FLASHMEM is busy
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bool Flash_CheckBusy(uint16_t times){
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bool bRet = (Flash_ReadStat1() & BUSY);
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static void FlashWrite_Enable(){
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FlashWriteRead(WRITEENABLE);
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Dbprintf("Flash WriteEnabled");
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}
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*/
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/*
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static uint8_t FlashRead(uint8_t *address, uint16_t len) {
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FlashSend(READDATA);
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for (uint16_t i = 0; i < len; i++) {
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FlashWriteRead(address[i]);
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if (!bRet || !times || !(times--))
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return bRet;
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while (times)
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{
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WDT_HIT();
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SpinDelayUs(1000); // wait 1ms
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bRet = (Flash_ReadStat1() & BUSY);
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if (!bRet)
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break;
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times--;
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}
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uint8_t tmp = FlashWriteRead(0XFF);
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return tmp;
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return bRet;
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}
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*/
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// read ID out
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uint8_t Flash_ReadID(void) {
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// if (!Flash_NOTBUSY())
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// return true;
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if (Flash_CheckBusy(1000))
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return 0;
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// Manufacture ID / device ID
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uint8_t t0 = FlashSend(ID);
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uint8_t t1 = FlashSend(0x00);
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uint8_t t2 = FlashSend(0x00);
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uint8_t t3 = FlashSend(0x00);
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uint8_t t0 = FlashSendByte(ID);
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uint8_t t1 = FlashSendByte(0x00);
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uint8_t t2 = FlashSendByte(0x00);
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uint8_t t3 = FlashSendByte(0x00);
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uint8_t man_id = FlashSend(0xFF);
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uint8_t dev_id = 0; // FlashSend(0xff);
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uint8_t man_id = FlashSendByte(0xFF);
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uint8_t dev_id = FlashSendLastByte(0xFF);
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Dbprintf(" [%02x] %02x %02x %02x | %02x %02x", t0,t1,t2,t3, man_id, dev_id);
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@ -225,192 +193,178 @@ uint8_t Flash_ReadID(void) {
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if ( man_id == WINBOND_MANID ) {
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Dbprintf("Correct read of Manucaturer ID [%02x] == %02x", man_id, WINBOND_MANID);
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}
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// if ( dev_id > 0) {
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// Dbprintf("Got a device ID [%02x] == %02x ( 0x11 0x30 0x12", dev_id, WINBOND_DEVID);
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// }
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// NCS_1_HIGH;
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return man_id;
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if (man_id != WINBOND_MANID)
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dev_id = 0;
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return dev_id;
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}
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bool FlashInit(void) {
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StartTicks();
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// 读取数据 address buffer length
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uint8_t Flash_ReadDate(uint32_t Address, uint8_t *Buffer, uint16_t len)
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{
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// length should never be zero
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if (!len || Flash_CheckBusy(1000))
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return 0;
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LED_A_ON();
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FlashSendByte(READDATA);
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FlashSendByte((Address >> 16) & 0xFF);
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FlashSendByte((Address >> 8) & 0xFF);
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FlashSendByte((Address >> 0) & 0xFF);
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uint16_t i = 0;
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for (; i < (len - 1); i++)
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Buffer[i] = FlashSendByte(0xFF);
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Buffer[i] = FlashSendLastByte(0xFF);
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return len;
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}
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// 写入数据 地址 address 缓冲区 buffer 长度length
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uint8_t Flash_WriteDate(uint32_t Address, uint8_t *Buffer, uint16_t len)
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{
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// length should never be zero
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if (!len || Flash_CheckBusy(1000))
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return 0;
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// 不能跨越 256 字节边界
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if (((Address & 255) + len) > 256)
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return 0;
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FlashSendByte(PAGEPROG);
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FlashSendByte((Address >> 16) & 0xFF);
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FlashSendByte((Address >> 8) & 0xFF);
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FlashSendByte((Address >> 0) & 0xFF);
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uint16_t i = 0;
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for (; i < (len - 1); i++)
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FlashSendByte(Buffer[i]);
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FlashSendLastByte(Buffer[i]);
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return len;
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}
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// enable the flash write
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void Flash_WriteEnable()
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{
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FlashSendLastByte(WRITEENABLE);
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Dbprintf("Flash WriteEnabled");
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}
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// erase 4K at one time
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bool Flash_Erase4k(uint32_t Address)
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{
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if (Address & (4096 - 1))
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{
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Dbprintf("Flash_Erase4k : Address is not align at 4096");
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return false;
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}
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FlashSendByte(SECTORERASE);
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FlashSendByte((Address >> 16) & 0xFF);
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FlashSendByte((Address >> 8) & 0xFF);
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FlashSendLastByte((Address >> 0) & 0xFF);
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return true;
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}
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// erase 32K at one time
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bool Flash_Erase32k(uint32_t Address)
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{
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if (Address & (32*1024 - 1))
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{
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Dbprintf("Flash_Erase4k : Address is not align at 4096");
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return false;
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}
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FlashSendByte(BLOCK32ERASE);
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FlashSendByte((Address >> 16) & 0xFF);
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FlashSendByte((Address >> 8) & 0xFF);
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FlashSendLastByte((Address >> 0) & 0xFF);
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return true;
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}
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// erase 64k at one time
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bool Flash_Erase64k(uint32_t Address)
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{
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if (Address & (64*1024 - 1))
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{
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Dbprintf("Flash_Erase4k : Address is not align at 4096");
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return false;
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}
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FlashSendByte(BLOCK64ERASE);
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FlashSendByte((Address >> 16) & 0xFF);
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FlashSendByte((Address >> 8) & 0xFF);
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FlashSendLastByte((Address >> 0) & 0xFF);
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return true;
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}
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// erase all
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void Flash_EraseChip(void)
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{
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FlashSendLastByte(CHIPERASE);
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}
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// initialize
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bool FlashInit(void)
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{
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FlashSetup();
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if (!Flash_NOTBUSY())
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if (Flash_CheckBusy(1000))
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return false;
|
||||
|
||||
// FlashSend(ENABLE_RESET);
|
||||
// NCS_1_HIGH;
|
||||
// FlashSend(RESET);
|
||||
// NCS_1_HIGH;
|
||||
// WaitUS(10);
|
||||
|
||||
Dbprintf("FlashInit");
|
||||
return true;
|
||||
}
|
||||
|
||||
void EXFLASH_TEST(void) {
|
||||
//uint8_t a[3] = {0x00,0x00,0x00};
|
||||
//uint8_t b[3] = {0x00,0x01,0x02};
|
||||
//uint8_t d = 0;
|
||||
void EXFLASH_TEST(void)
|
||||
{
|
||||
uint8_t Data[256] = { 0x00, 0x01, 0x02 };
|
||||
uint8_t Data2[256] = { 0x00};
|
||||
uint32_t FlashSize = 0;
|
||||
|
||||
if (!FlashInit()) return;
|
||||
|
||||
//FlashWrite_Enable();
|
||||
Flash_ReadStat1();
|
||||
|
||||
Flash_ReadID();
|
||||
switch (Flash_ReadID())
|
||||
{
|
||||
case 0x11: // W25X20CL
|
||||
FlashSize = 2048*1024;
|
||||
break;
|
||||
case 0x10: // W25X10CL
|
||||
FlashSize = 1024*1024;
|
||||
break;
|
||||
case 0x05: // W25X05CL
|
||||
FlashSize = 512*1024;
|
||||
break;
|
||||
}
|
||||
|
||||
//Dbprintf("Flash test write: 012 to 0x00 0x01 0x02");
|
||||
//EXFLASH_Program(a, b, sizeof(b));
|
||||
Dbprintf("Flash Size = %dk", FlashSize / 1024);
|
||||
|
||||
//d = FlashRead(a, sizeof(a));
|
||||
//Dbprintf("%02x | %02x %02x %02x", d, a[0], a[1], a[2]);
|
||||
if (FlashSize != 2048*1024)
|
||||
return;
|
||||
|
||||
Dbprintf("Flash test write: 012 to 0x00 0x01 0x02");
|
||||
Flash_WriteEnable();
|
||||
Flash_Erase4k(0x00);
|
||||
if (Flash_CheckBusy(1000))
|
||||
{
|
||||
Dbprintf("Flash_Erase4k CheckBusy Error.");
|
||||
return;
|
||||
}
|
||||
Flash_ReadDate(0, Data2, 256);
|
||||
Flash_WriteEnable();
|
||||
Flash_WriteDate(0x12, Data, sizeof(Data)); // this will never run, cuz out of 256byte boundary
|
||||
Flash_WriteDate(0x12, Data, 3);
|
||||
if (Flash_CheckBusy(1000))
|
||||
{
|
||||
Dbprintf("Flash_WriteDate CheckBusy Error.");
|
||||
return;
|
||||
}
|
||||
|
||||
Flash_ReadDate(0, Data2, 256);
|
||||
|
||||
FlashStop();
|
||||
cmd_send(CMD_ACK, 1, 0, 0, 0,0);
|
||||
}
|
||||
/*
|
||||
// IO spi write or read
|
||||
uint8_t EXFLASH_spi_write_read(uint8_t wData) {
|
||||
uint8_t tmp = 0;
|
||||
SCK_LOW;
|
||||
LOW(GPIO_NCS2);
|
||||
|
||||
for (uint8_t i = 0; i < 8; i++) {
|
||||
SCK_LOW;
|
||||
SpinDelayUs(2);
|
||||
|
||||
if (wData & 0x80) {
|
||||
MOSI_HIGH;
|
||||
} else {
|
||||
MOSI_LOW;
|
||||
SpinDelayUs(2);
|
||||
}
|
||||
wData <<= 1;
|
||||
SCK_HIGH;
|
||||
tmp <<= 1;
|
||||
tmp |= MISO_VALUE;
|
||||
}
|
||||
SCK_LOW;
|
||||
return tmp;
|
||||
}
|
||||
|
||||
|
||||
void EXFLASH_Write_Enable(void) {
|
||||
EXFLASH_spi_write_read(WRITEENABLE);
|
||||
HIGH(GPIO_NCS2);
|
||||
}
|
||||
|
||||
uint8_t EXFLASH_Read(uint8_t *address, uint16_t len) {
|
||||
|
||||
if (!EXFLASH_NOTBUSY())
|
||||
return false;
|
||||
|
||||
EXFLASH_spi_write_read(READDATA);
|
||||
|
||||
uint8_t tmp;
|
||||
for (uint16_t i=0; i < len; i++) {
|
||||
EXFLASH_spi_write_read(address[i]);
|
||||
}
|
||||
tmp = EXFLASH_spi_write_read(0XFF);
|
||||
HIGH(GPIO_NCS2);
|
||||
return tmp;
|
||||
}
|
||||
|
||||
uint8_t EXFLASH_Program(uint8_t address[], uint8_t *array, uint8_t len) {
|
||||
uint8_t state1, count = 0, i;
|
||||
EXFLASH_Write_Enable();
|
||||
|
||||
do {
|
||||
state1 = EXFLASH_readStat1();
|
||||
if (count > 100) {
|
||||
return false;
|
||||
}
|
||||
count++;
|
||||
} while ((state1 & WRTEN) != WRTEN);
|
||||
|
||||
EXFLASH_spi_write_read(PAGEPROG);
|
||||
|
||||
for (i=0; i<address_length; i++) {
|
||||
EXFLASH_spi_write_read(address[i]);
|
||||
}
|
||||
|
||||
for (i=0; i<len; i++) {
|
||||
EXFLASH_spi_write_read(array[i]);
|
||||
}
|
||||
|
||||
HIGH(GPIO_NCS2);
|
||||
return true;
|
||||
}
|
||||
|
||||
uint8_t EXFLASH_ReadID(void) {
|
||||
|
||||
if (!EXFLASH_NOTBUSY())
|
||||
return true;
|
||||
|
||||
uint8_t ManID; // DevID
|
||||
EXFLASH_spi_write_read(MANID);
|
||||
EXFLASH_spi_write_read(0x00);
|
||||
EXFLASH_spi_write_read(0x00);
|
||||
EXFLASH_spi_write_read(0x00);
|
||||
ManID = EXFLASH_spi_write_read(0xff);
|
||||
// DevID = EXFLASH_spi_write_read(0xff);
|
||||
|
||||
HIGH(GPIO_NCS2);
|
||||
return ManID;
|
||||
}
|
||||
|
||||
bool EXFLASH_Erase(void) {
|
||||
uint8_t state1, count = 0;
|
||||
|
||||
EXFLASH_Write_Enable();
|
||||
|
||||
do {
|
||||
state1 = EXFLASH_readStat1();
|
||||
if (count > 100) {
|
||||
return false;
|
||||
}
|
||||
count++;
|
||||
} while ((state1 & WRTEN) != WRTEN);
|
||||
|
||||
EXFLASH_spi_write_read(CHIPERASE);
|
||||
HIGH(GPIO_NCS2);
|
||||
return true;
|
||||
}
|
||||
*/
|
||||
/*
|
||||
void EXFLASH_TEST(void) {
|
||||
uint8_t a[3] = {0x00,0x00,0x00};
|
||||
uint8_t b[3] = {0x00,0x01,0x02};
|
||||
uint8_t f[3] = {0x00,0x00,0x01};
|
||||
uint8_t e[3] = {0x00,0x00,0x02};
|
||||
uint8_t d = 0;
|
||||
|
||||
//EXFLASH_Init();
|
||||
// c = EXFLASH_ReadID();
|
||||
|
||||
//EXFLASH_Write_Enable();
|
||||
//EXFLASH_readStat1();
|
||||
Dbprintf("%s \r\n", "write 012 to 0x00 0x01 0x02");
|
||||
Dbprintf("%s \r\n"," wait... ");
|
||||
|
||||
EXFLASH_Program(a, b, sizeof(b));
|
||||
|
||||
d = EXFLASH_Read(a, sizeof(a) );
|
||||
Dbprintf(" %d ", d);
|
||||
|
||||
d = EXFLASH_Read(f, sizeof(f) );
|
||||
Dbprintf(" %d ", d);
|
||||
|
||||
d = EXFLASH_Read(e, sizeof(e) );
|
||||
|
||||
Dbprintf(" %d ", d);
|
||||
Dbprintf("%s \r\n","TEST done!");
|
||||
|
||||
EXFLASH_Erase();
|
||||
cmd_send(CMD_ACK, 1, 0, 0, 0,0);
|
||||
}
|
||||
*/
|
||||
|
|
@ -31,29 +31,37 @@
|
|||
#include "proxmark3.h"
|
||||
#include "apps.h"
|
||||
|
||||
// Used Command
|
||||
#define ID 0x90
|
||||
#define MANID 0x90
|
||||
#define PAGEPROG 0x02
|
||||
#define READDATA 0x03
|
||||
#define FASTREAD 0x0B
|
||||
#define WRITEDISABLE 0x04
|
||||
#define JEDECID 0x9F
|
||||
|
||||
#define READSTAT1 0x05
|
||||
#define READSTAT2 0x35
|
||||
#define WRITESTAT 0x01
|
||||
|
||||
#define WRITEDISABLE 0x04
|
||||
#define WRITEENABLE 0x06
|
||||
|
||||
#define READDATA 0x03
|
||||
#define PAGEPROG 0x02
|
||||
|
||||
#define SECTORERASE 0x20
|
||||
#define BLOCK32ERASE 0x52
|
||||
#define CHIPERASE 0xC7
|
||||
#define SUSPEND 0x75
|
||||
#define ID 0x90
|
||||
#define RESUME 0x7A
|
||||
#define JEDECID 0x9F
|
||||
#define RELEASE 0xAB
|
||||
#define POWERDOWN 0xB9
|
||||
#define BLOCK64ERASE 0xD8
|
||||
#define ENABLE_RESET 0x66
|
||||
#define RESET 0x99
|
||||
#define CHIPERASE 0xC7
|
||||
|
||||
#define UNIQUE_ID 0x4B
|
||||
|
||||
|
||||
// Not used or not support command
|
||||
#define RELEASE 0xAB
|
||||
#define POWERDOWN 0xB9
|
||||
#define FASTREAD 0x0B
|
||||
#define SUSPEND 0x75
|
||||
#define RESUME 0x7A
|
||||
|
||||
|
||||
//~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~//
|
||||
// Chip specific instructions //
|
||||
//~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~//
|
||||
|
|
@ -69,10 +77,12 @@
|
|||
// Definitions //
|
||||
//~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~//
|
||||
|
||||
#define SPI_CLK 75000000 //Hex equivalent of 75MHz
|
||||
|
||||
#define BUSY 0x01
|
||||
#define SPI_CLK 104000000 //Hex equivalent of 104MHz
|
||||
#define WRTEN 0x02
|
||||
#define SUS 0x40
|
||||
|
||||
#define DUMMYBYTE 0xEE
|
||||
#define NULLBYTE 0x00
|
||||
#define NULLINT 0x0000
|
||||
|
|
@ -103,10 +113,10 @@ extern void Dbprintf(const char *fmt, ...);
|
|||
|
||||
void FlashSetup(void);
|
||||
void FlashStop(void);
|
||||
bool Flash_NOTBUSY(void);
|
||||
bool Flash_WaitIdle(void);
|
||||
uint8_t Flash_ReadStat1(void);
|
||||
uint8_t Flash_ReadStat2(void);
|
||||
uint16_t FlashSend(uint16_t data);
|
||||
uint16_t FlashSendByte(uint32_t data);
|
||||
bool FlashInit();
|
||||
void EXFLASH_TEST(void);
|
||||
|
||||
|
|
|
|||
Loading…
Reference in a new issue