noncetonic
f7b7357b01
Adds homebrew update instructions
2018-02-02 02:42:00 -08:00
noncetonic
ba19849b08
Updates macOS section homebrew instructions
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Just adding a basic workflow for getting bleeding-edge updates on homebrew which often lags due to it waiting for a new stable build .tar.gz to be generated.
2018-02-02 02:39:33 -08:00
iceman1001
ccfdd60c09
chg: textual
2018-02-01 21:39:34 +01:00
iceman1001
cfb3654f7b
chg: textual
2018-02-01 18:24:38 +01:00
iceman1001
55874d7872
chg: textual
2018-02-01 18:02:24 +01:00
iceman1001
59a461fd2b
chg: 'hf iclass sim' ..double
2018-02-01 18:01:44 +01:00
iceman1001
8380743a42
chg: 'hf iclass sim' textual
2018-02-01 17:58:50 +01:00
iceman1001
111b55d850
chg: 'hf iclass sim' textual
2018-02-01 17:53:28 +01:00
iceman1001
856e2770a6
chg: 'hf iclass sim' different output
2018-02-01 17:44:27 +01:00
iceman1001
554af51a54
fix: osx complains on sprintf
2018-02-01 17:37:05 +01:00
iceman1001
e0373212a3
chg: 'hf iclass sim' - sim2, 4 get less default output, set DBG 4 for verbose
2018-02-01 16:10:24 +01:00
iceman1001
3248bb5a56
chg: 'hf iclass sim' - get ride of the "waiting for response" message.
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-- sim 2, 4 - cancel by keypress.
2018-02-01 15:55:12 +01:00
Iceman
b881a4d850
Merge pull request #160 from n0ncetonic/patch-2
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Updates command usage
2018-02-01 15:46:02 +01:00
noncetonic
a52024ef3d
Updates command usage
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Updates `usage_hf_iclass_lookup` to match u/U being used for CSN vs c/C.
Updates `usage_hf_iclass_sim` to include "sim 4"
Updates `usage_hf_iclass_writeblock` to remove sample with invalid `n 0` option
2018-02-01 06:41:44 -08:00
iceman1001
fa5b550fa8
chg: should be a define.
2018-02-01 15:35:00 +01:00
iceman1001
145bccdea8
chg: wrong type
2018-02-01 15:33:10 +01:00
iceman1001
1965927009
chg: https://github.com/Proxmark/proxmark3/pull/558 (@pwpiwi) might solve the mystery crashes.
2018-02-01 15:24:36 +01:00
iceman1001
519cc72966
chg: crc change
2018-02-01 15:22:01 +01:00
iceman1001
52d69ed4ee
CHG: refactor CRC16 algos. This is a big change, most likely some parts broke, hard to test it all.
2018-02-01 15:19:47 +01:00
Iceman
d2e9f4a743
Merge pull request #159 from n0ncetonic/patch-1
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Adds HID Master Auth Key
2018-02-01 14:41:49 +01:00
noncetonic
092c75961f
Adds HID Master Auth Key
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It's leaked so why not share it
2018-02-01 04:21:04 -08:00
iceman1001
bcf6fcd193
fix: 'crc iclass' doesn't need byteswapping
2018-02-01 09:33:34 +01:00
iceman1001
721ba5d287
fix: 'hf iclass sim' - too small buffers caused sim to fail
2018-02-01 09:31:30 +01:00
iceman1001
50e4d60853
chg: 'hf iclass lookup' adjusted helptext and parameters
2018-01-31 16:50:41 +01:00
iceman1001
e66b9c52b3
chg: some referense to "string.h" -> which should be <string.h> or removed.
2018-01-31 12:04:12 +01:00
iceman1001
b06579e0d5
chg: 'hf felica reader' the felica_select_card struct got more properties
2018-01-30 03:32:33 +01:00
iceman1001
bf25b1c9ba
chg: crc16 got a compute_crc function
2018-01-30 03:31:11 +01:00
iceman1001
eb8e7a1679
intendention
2018-01-30 03:29:59 +01:00
iceman1001
c6207d09e1
chg: 'hf felica reader' is better, almost working good
2018-01-30 03:29:37 +01:00
iceman1001
50743b7e88
rem: 'hf iclass' blocknum LUT is gone. Removed also functionality for it.
2018-01-29 16:44:49 +01:00
iceman1001
5c380767e8
chg: 'hf iclass' removed a blocknum LUT implementation. My guess is the new crc16_iclass will do fine.
2018-01-29 16:38:03 +01:00
iceman1001
848decd711
rem: 'hf 15' - removed old bit-looped crc implementation
2018-01-29 16:36:59 +01:00
iceman1001
cbe313a569
chg: iClass crc is byteswap
2018-01-29 16:36:07 +01:00
iceman1001
b39332e938
REM: 'hf 15 debug' removed command, unified with mf_debuglevel instead. The idea is to have ONE debug flag on deviceside.
2018-01-29 15:58:00 +01:00
iceman1001
095b3af43b
CHG: 'hf 15' - swapped crc impl to table based.
2018-01-29 15:55:56 +01:00
iceman1001
29c15b3480
cHG.. missing
2018-01-29 13:48:18 +01:00
iceman1001
787d87e0e6
testing to make dma buffer larger.
2018-01-29 13:42:42 +01:00
iceman1001
ed982a4787
textual
2018-01-29 13:42:18 +01:00
iceman1001
c04ac4f9ac
ADD: 'hf felica reader' - added pm3 as FeliCa reader
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ADD: raw commands - added the basis for sending RAW commands to FeliCa.
CHG: CRC16 rework, uses table based implementation. This will change more functions as I go on.
2018-01-29 13:42:02 +01:00
iceman1001
51a65a0ce3
rem: removed unneeded function
2018-01-28 12:47:08 +01:00
iceman1001
0c827e755f
chg: parameter adjustments
2018-01-28 12:42:17 +01:00
iceman1001
fd854a9308
chg: added Abrasive's uart implementation, its simpler to understand but the downside it doesn't do both speeds. (1/4 , 1/2556).
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ref 2b8bff7dae
2018-01-28 12:36:41 +01:00
iceman1001
205e4b2300
chg: adjusted the input parameters for crc16 implementations.
2018-01-28 12:19:04 +01:00
iceman1001
1f5477491f
chg: rename
2018-01-28 11:01:29 +01:00
iceman1001
e5804645f1
chg: most of the crc16 works.
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ISO14443 crc A = crc16_a
ISO14443 crc B = ...
ISO15693 crc = crc16_x25
2018-01-28 10:59:57 +01:00
iceman1001
57df6a1a7e
revert: add reflect function since its used in crc.c
2018-01-28 10:49:57 +01:00
iceman1001
cf44d04be1
add: reflect16
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rem: swapbits, reflect
2018-01-28 10:46:46 +01:00
iceman1001
e396575424
add: fast reverse 16bit
2018-01-27 23:16:35 +01:00
iceman1001
e76b4f93b8
notes
2018-01-27 23:15:08 +01:00
iceman1001
ede55a1498
add: fast 8bit reversal.
2018-01-27 22:20:56 +01:00