Commit graph

3 commits

Author SHA1 Message Date
Philippe Teuwen
26eb54b965 style 2019-04-06 01:00:54 +02:00
Philippe Teuwen
edc19f202a Convert the few files with still Windows carriage returns 2019-03-09 08:49:41 +01:00
AntiCat
61e4eac2b2 Legic: Moved card simulator into separate file & cleaned interface.
Reader and card simulation have almost no common code. Moreover the sim
uses an SSP Clock at 212kHz for all timings to prevent any drifting from
the PRNG. This clock speed is not available in reader simulation mode (SSP
runs at up to 3.4MHz, and changes speed between TX and RX). For these
reasons having the code in separate files makes it significantly cleaner.
2018-09-05 23:03:04 +02:00