8 commits

Author	SHA1	Message	Date
iceman1001	ba320f26f7	ensure registers and vars is set correct	2023-08-28 15:34:36 +02:00
iceman1001	114dda1582	After testing and verification its found that the SHALLOW MODULATION in HF is not working well in RDV4. Swapping from PWR_OE4 to PWR_OE1 makes it much better. Thanks to @d18c7db for solution and @gentlekiwi for testing and never giving up on finding the bug	2023-08-28 12:00:44 +02:00
Alex	c41c685807	Merged hi_reader and hi_reader_15 into one file ... hi_reader_15 was a superset of hi_reader, now uses conditional compile from Makefile like the other files to select compilations options	2023-08-24 17:52:12 +02:00
d18c7db	c59bdec4f2	Unified fpga folders	2023-05-30 19:47:27 +02:00
Philippe Teuwen	e79fb92074	Add fpga-xc3s100e and icopyx support	2021-08-21 23:45:46 +02:00
Philippe Teuwen	491adacb94	get rid of tabs	2020-10-06 20:45:13 +02:00
Philippe Teuwen	4ed57c7c4d	make style	2020-08-13 12:25:04 +02:00
iceman1001	41dde3281d	add files	2020-07-02 11:49:22 +02:00