mirror of
https://github.com/RfidResearchGroup/proxmark3.git
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137 lines
No EOL
3.6 KiB
C
137 lines
No EOL
3.6 KiB
C
#include "iso7816.h"
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/* here: use NCPS2 @ PA10: */
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#define SPI_CSR_NUM 2 // Chip Select register[] 0,1,2,3 (at91samv512 has 4)
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/* PCS_0 for NPCS0, PCS_1 for NPCS1 ... */
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#define PCS_0 ((0<<0)|(1<<1)|(1<<2)|(1<<3)) // 0xE - 1110
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#define PCS_1 ((1<<0)|(0<<1)|(1<<2)|(1<<3)) // 0xD - 1101
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#define PCS_2 ((1<<0)|(1<<1)|(0<<2)|(1<<3)) // 0xB - 1011
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#define PCS_3 ((1<<0)|(1<<1)|(1<<2)|(0<<3)) // 0x7 - 0111
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// TODO
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#if (SPI_CSR_NUM == 0)
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#define SPI_MR_PCS PCS_0
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#elif (SPI_CSR_NUM == 1)
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#define SPI_MR_PCS PCS_1
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#elif (SPI_CSR_NUM == 2)
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#define SPI_MR_PCS PCS_2
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#elif (SPI_CSR_NUM == 3)
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#define SPI_MR_PCS PCS_3
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#else
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#error "SPI_CSR_NUM invalid"
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// not realy - when using an external address decoder...
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// but this code takes over the complete SPI-interace anyway
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#endif
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void ISO7816_setup(void) {
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// PA1 -> SIM RST
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// PA5 -> SIM I/O
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// PA7 -> SIM CLK
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// Disable PIO control of the following pins, allows use by the SPI peripheral
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AT91C_BASE_PIOA->PIO_PDR = GPIO_NCS0 | GPIO_MISO | GPIO_MOSI | GPIO_SPCK | GPIO_NCS2;
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// Pull-up Enable
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AT91C_BASE_PIOA->PIO_PPUER = GPIO_NCS0 | GPIO_MISO | GPIO_MOSI | GPIO_SPCK | GPIO_NCS2;
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// Peripheral A
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AT91C_BASE_PIOA->PIO_ASR = GPIO_NCS0 | GPIO_MISO | GPIO_MOSI | GPIO_SPCK;
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// Peripheral B
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AT91C_BASE_PIOA->PIO_BSR |= GPIO_NCS2;
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//enable the SPI Peripheral clock
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AT91C_BASE_PMC->PMC_PCER = (1 << AT91C_ID_SPI);
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// Enable SPI
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AT91C_BASE_SPI->SPI_CR = AT91C_SPI_SPIEN;
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// NPCS2 Mode 0
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AT91C_BASE_SPI->SPI_MR =
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( 0 << 24) | // Delay between chip selects (take default: 6 MCK periods)
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(0xB << 16) | // Peripheral Chip Select (selects SPI_NCS2 or PA10)
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( 0 << 7) | // Local Loopback Disabled
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( 1 << 4) | // Mode Fault Detection disabled
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( 0 << 2) | // Chip selects connected directly to peripheral
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( 0 << 1) | // Fixed Peripheral Select
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( 1 << 0); // Master Mode
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// 8 bit
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AT91C_BASE_SPI->SPI_CSR[2] =
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( 0 << 24) | // Delay between Consecutive Transfers (32 MCK periods)
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( 0 << 16) | // Delay Before SPCK (1 MCK period)
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( 6 << 8) | // Serial Clock Baud Rate (baudrate = MCK/6 = 24Mhz/6 = 4M baud
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( 0 << 4) | // Bits per Transfer (8 bits)
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( 1 << 3) | // Chip Select inactive after transfer
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( 1 << 1) | // Clock Phase data captured on leading edge, changes on following edge
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( 0 << 0); // Clock Polarity inactive state is logic 0
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// read first, empty buffer
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if (AT91C_BASE_SPI->SPI_RDR == 0) {};
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}
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void ISO7816_stop(void) {
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//* Reset all the Chip Select register
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AT91C_BASE_SPI->SPI_CSR[0] = 0;
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AT91C_BASE_SPI->SPI_CSR[1] = 0;
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AT91C_BASE_SPI->SPI_CSR[2] = 0;
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AT91C_BASE_SPI->SPI_CSR[3] = 0;
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// Reset the SPI mode
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AT91C_BASE_SPI->SPI_MR = 0;
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// Disable all interrupts
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AT91C_BASE_SPI->SPI_IDR = 0xFFFFFFFF;
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// SPI disable
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AT91C_BASE_SPI->SPI_CR = AT91C_SPI_SPIDIS;
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if ( MF_DBGLEVEL > 3 ) Dbprintf("ISO7816 Stop");
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StopTicks();
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}
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// send one byte over SPI
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uint16_t ISO7816_sendbyte(uint32_t data) {
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uint16_t incoming = 0;
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WDT_HIT();
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// wait until SPI is ready for transfer
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while ((AT91C_BASE_SPI->SPI_SR & AT91C_SPI_TXEMPTY) == 0) {};
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// send the data
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AT91C_BASE_SPI->SPI_TDR = data;
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// wait recive transfer is complete
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while ((AT91C_BASE_SPI->SPI_SR & AT91C_SPI_RDRF) == 0)
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WDT_HIT();
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// reading incoming data
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incoming = ((AT91C_BASE_SPI->SPI_RDR) & 0xFFFF);
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return incoming;
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}
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// initialize
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bool ISO7816_init(void) {
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ISO7816_setup();
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StartTicks();
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// StopTicks();
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// return false;
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if ( MF_DBGLEVEL > 3 ) Dbprintf("ISO7816 OK");
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return true;
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}
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void ISO7816_test(void) {
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if (!ISO7816_init()) return;
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ISO7816_stop();
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} |