mirror of
https://github.com/RfidResearchGroup/proxmark3.git
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56 lines
1.8 KiB
Makefile
56 lines
1.8 KiB
Makefile
#
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# FPGA Makefile
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#
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RMDIR = rm -rf
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# rmdir only if dir is empty, tolerate failure
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RMDIR_SOFT = -rmdir
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#
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all: fpga_lf.bit fpga_hf.bit fpga_felica.bit
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clean:
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$(Q)$(RM) *.bgn *.drc *.ncd *.ngd *_par.xrpt *-placed.* *-placed_pad.* *_usage.xml xst_hf.srp xst_lf.srp xst_felica.srp
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$(Q)$(RM) *.map *.ngc *.xrpt *.pcf *.rbt *.bld *.mrp *.ngm *.unroutes *_summary.xml netlist.lst
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$(Q)$(RMDIR) *_auto_* xst
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#fpga_hf.ngc: fpga_hf.v fpga.ucf xst_hf.scr util.v hi_simulate.v hi_reader.v hi_iso14443a.v hi_sniffer.v hi_flite.v hi_get_trace.v
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fpga_hf.ngc: fpga_hf.v fpga.ucf xst_hf.scr util.v hi_simulate.v hi_reader.v hi_iso14443a.v hi_sniffer.v hi_get_trace.v
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$(Q)$(RM) $@
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$(info [-] XST $@)
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$(Q)$(XILINX_TOOLS_PREFIX)xst -ifn xst_hf.scr
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fpga_felica.ngc: fpga_felica.v fpga.ucf xst_felica.scr util.v hi_simulate.v hi_reader.v hi_sniffer.v hi_flite.v hi_get_trace.v
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$(Q)$(RM) $@
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$(info [-] XST $@)
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$(Q)$(XILINX_TOOLS_PREFIX)xst -ifn xst_felica.scr
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fpga_lf.ngc: fpga_lf.v fpga.ucf xst_lf.scr util.v clk_divider.v lo_edge_detect.v lo_read.v lo_passthru.v lp20khz_1MSa_iir_filter.v min_max_tracker.v lf_edge_detect.v
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$(Q)$(RM) $@
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$(info [-] XST $@)
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$(Q)$(XILINX_TOOLS_PREFIX)xst -ifn xst_lf.scr
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%.ngd: %.ngc
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$(Q)$(RM) $@
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$(info [-] NGD $@)
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$(Q)$(XILINX_TOOLS_PREFIX)ngdbuild -aul -p xc2s30-5-vq100 -nt timestamp -uc fpga.ucf $< $@
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%.ncd: %.ngd
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$(Q)$(RM) $@
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$(info [-] MAP $@)
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$(Q)$(XILINX_TOOLS_PREFIX)map -p xc2s30-5-vq100 $<
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%-placed.ncd: %.ncd
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$(Q)$(RM) $@
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$(info [-] PAR $@)
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$(Q)$(XILINX_TOOLS_PREFIX)par $< $@
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%.bit: %-placed.ncd
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$(Q)$(RM) $@ $*.drc $*.rbt
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$(info [=] BITGEN $@)
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$(Q)$(XILINX_TOOLS_PREFIX)bitgen $< $@
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.PHONY: all clean help
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help:
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@echo Possible targets:
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@echo + all - Make fpga.bit, the FPGA bitstream
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@echo + clean - Clean intermediate files, does not clean fpga.bit
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