mirror of
https://github.com/RfidResearchGroup/proxmark3.git
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207 lines
6 KiB
C
207 lines
6 KiB
C
//-----------------------------------------------------------------------------
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// Iceman, July 2018
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// edits by - Anticat, August 2018
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//
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// This code is licensed to you under the terms of the GNU GPL, version 2 or,
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// at your option, any later version. See the LICENSE.txt file for the text of
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// the license.
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//-----------------------------------------------------------------------------
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// The main USART code, for serial communications over FPC connector
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//-----------------------------------------------------------------------------
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#include "usart.h"
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#include "string.h"
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#include "../armsrc/ticks.h" // startcountus
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volatile AT91PS_USART pUS1 = AT91C_BASE_US1;
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volatile AT91PS_PIO pPIO = AT91C_BASE_PIOA;
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volatile AT91PS_PDC pPDC = AT91C_BASE_PDC_US1;
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/*
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void usart_close(void) {
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// Reset the USART mode
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pUS1->US_MR = 0;
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// Reset the baud rate divisor register
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pUS1->US_BRGR = 0;
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// Reset the Timeguard Register
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pUS1->US_TTGR = 0;
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// Disable all interrupts
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pUS1->US_IDR = 0xFFFFFFFF;
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// Abort the Peripheral Data Transfers
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pUS1->US_PTCR = AT91C_PDC_RXTDIS | AT91C_PDC_TXTDIS;
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// Disable receiver and transmitter and stop any activity immediately
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pUS1->US_CR = AT91C_US_TXDIS | AT91C_US_RXDIS | AT91C_US_RSTTX | AT91C_US_RSTRX;
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}
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*/
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static uint8_t us_inbuf[sizeof(UsbCommand)];
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static uint8_t us_outbuf[sizeof(UsbCommand)];
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/*
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// transfer from client to device
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inline int16_t usart_readbuffer(uint8_t *data) {
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uint32_t rcr = pUS1->US_RCR;
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if (rcr < sizeof(us_inbuf)) {
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pUS1->US_PTCR = AT91C_PDC_RXTDIS;
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memcpy(data, us_inbuf, sizeof(us_inbuf) - rcr);
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// Reset DMA buffer
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pUS1->US_RPR = (uint32_t)us_inbuf;
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pUS1->US_RCR = sizeof(us_inbuf);
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pUS1->US_PTCR = AT91C_PDC_RXTEN;
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return sizeof(us_inbuf) - rcr;
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} else {
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return 0;
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}
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}
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*/
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uint8_t check = 0;
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inline int16_t usart_readbuffer(uint8_t *data) {
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// Check if the first PDC bank is free
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if (pUS1->US_RCR == 0) {
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pUS1->US_RPR = (uint32_t)data;
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pUS1->US_RCR = sizeof(UsbCommand);
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pUS1->US_PTCR = AT91C_PDC_RXTEN | AT91C_PDC_TXTEN;
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check = 0;
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return 2;
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} else {
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return 0;
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}
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}
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void usart_readcheck(uint8_t *data, size_t len) {
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if (pUS1->US_RCR < len) {
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if (check == 0) {
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StartCountUS();
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check = 1;
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}
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//300ms
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if (GetCountUS() > 300000) {
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pUS1->US_RPR = (uint32_t)data;
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pUS1->US_RCR = len;
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check = 0;
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}
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} else {
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check = 0;
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}
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}
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inline bool usart_dataavailable(void) {
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return pUS1->US_RCR < sizeof(us_inbuf);
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}
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inline int16_t usart_readcommand(uint8_t *data) {
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if (pUS1->US_RCR == 0)
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return usart_readbuffer(data);
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return 0;
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}
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inline bool usart_commandavailable(void) {
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return (pUS1->US_RCR == 0);
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}
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/*
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// transfer from device to client
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inline int16_t usart_writebuffer(uint8_t *data, size_t len) {
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if (pUS1->US_CSR & AT91C_US_ENDTX) {
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memcpy(us_outbuf, data, len);
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pUS1->US_TPR = (uint32_t)us_outbuf;
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pUS1->US_TCR = len;
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pUS1->US_PTCR = AT91C_PDC_TXTEN;
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while (!(pUS1->US_CSR & AT91C_US_ENDTX)) {};
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pUS1->US_PTCR = AT91C_PDC_TXTDIS;
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return len;
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} else {
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return 0;
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}
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}
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*/
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// transfer from device to client
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inline int16_t usart_writebuffer(uint8_t *data, size_t len) {
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while (pUS1->US_TCR && pUS1->US_TNCR) {};
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// Check if the first PDC bank is free
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if (pUS1->US_TCR == 0) {
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memcpy(us_outbuf, data, len);
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pUS1->US_TPR = (uint32_t)us_outbuf;
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pUS1->US_TCR = sizeof(us_outbuf);
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pUS1->US_PTCR = AT91C_PDC_TXTEN | AT91C_PDC_RXTEN;
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}
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// Check if the second PDC bank is free
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else if (pUS1->US_TNCR == 0) {
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memcpy(us_outbuf, data, len);
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pUS1->US_TNPR = (uint32_t)us_outbuf;
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pUS1->US_TNCR = sizeof(us_outbuf);
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pUS1->US_PTCR = AT91C_PDC_TXTEN | AT91C_PDC_RXTEN;
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}
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//wait until finishing transfer
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while (pUS1->US_TCR && pUS1->US_TNCR) {};
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return 0;
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}
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void usart_init(void) {
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// For a nice detailed sample, interrupt driven but still relevant.
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// See https://www.sparkfun.com/datasheets/DevTools/SAM7/at91sam7%20serial%20communications.pdf
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// disable & reset receiver / transmitter for configuration
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pUS1->US_CR = (AT91C_US_RSTRX | AT91C_US_RSTTX | AT91C_US_RXDIS | AT91C_US_TXDIS);
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//enable the USART1 Peripheral clock
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AT91C_BASE_PMC->PMC_PCER = (1 << AT91C_ID_US1);
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// disable PIO control of receive / transmit pins
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pPIO->PIO_PDR |= (AT91C_PA21_RXD1 | AT91C_PA22_TXD1);
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// enable peripheral mode A on receive / transmit pins
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pPIO->PIO_ASR |= (AT91C_PA21_RXD1 | AT91C_PA22_TXD1);
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pPIO->PIO_BSR = 0;
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// enable pull-up on receive / transmit pins (see 31.5.1 I/O Lines)
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pPIO->PIO_PPUER |= (AT91C_PA21_RXD1 | AT91C_PA22_TXD1);
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// set mode
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pUS1->US_MR = AT91C_US_USMODE_NORMAL | // normal mode
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AT91C_US_CLKS_CLOCK | // MCK (48MHz)
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AT91C_US_OVER | // oversampling
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AT91C_US_CHRL_8_BITS | // 8 bits
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AT91C_US_PAR_NONE | // parity: none
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AT91C_US_NBSTOP_1_BIT | // 1 stop bit
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AT91C_US_CHMODE_NORMAL; // channel mode: normal
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// all interrupts disabled
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pUS1->US_IDR = 0xFFFF;
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pUS1->US_BRGR = 48054841 / (AT91_BAUD_RATE << 3);
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// Need speed?
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//pUS1->US_BRGR = 48054841 / (460800 << 3);
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// Write the Timeguard Register
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pUS1->US_TTGR = 0;
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pUS1->US_RTOR = 0;
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pUS1->US_FIDI = 0;
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pUS1->US_IF = 0;
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// Disable double buffers for now
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pUS1->US_TNPR = (uint32_t)0;
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pUS1->US_TNCR = 0;
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pUS1->US_RNPR = (uint32_t)0;
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pUS1->US_RNCR = 0;
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// re-enable receiver / transmitter
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pUS1->US_CR = (AT91C_US_RXEN | AT91C_US_TXEN);
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// ready to receive
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pUS1->US_RPR = (uint32_t)us_inbuf;
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pUS1->US_RCR = 0;
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pUS1->US_RNCR = 0;
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pUS1->US_PTCR = AT91C_PDC_RXTEN;
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}
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