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switching Fpgamode while sniffing with FpgaWriteConfWord() was sometimes too long so the tag answer start was lost. Now, (only with FPGA_BITSTREAM_HF_15) with "FPGA_HF_READER_MODE_SNIFF_AMPLITUDE | FPGA_HF_READER_2SUBCARRIERS_424_484_KHZ": the amplitude is shrank from its 2 LSB bits and those 2 bits are now used to return the current frequency. From my tests, this 2 bits reduction does not affect quality of 1SC sniffing, but it may have slightly reduced the receiving range. FPGA FSK decoding code is also improved. |
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.. | ||
tests | ||
clk_divider.v | ||
fpga.ucf | ||
fpga_felica.bit | ||
fpga_felica.v | ||
fpga_hf.bit | ||
fpga_hf.v | ||
fpga_hf_15.bit | ||
fpga_hf_15.v | ||
fpga_lf.bit | ||
fpga_lf.v | ||
go.bat | ||
hi_flite.v | ||
hi_get_trace.v | ||
hi_iso14443a.v | ||
hi_read_fsk.v | ||
hi_reader.v | ||
hi_reader_15.v | ||
hi_simulate.v | ||
hi_sniffer.v | ||
lf_edge_detect.v | ||
lo_adc.v | ||
lo_edge_detect.v | ||
lo_passthru.v | ||
lo_read.v | ||
lo_simulate.v | ||
lp20khz_1MSa_iir_filter.v | ||
Makefile | ||
min_max_tracker.v | ||
sim.tcl | ||
testbed_fpga.v | ||
testbed_hi_read_tx.v | ||
testbed_hi_simulate.v | ||
testbed_lo_read.v | ||
testbed_lo_simulate.v | ||
util.v | ||
xst_felica.scr | ||
xst_hf.scr | ||
xst_hf_15.scr | ||
xst_lf.scr |