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https://github.com/RfidResearchGroup/proxmark3.git
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49f7ae57dc
This was implemented with a new pair of RPCs CMD_HF_MIFARE_READBL_EX and CMD_HF_MIFARE_WRITEBL_EX these RPCs support all combinations of read/write commands, wakeup, and auth options so in time can replace the other MFC read/write commands too reduce armsrc code size and complexity. Also added config parsing for the gdm cfg block when reading with hf mf gdmcfg and explicitly with hf mf gdmparsecfg.
181 lines
6.7 KiB
C
181 lines
6.7 KiB
C
//-----------------------------------------------------------------------------
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// Copyright (C) Jonathan Westhues, Nov 2006
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// Copyright (C) Gerhard de Koning Gans - May 2008
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// Copyright (C) Proxmark3 contributors. See AUTHORS.md for details.
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//
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// This program is free software: you can redistribute it and/or modify
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// it under the terms of the GNU General Public License as published by
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// the Free Software Foundation, either version 3 of the License, or
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// (at your option) any later version.
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//
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// This program is distributed in the hope that it will be useful,
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// but WITHOUT ANY WARRANTY; without even the implied warranty of
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// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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// GNU General Public License for more details.
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//
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// See LICENSE.txt for the text of the license.
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//-----------------------------------------------------------------------------
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// Routines to support ISO 14443 type A.
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//-----------------------------------------------------------------------------
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#ifndef __ISO14443A_H
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#define __ISO14443A_H
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#include "common.h"
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#include "mifare.h" // struct
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#include "pm3_cmd.h"
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#include "crc16.h" // compute_crc
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// When the PM acts as tag and is receiving it takes
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// 2 ticks delay in the RF part (for the first falling edge),
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// 3 ticks for the A/D conversion,
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// 8 ticks on average until the start of the SSC transfer,
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// 8 ticks until the SSC samples the first data
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// 7*16 ticks to complete the transfer from FPGA to ARM
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// 8 ticks until the next ssp_clk rising edge
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// 4*16 ticks until we measure the time
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// - 8*16 ticks because we measure the time of the previous transfer
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#define DELAY_AIR2ARM_AS_TAG (2 + 3 + 8 + 8 + 7*16 + 8 + 4*16 - 8*16)
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typedef struct {
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enum {
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DEMOD_14A_UNSYNCD,
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// DEMOD_14A_HALF_SYNCD,
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// DEMOD_14A_MOD_FIRST_HALF,
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// DEMOD_14A_NOMOD_FIRST_HALF,
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DEMOD_14A_MANCHESTER_DATA
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} state;
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uint16_t twoBits;
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uint16_t highCnt;
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uint16_t bitCount;
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uint16_t collisionPos;
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uint16_t syncBit;
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uint8_t parityBits;
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uint8_t parityLen;
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uint16_t shiftReg;
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uint16_t samples;
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uint16_t len;
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uint32_t startTime, endTime;
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uint8_t *output;
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uint8_t *parity;
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} tDemod14a;
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/*
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typedef enum {
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MOD_NOMOD = 0,
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MOD_SECOND_HALF,
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MOD_FIRST_HALF,
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MOD_BOTH_HALVES
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} Modulation_t;
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*/
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typedef struct {
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enum {
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STATE_14A_UNSYNCD,
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STATE_14A_START_OF_COMMUNICATION,
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STATE_14A_MILLER_X,
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STATE_14A_MILLER_Y,
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STATE_14A_MILLER_Z,
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// DROP_NONE,
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// DROP_FIRST_HALF,
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} state;
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uint16_t shiftReg;
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int16_t bitCount;
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uint16_t len;
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//uint16_t byteCntMax;
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uint16_t posCnt;
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uint16_t syncBit;
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uint8_t parityBits;
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uint8_t parityLen;
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uint32_t fourBits;
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uint32_t startTime, endTime;
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uint8_t *output;
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uint8_t *parity;
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} tUart14a;
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// indices into responses array:
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typedef enum {
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RESP_INDEX_ATQA,
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RESP_INDEX_UIDC1,
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RESP_INDEX_UIDC2,
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RESP_INDEX_UIDC3,
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RESP_INDEX_SAKC1,
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RESP_INDEX_SAKC2,
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RESP_INDEX_SAKC3,
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RESP_INDEX_RATS,
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RESP_INDEX_VERSION,
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RESP_INDEX_SIGNATURE,
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RESP_INDEX_PPS,
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RESP_INDEX_PACK,
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} resp_index_t;
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#ifndef AddCrc14A
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# define AddCrc14A(data, len) compute_crc(CRC_14443_A, (data), (len), (data)+(len), (data)+(len)+1)
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#endif
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#ifndef AddCrc14B
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# define AddCrc14B(data, len) compute_crc(CRC_14443_B, (data), (len), (data)+(len), (data)+(len)+1)
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#endif
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#ifndef CheckCrc14A
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# define CheckCrc14A(data, len) check_crc(CRC_14443_A, (data), (len))
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#endif
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void printHf14aConfig(void);
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void setHf14aConfig(const hf14a_config *hc);
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hf14a_config *getHf14aConfig(void);
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void iso14a_set_timeout(uint32_t timeout);
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uint32_t iso14a_get_timeout(void);
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void GetParity(const uint8_t *pbtCmd, uint16_t len, uint8_t *par);
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tDemod14a *GetDemod14a(void);
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void Demod14aReset(void);
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void Demod14aInit(uint8_t *data, uint8_t *par);
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tUart14a *GetUart14a(void);
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void Uart14aReset(void);
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void Uart14aInit(uint8_t *data, uint8_t *par);
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RAMFUNC bool MillerDecoding(uint8_t bit, uint32_t non_real_time);
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RAMFUNC int ManchesterDecoding(uint8_t bit, uint16_t offset, uint32_t non_real_time);
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void RAMFUNC SniffIso14443a(uint8_t param);
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void SimulateIso14443aTag(uint8_t tagType, uint16_t flags, uint8_t *data, uint8_t exitAfterNReads);
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bool SimulateIso14443aInit(uint8_t tagType, uint16_t flags, uint8_t *data, tag_response_info_t **responses, uint32_t *cuid, uint32_t counters[3], uint8_t tearings[3], uint8_t *pages);
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bool GetIso14443aCommandFromReader(uint8_t *received, uint8_t *par, int *len);
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void iso14443a_antifuzz(uint32_t flags);
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void ReaderIso14443a(PacketCommandNG *c);
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void ReaderTransmit(uint8_t *frame, uint16_t len, uint32_t *timing);
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void ReaderTransmitBitsPar(uint8_t *frame, uint16_t bits, uint8_t *par, uint32_t *timing);
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void ReaderTransmitPar(uint8_t *frame, uint16_t len, uint8_t *par, uint32_t *timing);
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uint16_t ReaderReceive(uint8_t *receivedAnswer, uint8_t *par);
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void iso14443a_setup(uint8_t fpga_minor_mode);
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int iso14_apdu(uint8_t *cmd, uint16_t cmd_len, bool send_chaining, void *data, uint8_t *res);
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int iso14443a_select_card(uint8_t *uid_ptr, iso14a_card_select_t *p_card, uint32_t *cuid_ptr, bool anticollision, uint8_t num_cascades, bool no_rats);
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int iso14443a_select_cardEx(uint8_t *uid_ptr, iso14a_card_select_t *p_card, uint32_t *cuid_ptr, bool anticollision, uint8_t num_cascades, bool no_rats, iso14a_polling_parameters_t *polling_parameters);
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int iso14443a_fast_select_card(uint8_t *uid_ptr, uint8_t num_cascades);
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void iso14a_set_trigger(bool enable);
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int EmSendCmd14443aRaw(const uint8_t *resp, uint16_t respLen);
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int EmSend4bit(uint8_t resp);
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int EmSendCmd(uint8_t *resp, uint16_t respLen);
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int EmSendCmdEx(uint8_t *resp, uint16_t respLen, bool collision);
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int EmGetCmd(uint8_t *received, uint16_t *len, uint8_t *par);
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int EmSendCmdPar(uint8_t *resp, uint16_t respLen, uint8_t *par);
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int EmSendCmdParEx(uint8_t *resp, uint16_t respLen, uint8_t *par, bool collision);
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int EmSendPrecompiledCmd(tag_response_info_t *p_response);
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bool prepare_allocated_tag_modulation(tag_response_info_t *response_info, uint8_t **buffer, size_t *max_buffer_size);
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bool prepare_tag_modulation(tag_response_info_t *response_info, size_t max_buffer_size);
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bool EmLogTrace(uint8_t *reader_data, uint16_t reader_len, uint32_t reader_StartTime, uint32_t reader_EndTime, uint8_t *reader_Parity,
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uint8_t *tag_data, uint16_t tag_len, uint32_t tag_StartTime, uint32_t tag_EndTime, uint8_t *tag_Parity);
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void ReaderMifare(bool first_try, uint8_t block, uint8_t keytype);
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void DetectNACKbug(void);
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bool GetIso14443aAnswerFromTag_Thinfilm(uint8_t *receivedResponse, uint8_t *received_len);
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extern iso14a_polling_parameters_t WUPA_POLLING_PARAMETERS;
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extern iso14a_polling_parameters_t REQA_POLLING_PARAMETERS;
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#endif /* __ISO14443A_H */
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