iceman1001 774c8dd666 Add: 'fpga LF ADC path' - a major mode for LF ADC path		2019-07-31 15:50:10 +02:00
..
tests	style of .v files	2019-07-30 22:51:38 +02:00
clk_divider.v	style of .v files	2019-07-30 22:51:38 +02:00
fpga.ucf
fpga_hf.bit
fpga_hf.v
fpga_lf.bit
fpga_lf.v	Add: 'fpga LF ADC path' - a major mode for LF ADC path	2019-07-31 15:50:10 +02:00
go.bat
hi_flite.v
hi_iso14443a.v
hi_read_rx_xcorr.v
hi_read_tx.v	style of .v files	2019-07-30 22:51:38 +02:00
hi_simulate.v	style of .v files	2019-07-30 22:51:38 +02:00
hi_sniffer.v
lf_edge_detect.v
lo_adc.v	Add: 'fpga LF ADC path' - a major mode for LF ADC path	2019-07-31 15:50:10 +02:00
lo_edge_detect.v	style of .v files	2019-07-30 22:51:38 +02:00
lo_passthru.v	style of .v files	2019-07-30 22:51:38 +02:00
lo_read.v
lo_simulate.v	style of .v files	2019-07-30 22:51:38 +02:00
lp20khz_1MSa_iir_filter.v
Makefile
min_max_tracker.v
sim.tcl	setting svn:eol-style=native on files, part 3	2010-02-22 19:29:05 +00:00
testbed_fpga.v
testbed_hi_read_tx.v
testbed_hi_simulate.v
testbed_lo_read.v
testbed_lo_simulate.v
util.v
xst_hf.scr	THIS REQUIRES A BOOTROM UPDATE!! To save FPGA area, split the LF and HF bitstreams and load them on-demand.	2014-06-20 01:02:59 +02:00
xst_lf.scr
xst_nfc.scr