mirror of
https://github.com/RfidResearchGroup/proxmark3.git
synced 2024-12-31 04:39:49 +08:00
417 lines
No EOL
10 KiB
C
417 lines
No EOL
10 KiB
C
#include "flashmem.h"
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/* here: use NCPS2 @ PA10: */
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#define SPI_CSR_NUM 2 // Chip Select register[] 0,1,2,3 (at91samv512 has 4)
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/* PCS_0 for NPCS0, PCS_1 for NPCS1 ... */
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#define PCS_0 ((0<<0)|(1<<1)|(1<<2)|(1<<3)) // 0xE - 1110
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#define PCS_1 ((1<<0)|(0<<1)|(1<<2)|(1<<3)) // 0xD - 1101
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#define PCS_2 ((1<<0)|(1<<1)|(0<<2)|(1<<3)) // 0xB - 1011
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#define PCS_3 ((1<<0)|(1<<1)|(1<<2)|(0<<3)) // 0x7 - 0111
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// TODO
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#if (SPI_CSR_NUM == 0)
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#define SPI_MR_PCS PCS_0
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#elif (SPI_CSR_NUM == 1)
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#define SPI_MR_PCS PCS_1
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#elif (SPI_CSR_NUM == 2)
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#define SPI_MR_PCS PCS_2
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#elif (SPI_CSR_NUM == 3)
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#define SPI_MR_PCS PCS_3
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#else
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#error "SPI_CSR_NUM invalid"
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// not realy - when using an external address decoder...
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// but this code takes over the complete SPI-interace anyway
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#endif
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/*
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读取指令，可以从一个位置开始持续的读，最多能将整块芯片读取完
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页写指令，每次写入为1-256字节，但是不能跨越256字节边界
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擦除指令，擦除指令后必须将CS拉高，否则不会执行
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*/
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void FlashSetup(void) {
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// PA1 -> SPI_NCS3 chip select (MEM)
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// PA10 -> SPI_NCS2 chip select (LCD)
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// PA11 -> SPI_NCS0 chip select (FPGA)
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// PA12 -> SPI_MISO Master-In Slave-Out
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// PA13 -> SPI_MOSI Master-Out Slave-In
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// PA14 -> SPI_SPCK Serial Clock
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// Disable PIO control of the following pins, allows use by the SPI peripheral
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AT91C_BASE_PIOA->PIO_PDR = GPIO_NCS0 | GPIO_MISO | GPIO_MOSI | GPIO_SPCK | GPIO_NCS2;
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// Pull-up Enable
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AT91C_BASE_PIOA->PIO_PPUER = GPIO_NCS0 | GPIO_MISO | GPIO_MOSI | GPIO_SPCK | GPIO_NCS2;
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// Peripheral A
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AT91C_BASE_PIOA->PIO_ASR = GPIO_NCS0 | GPIO_MISO | GPIO_MOSI | GPIO_SPCK;
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// Peripheral B
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AT91C_BASE_PIOA->PIO_BSR |= GPIO_NCS2;
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//enable the SPI Peripheral clock
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AT91C_BASE_PMC->PMC_PCER = (1 << AT91C_ID_SPI);
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// Enable SPI
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AT91C_BASE_SPI->SPI_CR = AT91C_SPI_SPIEN;
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// NPCS2 Mode 0
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AT91C_BASE_SPI->SPI_MR =
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( 0 << 24) | // Delay between chip selects (take default: 6 MCK periods)
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(0xB << 16) | // Peripheral Chip Select (selects SPI_NCS2 or PA10)
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( 0 << 7) | // Local Loopback Disabled
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( 1 << 4) | // Mode Fault Detection disabled
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( 0 << 2) | // Chip selects connected directly to peripheral
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( 0 << 1) | // Fixed Peripheral Select
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( 1 << 0); // Master Mode
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// 8 bit
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AT91C_BASE_SPI->SPI_CSR[2] =
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( 0 << 24) | // Delay between Consecutive Transfers (32 MCK periods)
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( 0 << 16) | // Delay Before SPCK (1 MCK period)
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( 6 << 8) | // Serial Clock Baud Rate (baudrate = MCK/6 = 24Mhz/6 = 4M baud
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( 0 << 4) | // Bits per Transfer (8 bits)
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( 1 << 3) | // Chip Select inactive after transfer
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( 1 << 1) | // Clock Phase data captured on leading edge, changes on following edge
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( 0 << 0); // Clock Polarity inactive state is logic 0
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// read first, empty buffer
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if (AT91C_BASE_SPI->SPI_RDR == 0) {};
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}
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void FlashStop(void) {
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//* Reset all the Chip Select register
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AT91C_BASE_SPI->SPI_CSR[0] = 0;
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AT91C_BASE_SPI->SPI_CSR[1] = 0;
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AT91C_BASE_SPI->SPI_CSR[2] = 0;
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AT91C_BASE_SPI->SPI_CSR[3] = 0;
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// Reset the SPI mode
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AT91C_BASE_SPI->SPI_MR = 0;
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// Disable all interrupts
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AT91C_BASE_SPI->SPI_IDR = 0xFFFFFFFF;
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// SPI disable
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AT91C_BASE_SPI->SPI_CR = AT91C_SPI_SPIDIS;
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if ( MF_DBGLEVEL > 3 ) Dbprintf("FlashStop");
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StopTicks();
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}
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// send one byte over SPI
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uint16_t FlashSendByte(uint32_t data) {
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uint16_t incoming = 0;
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WDT_HIT();
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// wait until SPI is ready for transfer
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while ((AT91C_BASE_SPI->SPI_SR & AT91C_SPI_TXEMPTY) == 0) {};
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// send the data
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AT91C_BASE_SPI->SPI_TDR = data;
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// wait recive transfer is complete
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while ((AT91C_BASE_SPI->SPI_SR & AT91C_SPI_RDRF) == 0)
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WDT_HIT();
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// reading incoming data
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incoming = ((AT91C_BASE_SPI->SPI_RDR) & 0xFFFF);
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return incoming;
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}
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// send last byte over SPI
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uint16_t FlashSendLastByte(uint32_t data) {
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return FlashSendByte(data | AT91C_SPI_LASTXFER);
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}
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// read state register 1
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uint8_t Flash_ReadStat1(void) {
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FlashSendByte(READSTAT1);
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uint8_t stat1 = FlashSendLastByte(0xFF);
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if ( MF_DBGLEVEL > 3 ) Dbprintf("stat1 [%02x]", stat1);
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return stat1;
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}
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// read state register 2
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uint8_t Flash_ReadStat2(void) {
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FlashSendByte(READSTAT2);
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uint8_t stat2 = FlashSendLastByte(0xFF);
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if ( MF_DBGLEVEL > 3 ) Dbprintf("stat2 [%02x]", stat2);
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return stat2;
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}
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// determine whether FLASHMEM is busy
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bool Flash_CheckBusy(uint16_t times) {
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bool ret = (Flash_ReadStat1() & BUSY);
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if (!ret || !times || !(times--))
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return ret;
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while (times) {
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WDT_HIT();
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WaitMS(1);
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ret = (Flash_ReadStat1() & BUSY);
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if (!ret)
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break;
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times--;
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}
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return ret;
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}
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// read ID out
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uint8_t Flash_ReadID(void) {
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if (Flash_CheckBusy(100)) return 0;
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// Manufacture ID / device ID
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FlashSendByte(ID);
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FlashSendByte(0x00);
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FlashSendByte(0x00);
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FlashSendByte(0x00);
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uint8_t man_id = FlashSendByte(0xFF);
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uint8_t dev_id = FlashSendLastByte(0xFF);
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if ( MF_DBGLEVEL > 3 ) Dbprintf("Flash ReadID | Man ID %02x | Device ID %02x", man_id, dev_id);
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if ( (man_id == WINBOND_MANID ) && (dev_id == WINBOND_DEVID) )
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return dev_id;
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return 0;
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}
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// read unique id for chip.
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void Flash_UniqueID(uint8_t *uid) {
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if (Flash_CheckBusy(100)) return;
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// reading unique serial number
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FlashSendByte(UNIQUE_ID);
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FlashSendByte(0xFF);
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FlashSendByte(0xFF);
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FlashSendByte(0xFF);
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FlashSendByte(0xFF);
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uid[7] = FlashSendByte(0xFF);
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uid[6] = FlashSendByte(0xFF);
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uid[5] = FlashSendByte(0xFF);
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uid[4] = FlashSendByte(0xFF);
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uid[3] = FlashSendByte(0xFF);
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uid[2] = FlashSendByte(0xFF);
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uid[1] = FlashSendByte(0xFF);
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uid[0] = FlashSendLastByte(0xFF);
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}
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uint16_t Flash_ReadData(uint32_t address, uint8_t *out, uint16_t len) {
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if (!FlashInit()) return 0;
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Flash_ReadStat1();
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// length should never be zero
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if (!len || Flash_CheckBusy(100)) return 0;
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FlashSendByte(READDATA);
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FlashSendByte((address >> 16) & 0xFF);
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FlashSendByte((address >> 8) & 0xFF);
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FlashSendByte((address >> 0) & 0xFF);
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uint16_t i = 0;
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for (; i < (len - 1); i++)
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out[i] = FlashSendByte(0xFF);
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out[i] = FlashSendLastByte(0xFF);
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FlashStop();
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return len;
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}
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// Write data can only program one page. A page has 256 bytes.
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// if len > 256, it might wrap around and overwrite pos 0.
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uint16_t Flash_WriteData(uint32_t address, uint8_t *in, uint16_t len) {
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// length should never be zero
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if (!len)
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return 0;
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// Max 256 bytes write
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if (((address & 0xFF) + len) > 256) {
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Dbprintf("Flash_WriteData 256 fail [ 0x%02x ] [ %u ]", (address & 0xFF)+len, len );
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return 0;
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}
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// out-of-range
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if ( (( address >> 16 ) & 0xFF ) > MAX_BLOCKS) {
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Dbprintf("Flash_WriteData, block out-of-range");
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return 0;
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}
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if (!FlashInit()) {
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Dbprintf("Flash_WriteData init fail");
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return 0;
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}
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Flash_ReadStat1();
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Flash_WriteEnable();
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FlashSendByte(PAGEPROG);
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FlashSendByte((address >> 16) & 0xFF);
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FlashSendByte((address >> 8) & 0xFF);
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FlashSendByte((address >> 0) & 0xFF);
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uint16_t i = 0;
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for (; i < (len - 1); i++)
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FlashSendByte(in[i]);
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FlashSendLastByte(in[i]);
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FlashStop();
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return len;
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}
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bool Flash_WipeMemoryPage(uint8_t page) {
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if (!FlashInit()) {
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Dbprintf("Flash_WriteData init fail");
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return false;
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}
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Flash_ReadStat1();
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// Each block is 64Kb. One block erase takes 1s ( 1000ms )
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Flash_WriteEnable(); Flash_Erase64k(page); Flash_CheckBusy(1000);
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FlashStop();
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return true;
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}
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// Wipes flash memory completely, fills with 0xFF
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bool Flash_WipeMemory() {
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if (!FlashInit()) {
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Dbprintf("Flash_WriteData init fail");
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return false;
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}
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Flash_ReadStat1();
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// Each block is 64Kb. Four blocks
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// one block erase takes 1s ( 1000ms )
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Flash_WriteEnable(); Flash_Erase64k(0); Flash_CheckBusy(1000);
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Flash_WriteEnable(); Flash_Erase64k(1); Flash_CheckBusy(1000);
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Flash_WriteEnable(); Flash_Erase64k(2); Flash_CheckBusy(1000);
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Flash_WriteEnable(); Flash_Erase64k(3); Flash_CheckBusy(1000);
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FlashStop();
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return true;
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}
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// enable the flash write
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void Flash_WriteEnable() {
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FlashSendLastByte(WRITEENABLE);
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if ( MF_DBGLEVEL > 3 ) Dbprintf("Flash Write enabled");
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}
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// erase 4K at one time
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// execution time: 0.8ms / 800us
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bool Flash_Erase4k(uint8_t block, uint8_t sector) {
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if (block > MAX_BLOCKS || sector > MAX_SECTORS) return false;
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FlashSendByte(SECTORERASE);
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FlashSendByte(block);
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FlashSendByte(sector << 4);
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FlashSendLastByte(00);
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return true;
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}
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/*
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// erase 32K at one time
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// execution time: 0,3s / 300ms
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bool Flash_Erase32k(uint32_t address) {
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if (address & (32*1024 - 1)) {
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if ( MF_DBGLEVEL > 1 ) Dbprintf("Flash_Erase32k : Address is not align at 4096");
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return false;
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}
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FlashSendByte(BLOCK32ERASE);
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FlashSendByte((address >> 16) & 0xFF);
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FlashSendByte((address >> 8) & 0xFF);
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FlashSendLastByte((address >> 0) & 0xFF);
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return true;
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}
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*/
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// erase 64k at one time
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// since a block is 64kb, and there is four blocks.
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// we only need block number, as MSB
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// execution time: 1s / 1000ms
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// 0x00 00 00 -- 0x 00 FF FF == block 0
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// 0x01 00 00 -- 0x 01 FF FF == block 1
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// 0x02 00 00 -- 0x 02 FF FF == block 2
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// 0x03 00 00 -- 0x 03 FF FF == block 3
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bool Flash_Erase64k(uint8_t block) {
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if (block > MAX_BLOCKS) return false;
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FlashSendByte(BLOCK64ERASE);
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FlashSendByte(block);
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FlashSendByte(0x00);
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FlashSendLastByte(0x00);
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return true;
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}
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// Erase chip
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void Flash_EraseChip(void) {
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FlashSendLastByte(CHIPERASE);
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}
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// initialize
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bool FlashInit(void) {
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FlashSetup();
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StartTicks();
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if (Flash_CheckBusy(100)) {
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StopTicks();
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return false;
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}
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if ( MF_DBGLEVEL > 3 ) Dbprintf("FlashInit OK");
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return true;
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}
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void Flashmem_print_status(void) {
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DbpString("Flash memory");
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if (!FlashInit()) {
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DbpString(" init....................FAIL");
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return;
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}
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DbpString(" init....................OK");
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uint8_t dev_id = Flash_ReadID();
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switch (dev_id) {
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case 0x11 :
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DbpString(" Memory size.............2 mbits / 256kb");
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break;
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case 0x10 :
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DbpString(" Memory size..... .......1 mbits / 128kb");
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break;
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case 0x05 :
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DbpString(" Memory size.............512 kbits / 64kb");
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break;
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default :
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DbpString(" Device ID............... --> Unknown <--");
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break;
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}
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uint8_t uid[8] = {0,0,0,0,0,0,0,0};
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Flash_UniqueID(uid);
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Dbprintf(" Unique ID...............0x%02x%02x%02x%02x%02x%02x%02x%02x",
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uid[7], uid[6], uid[5], uid[4],
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uid[3], uid[2], uid[1], uid[0]
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);
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FlashStop();
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} |