mirror of
https://github.com/RfidResearchGroup/proxmark3.git
synced 2024-11-11 01:55:38 +08:00
339 lines
11 KiB
C
339 lines
11 KiB
C
//-----------------------------------------------------------------------------
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// This code is licensed to you under the terms of the GNU GPL, version 2 or,
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// at your option, any later version. See the LICENSE.txt file for the text of
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// the license.
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//-----------------------------------------------------------------------------
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// Main code for the bootloader
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//-----------------------------------------------------------------------------
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#include "clocks.h"
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#include "usb_cdc.h"
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#include "proxmark3_arm.h"
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#define DEBUG 0
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struct common_area common_area __attribute__((section(".commonarea")));
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unsigned int start_addr, end_addr, bootrom_unlocked;
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extern char _bootrom_start, _bootrom_end, _flash_end;
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extern uint32_t _flash_start[AT91C_IFLASH_NB_OF_PAGES * AT91C_IFLASH_PAGE_SIZE / sizeof(uint32_t)];
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extern uint32_t _osimage_entry;
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static int reply_old(uint64_t cmd, uint64_t arg0, uint64_t arg1, uint64_t arg2, void *data, size_t len) {
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PacketResponseOLD txcmd;
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for (size_t i = 0; i < sizeof(PacketResponseOLD); i++)
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((uint8_t *)&txcmd)[i] = 0x00;
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// Compose the outgoing command frame
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txcmd.cmd = cmd;
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txcmd.arg[0] = arg0;
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txcmd.arg[1] = arg1;
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txcmd.arg[2] = arg2;
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// Add the (optional) content to the frame, with a maximum size of PM3_CMD_DATA_SIZE
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if (data && len) {
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len = MIN(len, PM3_CMD_DATA_SIZE);
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for (size_t i = 0; i < len; i++) {
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txcmd.d.asBytes[i] = ((uint8_t *)data)[i];
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}
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}
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int result = PM3_EUNDEF;
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// Send frame and make sure all bytes are transmitted
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result = usb_write((uint8_t *)&txcmd, sizeof(PacketResponseOLD));
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return result;
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}
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#if DEBUG
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static void DbpString(char *str) {
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uint8_t len = 0;
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while (str[len] != 0x00)
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len++;
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reply_old(CMD_DEBUG_PRINT_STRING, len, 0, 0, (uint8_t *)str, len);
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}
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#endif
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static void ConfigClocks(void) {
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// we are using a 16 MHz crystal as the basis for everything
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// slow clock runs at 32kHz typical regardless of crystal
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// enable system clock and USB clock
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AT91C_BASE_PMC->PMC_SCER |= AT91C_PMC_PCK | AT91C_PMC_UDP;
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// enable the clock to the following peripherals
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AT91C_BASE_PMC->PMC_PCER =
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(1 << AT91C_ID_PIOA) |
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(1 << AT91C_ID_ADC) |
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(1 << AT91C_ID_SPI) |
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(1 << AT91C_ID_SSC) |
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(1 << AT91C_ID_PWMC) |
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(1 << AT91C_ID_UDP);
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mck_from_slck_to_pll();
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}
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static void Fatal(void) {
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for (;;) {};
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}
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static void UsbPacketReceived(uint8_t *packet) {
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int i, dont_ack = 0;
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PacketCommandOLD *c = (PacketCommandOLD *)packet;
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//if ( len != sizeof(PacketCommandOLD`)) Fatal();
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uint32_t arg0 = (uint32_t)c->arg[0];
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switch (c->cmd) {
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case CMD_DEVICE_INFO: {
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dont_ack = 1;
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arg0 = DEVICE_INFO_FLAG_BOOTROM_PRESENT |
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DEVICE_INFO_FLAG_CURRENT_MODE_BOOTROM |
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DEVICE_INFO_FLAG_UNDERSTANDS_START_FLASH |
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DEVICE_INFO_FLAG_UNDERSTANDS_CHIP_INFO |
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DEVICE_INFO_FLAG_UNDERSTANDS_VERSION;
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if (common_area.flags.osimage_present)
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arg0 |= DEVICE_INFO_FLAG_OSIMAGE_PRESENT;
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reply_old(CMD_DEVICE_INFO, arg0, 1, 2, 0, 0);
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}
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break;
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case CMD_CHIP_INFO: {
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dont_ack = 1;
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arg0 = *(AT91C_DBGU_CIDR);
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reply_old(CMD_CHIP_INFO, arg0, 0, 0, 0, 0);
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}
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break;
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case CMD_BL_VERSION: {
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dont_ack = 1;
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arg0 = BL_VERSION_1_0_0;
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reply_old(CMD_BL_VERSION, arg0, 0, 0, 0, 0);
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}
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break;
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case CMD_FINISH_WRITE: {
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for (int j = 0; j < 2; j++) {
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uint32_t flash_address = arg0 + (0x100 * j);
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AT91PS_EFC efc_bank = AT91C_BASE_EFC0;
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int offset = 0;
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uint32_t page_n = (flash_address - ((uint32_t)_flash_start)) / AT91C_IFLASH_PAGE_SIZE;
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if (page_n >= AT91C_IFLASH_NB_OF_PAGES / 2) {
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page_n -= AT91C_IFLASH_NB_OF_PAGES / 2;
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efc_bank = AT91C_BASE_EFC1;
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// We need to offset the writes or it will not fill the correct bank write buffer.
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offset = (AT91C_IFLASH_NB_OF_PAGES / 2) * AT91C_IFLASH_PAGE_SIZE / sizeof(uint32_t);
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}
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for (i = 0 + (64 * j); i < 64 + (64 * j); i++) {
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_flash_start[offset + i] = c->d.asDwords[i];
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}
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/* Check that the address that we are supposed to write to is within our allowed region */
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if (((flash_address + AT91C_IFLASH_PAGE_SIZE - 1) >= end_addr) || (flash_address < start_addr)) {
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/* Disallow write */
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dont_ack = 1;
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reply_old(CMD_NACK, 0, 0, 0, 0, 0);
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} else {
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efc_bank->EFC_FCR = MC_FLASH_COMMAND_KEY |
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MC_FLASH_COMMAND_PAGEN(page_n) |
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AT91C_MC_FCMD_START_PROG;
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}
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// Wait until flashing of page finishes
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uint32_t sr;
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while (!((sr = efc_bank->EFC_FSR) & AT91C_MC_FRDY));
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if (sr & (AT91C_MC_LOCKE | AT91C_MC_PROGE)) {
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dont_ack = 1;
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reply_old(CMD_NACK, sr, 0, 0, 0, 0);
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}
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}
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}
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break;
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case CMD_HARDWARE_RESET: {
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usb_disable();
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AT91C_BASE_RSTC->RSTC_RCR = RST_CONTROL_KEY | AT91C_RSTC_PROCRST;
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}
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break;
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case CMD_START_FLASH: {
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if (c->arg[2] == START_FLASH_MAGIC)
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bootrom_unlocked = 1;
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else
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bootrom_unlocked = 0;
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int prot_start = (int)&_bootrom_start;
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int prot_end = (int)&_bootrom_end;
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int allow_start = (int)&_flash_start;
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int allow_end = (int)&_flash_end;
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int cmd_start = c->arg[0];
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int cmd_end = c->arg[1];
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/* Only allow command if the bootrom is unlocked, or the parameters are outside of the protected
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* bootrom area. In any case they must be within the flash area.
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*/
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if ((bootrom_unlocked || ((cmd_start >= prot_end) || (cmd_end < prot_start))) &&
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(cmd_start >= allow_start) &&
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(cmd_end <= allow_end)) {
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start_addr = cmd_start;
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end_addr = cmd_end;
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} else {
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start_addr = end_addr = 0;
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dont_ack = 1;
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reply_old(CMD_NACK, 0, 0, 0, 0, 0);
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}
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}
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break;
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default: {
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Fatal();
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}
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break;
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}
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if (!dont_ack)
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reply_old(CMD_ACK, arg0, 0, 0, 0, 0);
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}
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static void flash_mode(void) {
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start_addr = 0;
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end_addr = 0;
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bootrom_unlocked = 0;
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uint8_t rx[sizeof(PacketCommandOLD)];
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common_area.command = COMMON_AREA_COMMAND_NONE;
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if (!common_area.flags.button_pressed && BUTTON_PRESS())
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common_area.flags.button_pressed = 1;
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usb_enable();
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// wait for reset to be complete?
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for (volatile size_t i = 0; i < 0x100000; i++) {};
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for (;;) {
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WDT_HIT();
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// Check if there is a usb packet available
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if (usb_poll_validate_length()) {
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if (usb_read(rx, sizeof(rx))) {
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UsbPacketReceived(rx);
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}
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}
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if (common_area.flags.button_pressed && !BUTTON_PRESS()) {
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common_area.flags.button_pressed = 0;
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}
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if (!common_area.flags.button_pressed && BUTTON_PRESS()) {
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/* Perform a reset to leave flash mode */
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common_area.flags.button_pressed = 1;
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usb_disable();
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LED_B_ON();
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AT91C_BASE_RSTC->RSTC_RCR = RST_CONTROL_KEY | AT91C_RSTC_PROCRST;
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for (;;) {};
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}
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}
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}
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void BootROM(void);
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void BootROM(void) {
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//------------
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// First set up all the I/O pins; GPIOs configured directly, other ones
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// just need to be assigned to the appropriate peripheral.
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// Kill all the pullups, especially the one on USB D+; leave them for
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// the unused pins, though.
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AT91C_BASE_PIOA->PIO_PPUDR =
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GPIO_USB_PU |
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GPIO_LED_A |
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GPIO_LED_B |
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GPIO_LED_C |
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GPIO_LED_D |
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GPIO_FPGA_DIN |
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GPIO_FPGA_DOUT |
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GPIO_FPGA_CCLK |
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GPIO_FPGA_NINIT |
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GPIO_FPGA_NPROGRAM |
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GPIO_FPGA_DONE |
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GPIO_MUXSEL_HIPKD |
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GPIO_MUXSEL_HIRAW |
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GPIO_MUXSEL_LOPKD |
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GPIO_MUXSEL_LORAW |
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GPIO_RELAY |
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GPIO_NVDD_ON;
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// (and add GPIO_FPGA_ON)
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// These pins are outputs
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AT91C_BASE_PIOA->PIO_OER =
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GPIO_LED_A |
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GPIO_LED_B |
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GPIO_LED_C |
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GPIO_LED_D |
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GPIO_RELAY |
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GPIO_NVDD_ON;
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// PIO controls the following pins
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AT91C_BASE_PIOA->PIO_PER =
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GPIO_USB_PU |
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GPIO_LED_A |
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GPIO_LED_B |
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GPIO_LED_C |
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GPIO_LED_D;
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// USB_D_PLUS_PULLUP_OFF();
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usb_disable();
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LED_D_OFF();
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LED_C_ON();
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LED_B_OFF();
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LED_A_OFF();
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// Set the first 256kb memory flashspeed
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AT91C_BASE_EFC0->EFC_FMR = AT91C_MC_FWS_1FWS | MC_FLASH_MODE_MASTER_CLK_IN_MHZ(48);
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// 9 = 256, 10+ is 512kb
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uint8_t id = (*(AT91C_DBGU_CIDR) & 0xF00) >> 8;
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if (id > 9)
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AT91C_BASE_EFC1->EFC_FMR = AT91C_MC_FWS_1FWS | MC_FLASH_MODE_MASTER_CLK_IN_MHZ(48);
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// Initialize all system clocks
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ConfigClocks();
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LED_A_ON();
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int common_area_present = 0;
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switch (AT91C_BASE_RSTC->RSTC_RSR & AT91C_RSTC_RSTTYP) {
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case AT91C_RSTC_RSTTYP_WATCHDOG:
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case AT91C_RSTC_RSTTYP_SOFTWARE:
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case AT91C_RSTC_RSTTYP_USER:
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/* In these cases the common_area in RAM should be ok, retain it if it's there */
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if (common_area.magic == COMMON_AREA_MAGIC && common_area.version == 1)
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common_area_present = 1;
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break;
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default: /* Otherwise, initialize it from scratch */
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break;
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}
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if (!common_area_present) {
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/* Common area not ok, initialize it */
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size_t i;
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/* Makeshift memset, no need to drag util.c into this */
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for (i = 0; i < sizeof(common_area); i++)
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((char *)&common_area)[i] = 0;
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common_area.magic = COMMON_AREA_MAGIC;
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common_area.version = 1;
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}
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common_area.flags.bootrom_present = 1;
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if ((common_area.command == COMMON_AREA_COMMAND_ENTER_FLASH_MODE) ||
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(!common_area.flags.button_pressed && BUTTON_PRESS()) ||
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(_osimage_entry == 0xffffffffU)) {
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flash_mode();
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} else {
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// clear button status, even if button still pressed
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common_area.flags.button_pressed = 0;
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// jump to Flash address of the osimage entry point (LSBit set for thumb mode)
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__asm("bx %0\n" : : "r"(((int)&_osimage_entry) | 0x1));
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}
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}
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