mirror of
https://github.com/RfidResearchGroup/proxmark3.git
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49 lines
2.3 KiB
Verilog
49 lines
2.3 KiB
Verilog
// Defining commands, modes and options. This must be aligned to the definitions in fpgaloader.h
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// Note: the definitions here are without shifts
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// Commands:
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`define FPGA_CMD_SET_CONFREG 1
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`define FPGA_CMD_TRACE_ENABLE 2
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// Major modes:
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`define FPGA_MAJOR_MODE_HF_READER 0
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`define FPGA_MAJOR_MODE_HF_SIMULATOR 1
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`define FPGA_MAJOR_MODE_HF_ISO14443A 2
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`define FPGA_MAJOR_MODE_HF_SNIFF 3
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`define FPGA_MAJOR_MODE_HF_ISO18092 4
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`define FPGA_MAJOR_MODE_HF_GET_TRACE 5
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`define FPGA_MAJOR_MODE_OFF 7
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// Options for the generic HF reader
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`define FPGA_HF_READER_MODE_RECEIVE_IQ 0
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`define FPGA_HF_READER_MODE_RECEIVE_AMPLITUDE 1
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`define FPGA_HF_READER_MODE_RECEIVE_PHASE 2
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`define FPGA_HF_READER_MODE_SEND_FULL_MOD 3
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`define FPGA_HF_READER_MODE_SEND_SHALLOW_MOD 4
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`define FPGA_HF_READER_MODE_SNIFF_IQ 5
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`define FPGA_HF_READER_MODE_SNIFF_AMPLITUDE 6
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`define FPGA_HF_READER_MODE_SNIFF_PHASE 7
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`define FPGA_HF_READER_MODE_SEND_JAM 8
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`define FPGA_HF_READER_SUBCARRIER_848_KHZ 0
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`define FPGA_HF_READER_SUBCARRIER_424_KHZ 1
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`define FPGA_HF_READER_SUBCARRIER_212_KHZ 2
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// Options for the HF simulated tag, how to modulate
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`define FPGA_HF_SIMULATOR_NO_MODULATION 0
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`define FPGA_HF_SIMULATOR_MODULATE_BPSK 1
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`define FPGA_HF_SIMULATOR_MODULATE_212K 2
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`define FPGA_HF_SIMULATOR_MODULATE_424K 4
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`define FPGA_HF_SIMULATOR_MODULATE_424K_8BIT 5
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// Options for ISO14443A
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`define FPGA_HF_ISO14443A_SNIFFER 0
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`define FPGA_HF_ISO14443A_TAGSIM_LISTEN 1
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`define FPGA_HF_ISO14443A_TAGSIM_MOD 2
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`define FPGA_HF_ISO14443A_READER_LISTEN 3
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`define FPGA_HF_ISO14443A_READER_MOD 4
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//options for ISO18092 / Felica
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`define FPGA_HF_ISO18092_FLAG_NOMOD 1 // 0001 disable modulation module
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`define FPGA_HF_ISO18092_FLAG_424K 2 // 0010 should enable 414k mode (untested). No autodetect
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`define FPGA_HF_ISO18092_FLAG_READER 4 // 0100 enables antenna power, to act as a reader instead of tag
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