mirror of
https://github.com/RfidResearchGroup/proxmark3.git
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299 lines
8.8 KiB
C
299 lines
8.8 KiB
C
//-----------------------------------------------------------------------------
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// This code is licensed to you under the terms of the GNU GPL, version 2 or,
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// at your option, any later version. See the LICENSE.txt file for the text of
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// the license.
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//-----------------------------------------------------------------------------
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// LF ADC read/write implementation
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//-----------------------------------------------------------------------------
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#include "lfadc.h"
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#include "lfsampling.h"
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#include "fpgaloader.h"
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#include "ticks.h"
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// Sam7s has several timers, we will use the source TIMER_CLOCK1 (aka AT91C_TC_CLKS_TIMER_DIV1_CLOCK)
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// TIMER_CLOCK1 = MCK/2, MCK is running at 48 MHz, Timer is running at 48/2 = 24 MHz
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// Carrier periods (T0) have duration of 8 microseconds (us), which is 1/125000 per second
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// T0 = TIMER_CLOCK1 / 125000 = 192
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//#define T0 192
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// Sam7s has three counters, we will use the first TIMER_COUNTER_0 (aka TC0)
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// using TIMER_CLOCK3 (aka AT91C_TC_CLKS_TIMER_DIV3_CLOCK)
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// as a counting signal. TIMER_CLOCK3 = MCK/32, MCK is running at 48 MHz, so the timer is running at 48/32 = 1500 kHz
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// Carrier period (T0) have duration of 8 microseconds (us), which is 1/125000 per second (125 kHz frequency)
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// T0 = timer/carrier = 1500kHz/125kHz = 1500000/125000 = 6
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//#define HITAG_T0 3
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//////////////////////////////////////////////////////////////////////////////
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// Global variables
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//////////////////////////////////////////////////////////////////////////////
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bool rising_edge = false;
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bool logging = true;
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bool reader_mode = false;
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//////////////////////////////////////////////////////////////////////////////
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// Auxiliary functions
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//////////////////////////////////////////////////////////////////////////////
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bool lf_test_periods(size_t expected, size_t count) {
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// Compute 10% deviation (integer operation, so rounded down)
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size_t diviation = expected / 10;
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return ((count > (expected - diviation)) && (count < (expected + diviation)));
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}
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//////////////////////////////////////////////////////////////////////////////
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// Low frequency (LF) adc passthrough functionality
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//////////////////////////////////////////////////////////////////////////////
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uint8_t previous_adc_val = 0;
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size_t lf_count_edge_periods_ex(size_t max, bool wait, bool detect_gap) {
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size_t periods = 0;
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volatile uint8_t adc_val;
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//uint8_t avg_peak = 140, avg_through = 96;
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// 140 - 127 - 114
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uint8_t avg_peak = 140, avg_through = 106;
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int16_t checked = 0;
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while (!BUTTON_PRESS()) {
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// only every 100th times, in order to save time when collecting samples.
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if (checked == 1000) {
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if (data_available()) {
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break;
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} else {
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checked = 0;
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}
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}
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++checked;
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WDT_HIT();
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if (AT91C_BASE_SSC->SSC_SR & (AT91C_SSC_RXRDY)) {
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adc_val = AT91C_BASE_SSC->SSC_RHR;
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periods++;
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if (logging) logSampleSimple(adc_val);
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// Only test field changes if state of adc values matter
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if (wait == false) {
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// Test if we are locating a field modulation (100% ASK = complete field drop)
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if (detect_gap) {
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// Only return when the field completely dissapeared
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if (adc_val == 0) {
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return periods;
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}
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} else {
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// Trigger on a modulation swap by observing an edge change
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if (rising_edge) {
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if ((previous_adc_val > avg_peak) && (adc_val <= previous_adc_val)) {
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rising_edge = false;
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return periods;
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}
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} else {
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if ((previous_adc_val < avg_through) && (adc_val >= previous_adc_val)) {
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rising_edge = true;
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return periods;
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}
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}
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}
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}
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previous_adc_val = adc_val;
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if (periods >= max) return 0;
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}
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}
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if (logging) logSampleSimple(0xFF);
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return 0;
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}
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size_t lf_count_edge_periods(size_t max) {
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return lf_count_edge_periods_ex(max, false, false);
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}
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size_t lf_detect_gap(size_t max) {
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return lf_count_edge_periods_ex(max, false, true);
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}
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void lf_reset_counter() {
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// TODO: find out the correct reset settings for tag and reader mode
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if (reader_mode) {
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// Reset values for reader mode
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rising_edge = false;
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previous_adc_val = 0xFF;
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} else {
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// Reset values for tag/transponder mode
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rising_edge = false;
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previous_adc_val = 0xFF;
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}
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}
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bool lf_get_tag_modulation() {
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return (rising_edge == false);
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}
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bool lf_get_reader_modulation() {
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return rising_edge;
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}
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void lf_wait_periods(size_t periods) {
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lf_count_edge_periods_ex(periods, true, false);
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}
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void lf_init(bool reader, bool simulate) {
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StopTicks();
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reader_mode = reader;
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FpgaDownloadAndGo(FPGA_BITSTREAM_LF);
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FpgaSendCommand(FPGA_CMD_SET_DIVISOR, 95); //125Khz
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if (reader) {
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FpgaWriteConfWord(FPGA_MAJOR_MODE_LF_ADC | FPGA_LF_ADC_READER_FIELD);
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} else {
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if (simulate)
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// FpgaWriteConfWord(FPGA_MAJOR_MODE_LF_EDGE_DETECT);
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FpgaWriteConfWord(FPGA_MAJOR_MODE_LF_ADC);
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else
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FpgaWriteConfWord(FPGA_MAJOR_MODE_LF_ADC);
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}
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// Connect the A/D to the peak-detected low-frequency path.
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SetAdcMuxFor(GPIO_MUXSEL_LOPKD);
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// Now set up the SSC to get the ADC samples that are now streaming at us.
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FpgaSetupSsc();
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// When in reader mode, give the field a bit of time to settle.
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// 313T0 = 313 * 8us = 2504us = 2.5ms Hitag2 tags needs to be fully powered.
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if (reader) {
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// 50 ms
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SpinDelay(50);
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}
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// Steal this pin from the SSP (SPI communication channel with fpga) and use it to control the modulation
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AT91C_BASE_PIOA->PIO_PER = GPIO_SSC_DOUT;
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AT91C_BASE_PIOA->PIO_OER = GPIO_SSC_DOUT;
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LOW(GPIO_SSC_DOUT);
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// Enable peripheral Clock for TIMER_CLOCK 0
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AT91C_BASE_PMC->PMC_PCER = (1 << AT91C_ID_TC0);
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AT91C_BASE_TC0->TC_CCR = AT91C_TC_CLKDIS;
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AT91C_BASE_TC0->TC_CMR = AT91C_TC_CLKS_TIMER_DIV4_CLOCK;
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// Enable peripheral Clock for TIMER_CLOCK 1
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AT91C_BASE_PMC->PMC_PCER = (1 << AT91C_ID_TC1);
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AT91C_BASE_TC1->TC_CCR = AT91C_TC_CLKDIS;
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AT91C_BASE_TC1->TC_CMR = AT91C_TC_CLKS_TIMER_DIV4_CLOCK;
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// Clear all leds
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LEDsoff();
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// Reset and enable timers
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AT91C_BASE_TC0->TC_CCR = AT91C_TC_CLKEN | AT91C_TC_SWTRG;
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AT91C_BASE_TC1->TC_CCR = AT91C_TC_CLKEN | AT91C_TC_SWTRG;
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// Prepare data trace
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uint32_t bufsize = 20000;
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// use malloc
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if (logging) initSampleBufferEx(&bufsize, true);
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sample_config *sc = getSamplingConfig();
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sc->decimation = 1;
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sc->averaging = 0;
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}
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void lf_finalize() {
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// Disable timers
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AT91C_BASE_TC0->TC_CCR = AT91C_TC_CLKDIS;
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AT91C_BASE_TC1->TC_CCR = AT91C_TC_CLKDIS;
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// return stolen pin to SSP
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AT91C_BASE_PIOA->PIO_PDR = GPIO_SSC_DOUT;
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AT91C_BASE_PIOA->PIO_ASR = GPIO_SSC_DIN | GPIO_SSC_DOUT;
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FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF);
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LEDsoff();
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sample_config *sc = getSamplingConfig();
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sc->decimation = 1;
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sc->averaging = 0;
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StartTicks();
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}
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size_t lf_detect_field_drop(size_t max) {
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size_t periods = 0;
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volatile uint8_t adc_val;
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int16_t checked = 0;
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while (!BUTTON_PRESS()) {
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// only every 1000th times, in order to save time when collecting samples.
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if (checked == 1000) {
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if (data_available()) {
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checked = -1;
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break;
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} else {
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checked = 0;
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}
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}
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++checked;
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WDT_HIT();
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if (AT91C_BASE_SSC->SSC_SR & (AT91C_SSC_RXRDY)) {
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periods++;
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adc_val = AT91C_BASE_SSC->SSC_RHR;
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if (logging) logSampleSimple(adc_val);
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if (adc_val == 0) {
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rising_edge = false;
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return periods;
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}
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if (periods == max) return 0;
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}
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}
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return 0;
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}
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void lf_modulation(bool modulation) {
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if (modulation) {
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HIGH(GPIO_SSC_DOUT);
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} else {
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LOW(GPIO_SSC_DOUT);
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}
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}
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// simulation
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static void lf_manchester_send_bit(uint8_t bit) {
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lf_modulation(bit != 0);
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lf_wait_periods(16);
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lf_modulation(bit == 0);
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lf_wait_periods(16);
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}
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// simulation
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bool lf_manchester_send_bytes(const uint8_t *frame, size_t frame_len) {
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LED_B_ON();
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lf_manchester_send_bit(1);
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lf_manchester_send_bit(1);
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lf_manchester_send_bit(1);
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lf_manchester_send_bit(1);
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lf_manchester_send_bit(1);
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// Send the content of the frame
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for (size_t i = 0; i < frame_len; i++) {
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lf_manchester_send_bit((frame[i / 8] >> (7 - (i % 8))) & 1);
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}
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LED_B_OFF();
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return true;
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}
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