mirror of
https://github.com/RfidResearchGroup/proxmark3.git
synced 2024-12-28 03:14:53 +08:00
283 lines
No EOL
7.5 KiB
C
283 lines
No EOL
7.5 KiB
C
#include "usart.h"
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#include "apps.h"
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#define USART_INTERRUPT_LEVEL 7
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#define AT91_BAUD_RATE 115200
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volatile AT91PS_PDC pPDC = AT91C_BASE_PDC_US1;
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volatile AT91PS_USART pUS1 = AT91C_BASE_US1;
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volatile AT91PS_AIC pAIC = AT91C_BASE_AIC;
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volatile AT91PS_PIO pPIOA = AT91C_BASE_PIOA;
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#define usart_rx_ready {(pUS1->US_CSR & AT91C_US_RXRDY)}
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#define usart_tx_ready {(pUS1->US_CSR & AT91C_US_TXRDY)}
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void usart_close(void) {
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// Reset the USART mode
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pUS1->US_MR = 0;
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// Reset the baud rate divisor register
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pUS1->US_BRGR = 0;
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// Reset the Timeguard Register
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pUS1->US_TTGR = 0;
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// Disable all interrupts
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pUS1->US_IDR = 0xFFFFFFFF;
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//* Abort the Peripheral Data Transfers
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//AT91F_PDC_Close((AT91PS_PDC) &(pUSART->US_RPR));
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// Disable receiver and transmitter and stop any activity immediately
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pUS1->US_CR = AT91C_US_TXDIS | AT91C_US_RXDIS | AT91C_US_RSTTX | AT91C_US_RSTRX;
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}
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/// Reads data from an USART peripheral, filling the provided buffer until it
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/// becomes full. This function returns immediately with 1 if the buffer has
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/// been queued for transmission; otherwise 0.
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/// \param data Pointer to the buffer where the received data will be stored.
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/// \param len Size of the data buffer (in bytes).
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uint8_t usart_readbuffer(uint8_t *data, size_t len) {
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// Check if the first PDC bank is free
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if ((pUS1->US_RCR == 0) && (pUS1->US_RNCR == 0)) {
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pUS1->US_RPR = (uint32_t)data;
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pUS1->US_RCR = len;
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pUS1->US_PTCR = AT91C_PDC_RXTEN;
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return 1;
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}
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// Check if the second PDC bank is free
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else if (pUS1->US_RNCR == 0) {
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pUS1->US_RNPR = (uint32_t)data;
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pUS1->US_RNCR = len;
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return 1;
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} else {
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return 0;
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}
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}
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/// Reads and return a packet of data on the specified USART peripheral. This
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/// function operates asynchronously, so it waits until some data has been
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/// received.
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/// \param timeout Time out value (0 -> no timeout).
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uint8_t usart_read(uint32_t timeout) {
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if (timeout == 0) {
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while ((pUS1->US_CSR & AT91C_US_RXRDY) == 0) {};
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}
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else {
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while ((pUS1->US_CSR & AT91C_US_RXRDY) == 0) {
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if (timeout == 0) {
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DbpString("USART_Read: Timed out.");
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return 0;
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}
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timeout--;
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}
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}
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uint8_t res = pUS1->US_RHR;
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Dbprintf(" usar got %02x", res);
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return res;
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}
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/// Sends one packet of data through the specified USART peripheral. This
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/// function operates synchronously, so it only returns when the data has been
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/// actually sent.
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/// \param data Data to send including 9nth bit and sync field if necessary (in
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/// the same format as the US_THR register in the datasheet).
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/// \param timeOut Time out value (0 = no timeout).
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void usart_write( uint8_t data, uint32_t timeout) {
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if ( timeout == 0) {
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while ((pUS1->US_CSR & AT91C_US_TXEMPTY) == 0) {};
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} else {
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while ((pUS1->US_CSR & AT91C_US_TXEMPTY) == 0) {
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if (timeout == 0) {
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DbpString("USART_Write: Timed out.");
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return;
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}
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timeout--;
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}
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}
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pUS1->US_THR = data;
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}
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uint8_t usart_writebuffer(uint8_t *data, size_t len, uint32_t timeout) {
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// Check if the first PDC bank is free
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if ((pUS1->US_TCR == 0) && (pUS1->US_TNCR == 0)) {
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pUS1->US_TPR = (uint32_t)data;
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pUS1->US_TCR = len;
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pUS1->US_PTCR = AT91C_PDC_TXTEN;
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return 1;
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}
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// Check if the second PDC bank is free
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else if (pUS1->US_TNCR == 0) {
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pUS1->US_TNPR = (uint32_t)data;
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pUS1->US_TNCR = len;
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return 1;
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}
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else {
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return 0;
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}
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}
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// interupt version
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void Usart_c_irq_handler(void) {
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// get Usart status register
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uint32_t status = pUS1->US_CSR;
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if ( status & AT91C_US_RXRDY){
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// Get byte and send
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pUS1->US_THR = (pUS1->US_RHR & 0x1FF);
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LED_B_INV();
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}
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// tx
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if ( status & AT91C_US_TXRDY){
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LED_D_INV();
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}
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if ( status & AT91C_US_OVRE) {
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// clear US_RXRDY
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(void)(pUS1->US_RHR & 0x1FF);
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pUS1->US_THR = ('O' & 0x1FF);
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}
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// Check error
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if ( status & AT91C_US_PARE) {
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pUS1->US_THR = ('P' & 0x1FF);
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}
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if ( status & AT91C_US_FRAME) {
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pUS1->US_THR = ('F' & 0x1FF);
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}
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if ( status & AT91C_US_TIMEOUT){
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pUS1->US_CR = AT91C_US_STTTO;
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pUS1->US_THR = ('T' & 0x1FF);
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}
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// Reset the status bit
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pUS1->US_CR = AT91C_US_RSTSTA;
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}
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__inline unsigned int AT91F_AIC_ConfigureIt (
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AT91PS_AIC pAIC, // \arg pointer to the AIC registers
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unsigned int irq_id, // \arg interrupt number to initialize
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unsigned int priority, // \arg priority to give to the interrupt
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unsigned int src_type, // \arg activation and sense of activation
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void (*newHandler) (void) ) // \arg address of the interrupt handler
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{
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unsigned int oldHandler;
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unsigned int mask;
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oldHandler = pAIC->AIC_SVR[irq_id];
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mask = (0x1 << irq_id);
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// Disable the interrupt on the interrupt controller
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pAIC->AIC_IDCR = mask;
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// Save the interrupt handler routine pointer and the interrupt priority
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pAIC->AIC_SVR[irq_id] = (unsigned int) newHandler;
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// Store the Source Mode Register
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pAIC->AIC_SMR[irq_id] = (src_type | priority);
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// Clear the interrupt on the interrupt controller
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pAIC->AIC_ICCR = mask;
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return oldHandler;
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}
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void usart_init(void) {
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// disable & reset receiver / transmitter
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pUS1->US_CR = AT91C_US_RSTRX | AT91C_US_RSTTX | AT91C_US_RXDIS | AT91C_US_TXDIS;
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//enable the USART 1 Peripheral clock
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AT91C_BASE_PMC->PMC_PCER = (1 << AT91C_ID_US1);
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// Configure PIO controllers to peripheral mode A
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pPIOA->PIO_ASR = (AT91C_PA21_RXD1 | AT91C_PA22_TXD1);
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// Disable PIO control of the following pins, allows use by the SPI peripheral
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pPIOA->PIO_PDR = (AT91C_PA21_RXD1 | AT91C_PA22_TXD1);
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// kill pull-ups
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// pPIOA->PIO_PPUDR = ~(AT91C_PA21_RXD1 | AT91C_PA22_TXD1);
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// pPIOA->PIO_MDDR = (AT91C_PA21_RXD1 | AT91C_PA22_TXD1);
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// Pull-up Enable
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pPIOA->PIO_PPUER |= (AT91C_PA21_RXD1 | AT91C_PA22_TXD1);
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// MultiDriver Enable
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//pPIOA->PIO_MDER |= (AT91C_PA21_RXD1 | AT91C_PA22_TXD1);
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// Enable the pins to be controlled
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pPIOA->PIO_PER |= (AT91C_PA21_RXD1 | AT91C_PA22_TXD1);
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// Configure the pins to be outputs
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pPIOA->PIO_OER |= AT91C_PA22_TXD1;
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//enable PIO in input mode
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//pPIOA->PIO_ODR = AT91C_PA21_RXD1;
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// set mode
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pUS1->US_MR = AT91C_US_USMODE_NORMAL | // normal mode
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AT91C_US_CLKS_CLOCK | // MCK
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AT91C_US_CHRL_8_BITS | // 8 bits
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AT91C_US_PAR_NONE | // parity: none
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AT91C_US_NBSTOP_1_BIT | // 1 stop bit
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AT91C_US_CHMODE_NORMAL; // channel mode: normal
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// baud rate
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// CD = MCK / (16 * baud)
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// MCK = 24027428 (pm3 runs on 24MHZ clock PMC_PCKR[0] )
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// baudrate 115200
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// 16*115200 = 1843200
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// 24027428 / 1843200 == 13 --< CD
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// baudrate 460800
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// 16*460800 = 7372800
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// 24027428 / 7372800 == 3
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pUS1->US_BRGR = 24*1024*1024/(115200*16); // OVER=0 16
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// Write the Timeguard Register
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pUS1->US_TTGR = 0;
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pUS1->US_RTOR = 0;
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pUS1->US_FIDI = 0;
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pUS1->US_IF = 0;
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// Enable USART IT error and RXRDY
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// Write to the IER register
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// pUS1->US_IER = (AT91C_US_TIMEOUT | AT91C_US_FRAME | AT91C_US_OVRE | AT91C_US_RXRDY);
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// open Usart 1 interrupt
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/*
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AT91F_AIC_ConfigureIt(
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pAIC,
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AT91C_ID_US1,
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USART_INTERRUPT_LEVEL,
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AT91C_AIC_SRCTYPE_INT_HIGH_LEVEL,
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Usart_c_irq_handler
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);
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*/
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// enable interupt
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// pAIC->AIC_IECR = (1 << AT91C_ID_US1);
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// trigger interrup software
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// pAIC->AIC_ISCR = (1 << AT91C_ID_US1) ;
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// enable RX + TX
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pUS1->US_CR = AT91C_US_RXEN | AT91C_US_TXEN;
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} |