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//-----------------------------------------------------------------------------
// Jonathan Westhues, Mar 2006
// Edits by Gerhard de Koning Gans, Sep 2007 (##)
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//
// This code is licensed to you under the terms of the GNU GPL, version 2 or,
// at your option, any later version. See the LICENSE.txt file for the text of
// the license.
//-----------------------------------------------------------------------------
// The main application code. This is the first thing called after start.c
// executes.
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//-----------------------------------------------------------------------------
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# include "appmain.h"
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# include "clocks.h"
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# include "usb_cdc.h"
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# include "proxmark3_arm.h"
# include "dbprint.h"
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# include "pmflash.h"
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# include "fpga.h"
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# include "fpga.h"
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# include "fpgaloader.h"
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# include "string.h"
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# include "legicrf.h"
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# include "BigBuf.h"
# include "iso14443a.h"
# include "iso14443b.h"
# include "iso15693.h"
# include "thinfilm.h"
# include "felica.h"
# include "hitag2.h"
# include "hitagS.h"
# include "iclass.h"
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# include "legicrfsim.h"
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# include "epa.h"
# include "hfsnoop.h"
# include "lfops.h"
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# include "lfsampling.h"
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# include "mifarecmd.h"
# include "mifaredesfire.h"
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# include "mifaresim.h"
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# include "pcf7931.h"
# include "Standalone/standalone.h"
# include "util.h"
# include "ticks.h"
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# include "commonutil.h"
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# ifdef WITH_LCD
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# include "LCD.h"
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# endif
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# ifdef WITH_SMARTCARD
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# include "i2c.h"
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# endif
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# ifdef WITH_FPC_USART
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# include "usart.h"
# endif
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# ifdef WITH_FLASH
# include "flashmem.h"
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# include "spiffs.h"
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# endif
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//=============================================================================
// A buffer where we can queue things up to be sent through the FPGA, for
// any purpose (fake tag, as reader, whatever). We go MSB first, since that
// is the order in which they go out on the wire.
//=============================================================================
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# define TOSEND_BUFFER_SIZE (9*MAX_FRAME_SIZE + 1 + 1 + 2) // 8 data bits and 1 parity bit per payload byte, 1 correction bit, 1 SOC bit, 2 EOC bits
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uint8_t ToSend [ TOSEND_BUFFER_SIZE ] ;
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int ToSendMax = - 1 ;
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static int ToSendBit ;
struct common_area common_area __attribute__ ( ( section ( " .commonarea " ) ) ) ;
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int button_status = BUTTON_NO_CLICK ;
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bool allow_send_wtx = false ;
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inline void send_wtx ( uint16_t wtx ) {
if ( allow_send_wtx ) {
reply_ng ( CMD_WTX , PM3_SUCCESS , ( uint8_t * ) & wtx , sizeof ( wtx ) ) ;
}
}
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void ToSendReset ( void ) {
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ToSendMax = - 1 ;
ToSendBit = 8 ;
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}
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void ToSendStuffBit ( int b ) {
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if ( ToSendBit > = 8 ) {
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ToSendMax + + ;
ToSend [ ToSendMax ] = 0 ;
ToSendBit = 0 ;
}
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if ( b )
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ToSend [ ToSendMax ] | = ( 1 < < ( 7 - ToSendBit ) ) ;
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ToSendBit + + ;
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if ( ToSendMax > = sizeof ( ToSend ) ) {
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ToSendBit = 0 ;
DbpString ( " ToSendStuffBit overflowed! " ) ;
}
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}
//-----------------------------------------------------------------------------
// Read an ADC channel and block till it completes, then return the result
// in ADC units (0 to 1023). Also a routine to average 32 samples and
// return that.
//-----------------------------------------------------------------------------
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static uint16_t ReadAdc ( int ch ) {
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// Note: ADC_MODE_PRESCALE and ADC_MODE_SAMPLE_HOLD_TIME are set to the maximum allowed value.
// AMPL_HI is are high impedance (10MOhm || 1MOhm) output, the input capacitance of the ADC is 12pF (typical). This results in a time constant
// of RC = (0.91MOhm) * 12pF = 10.9us. Even after the maximum configurable sample&hold time of 40us the input capacitor will not be fully charged.
//
// The maths are:
// If there is a voltage v_in at the input, the voltage v_cap at the capacitor (this is what we are measuring) will be
//
// v_cap = v_in * (1 - exp(-SHTIM/RC)) = v_in * (1 - exp(-40us/10.9us)) = v_in * 0,97 (i.e. an error of 3%)
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AT91C_BASE_ADC - > ADC_CR = AT91C_ADC_SWRST ;
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AT91C_BASE_ADC - > ADC_MR =
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ADC_MODE_PRESCALE ( 63 ) // ADC_CLK = MCK / ((63+1) * 2) = 48MHz / 128 = 375kHz
| ADC_MODE_STARTUP_TIME ( 1 ) // Startup Time = (1+1) * 8 / ADC_CLK = 16 / 375kHz = 42,7us Note: must be > 20us
| ADC_MODE_SAMPLE_HOLD_TIME ( 15 ) ; // Sample & Hold Time SHTIM = 15 / ADC_CLK = 15 / 375kHz = 40us
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AT91C_BASE_ADC - > ADC_CHER = ADC_CHANNEL ( ch ) ;
AT91C_BASE_ADC - > ADC_CR = AT91C_ADC_START ;
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while ( ! ( AT91C_BASE_ADC - > ADC_SR & ADC_END_OF_CONVERSION ( ch ) ) ) { } ;
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return ( AT91C_BASE_ADC - > ADC_CDR [ ch ] & 0x3FF ) ;
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}
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// was static - merlok
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uint16_t AvgAdc ( int ch ) {
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uint16_t a = 0 ;
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for ( uint8_t i = 0 ; i < 32 ; i + + )
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a + = ReadAdc ( ch ) ;
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//division by 32
return ( a + 15 ) > > 5 ;
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}
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void MeasureAntennaTuning ( void ) {
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uint32_t peak = 0 ;
// in mVolt
struct p {
uint32_t v_lf134 ;
uint32_t v_lf125 ;
uint32_t v_lfconf ;
uint32_t v_hf ;
uint32_t peak_v ;
uint32_t peak_f ;
int divisor ;
uint8_t results [ 256 ] ;
} PACKED payload ;
memset ( payload . results , 0 , sizeof ( payload . results ) ) ;
sample_config * sc = getSamplingConfig ( ) ;
payload . divisor = sc - > divisor ;
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LED_B_ON ( ) ;
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/*
* Sweeps the useful LF range of the proxmark from
* 46.8 kHz ( divisor = 255 ) to 600 kHz ( divisor = 19 ) and
* read the voltage in the antenna , the result left
* in the buffer is a graph which should clearly show
* the resonating frequency of your LF antenna
* ( hopefully around 95 if it is tuned to 125 kHz ! )
*/
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FpgaDownloadAndGo ( FPGA_BITSTREAM_LF ) ;
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FpgaWriteConfWord ( FPGA_MAJOR_MODE_LF_READER | FPGA_LF_ADC_READER_FIELD ) ;
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SpinDelay ( 50 ) ;
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for ( uint8_t i = 255 ; i > = 19 ; i - - ) {
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WDT_HIT ( ) ;
FpgaSendCommand ( FPGA_CMD_SET_DIVISOR , i ) ;
SpinDelay ( 20 ) ;
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uint32_t adcval = ( ( MAX_ADC_LF_VOLTAGE * AvgAdc ( ADC_CHAN_LF ) ) > > 10 ) ;
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if ( i = = LF_DIVISOR_125 )
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payload . v_lf125 = adcval ; // voltage at 125kHz
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if ( i = = LF_DIVISOR_134 )
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payload . v_lf134 = adcval ; // voltage at 134kHz
if ( i = = sc - > divisor )
payload . v_lfconf = adcval ; // voltage at `lf config q`
payload . results [ i ] = adcval > > 9 ; // scale int to fit in byte for graphing purposes
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if ( payload . results [ i ] > peak ) {
payload . peak_v = adcval ;
payload . peak_f = i ;
peak = payload . results [ i ] ;
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}
}
LED_A_ON ( ) ;
// Let the FPGA drive the high-frequency antenna around 13.56 MHz.
FpgaDownloadAndGo ( FPGA_BITSTREAM_HF ) ;
FpgaWriteConfWord ( FPGA_MAJOR_MODE_HF_READER_RX_XCORR ) ;
SpinDelay ( 50 ) ;
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# if defined RDV4
payload . v_hf = ( MAX_ADC_HF_VOLTAGE_RDV40 * AvgAdc ( ADC_CHAN_HF_RDV40 ) ) > > 10 ;
# else
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payload . v_hf = ( MAX_ADC_HF_VOLTAGE * AvgAdc ( ADC_CHAN_HF ) ) > > 10 ;
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# endif
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FpgaWriteConfWord ( FPGA_MAJOR_MODE_OFF ) ;
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reply_ng ( CMD_MEASURE_ANTENNA_TUNING , PM3_SUCCESS , ( uint8_t * ) & payload , sizeof ( payload ) ) ;
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LEDsoff ( ) ;
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}
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// Measure HF in milliVolt
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uint16_t MeasureAntennaTuningHfData ( void ) {
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# if defined RDV4
return ( MAX_ADC_HF_VOLTAGE_RDV40 * AvgAdc ( ADC_CHAN_HF_RDV40 ) ) > > 10 ;
# else
return ( MAX_ADC_HF_VOLTAGE * AvgAdc ( ADC_CHAN_HF ) ) > > 10 ;
# endif
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}
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// Measure LF in milliVolt
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uint32_t MeasureAntennaTuningLfData ( void ) {
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return ( MAX_ADC_LF_VOLTAGE * AvgAdc ( ADC_CHAN_LF ) ) > > 10 ;
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}
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void ReadMem ( int addr ) {
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const uint8_t * data = ( ( uint8_t * ) addr ) ;
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Dbprintf ( " %x: %02x %02x %02x %02x %02x %02x %02x %02x " , addr , data [ 0 ] , data [ 1 ] , data [ 2 ] , data [ 3 ] , data [ 4 ] , data [ 5 ] , data [ 6 ] , data [ 7 ] ) ;
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}
/* osimage version information is linked in */
extern struct version_information version_information ;
/* bootrom version information is pointed to from _bootphase1_version_pointer */
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extern char * _bootphase1_version_pointer , _flash_start , _flash_end , __data_src_start__ ;
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void SendVersion ( void ) {
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char temp [ PM3_CMD_DATA_SIZE - 12 ] ; /* Limited data payload in USB packets */
char VersionString [ PM3_CMD_DATA_SIZE - 12 ] = { ' \0 ' } ;
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/* Try to find the bootrom version information. Expect to find a pointer at
* symbol _bootphase1_version_pointer , perform slight sanity checks on the
* pointer , then use it .
*/
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char * bootrom_version = * ( char * * ) & _bootphase1_version_pointer ;
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strncat ( VersionString , " [ ARM ] \n " , sizeof ( VersionString ) - strlen ( VersionString ) - 1 ) ;
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if ( bootrom_version < & _flash_start | | bootrom_version > = & _flash_end ) {
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strcat ( VersionString , " bootrom version information appears invalid \n " ) ;
} else {
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FormatVersionInformation ( temp , sizeof ( temp ) , " bootrom: " , bootrom_version ) ;
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strncat ( VersionString , temp , sizeof ( VersionString ) - strlen ( VersionString ) - 1 ) ;
}
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FormatVersionInformation ( temp , sizeof ( temp ) , " os: " , & version_information ) ;
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strncat ( VersionString , temp , sizeof ( VersionString ) - strlen ( VersionString ) - 1 ) ;
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# if defined(__clang__)
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strncat ( VersionString , " compiled with Clang/LLVM " __VERSION__ " \n " , sizeof ( VersionString ) - strlen ( VersionString ) - 1 ) ;
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# elif defined(__GNUC__) || defined(__GNUG__)
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strncat ( VersionString , " compiled with GCC " __VERSION__ " \n " , sizeof ( VersionString ) - strlen ( VersionString ) - 1 ) ;
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# endif
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strncat ( VersionString , " \n [ FPGA ] \n " , sizeof ( VersionString ) - strlen ( VersionString ) - 1 ) ;
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for ( int i = 0 ; i < fpga_bitstream_num ; i + + ) {
strncat ( VersionString , fpga_version_information [ i ] , sizeof ( VersionString ) - strlen ( VersionString ) - 1 ) ;
if ( i < fpga_bitstream_num - 1 ) {
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strncat ( VersionString , " \n " , sizeof ( VersionString ) - strlen ( VersionString ) - 1 ) ;
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}
}
// Send Chip ID and used flash memory
uint32_t text_and_rodata_section_size = ( uint32_t ) & __data_src_start__ - ( uint32_t ) & _flash_start ;
uint32_t compressed_data_section_size = common_area . arg1 ;
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struct p {
uint32_t id ;
uint32_t section_size ;
uint32_t versionstr_len ;
char versionstr [ PM3_CMD_DATA_SIZE - 12 ] ;
} PACKED ;
struct p payload ;
payload . id = * ( AT91C_DBGU_CIDR ) ;
payload . section_size = text_and_rodata_section_size + compressed_data_section_size ;
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payload . versionstr_len = strlen ( VersionString ) + 1 ;
memcpy ( payload . versionstr , VersionString , payload . versionstr_len ) ;
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reply_ng ( CMD_VERSION , PM3_SUCCESS , ( uint8_t * ) & payload , 12 + payload . versionstr_len ) ;
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}
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void TimingIntervalAcquisition ( void ) {
// trigger new acquisition by turning main oscillator off and on
mck_from_pll_to_slck ( ) ;
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mck_from_slck_to_pll ( ) ;
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// wait for MCFR and recompute RTMR scaler
StartTickCount ( ) ;
}
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// measure the Connection Speed by sending SpeedTestBufferSize bytes to client and measuring the elapsed time.
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// Note: this mimics GetFromBigbuf(), i.e. we have the overhead of the PacketCommandNG structure included.
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void printConnSpeed ( void ) {
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DbpString ( _BLUE_ ( " Transfer Speed " ) ) ;
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Dbprintf ( " Sending packets to client... " ) ;
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# define CONN_SPEED_TEST_MIN_TIME 500 // in milliseconds
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uint8_t * test_data = BigBuf_get_addr ( ) ;
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uint32_t start_time = GetTickCount ( ) ;
uint32_t delta_time = 0 ;
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uint32_t bytes_transferred = 0 ;
LED_B_ON ( ) ;
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while ( delta_time < CONN_SPEED_TEST_MIN_TIME ) {
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reply_ng ( CMD_DOWNLOADED_BIGBUF , PM3_SUCCESS , test_data , PM3_CMD_DATA_SIZE ) ;
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bytes_transferred + = PM3_CMD_DATA_SIZE ;
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delta_time = GetTickCountDelta ( start_time ) ;
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}
LED_B_OFF ( ) ;
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Dbprintf ( " Time elapsed............%dms " , delta_time ) ;
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Dbprintf ( " Bytes transferred.......%d " , bytes_transferred ) ;
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Dbprintf ( " Transfer Speed PM3 -> Client = " _YELLOW_ ( " %d " ) " bytes/s " , 1000 * bytes_transferred / delta_time ) ;
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}
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/**
* Prints runtime information about the PM3 .
* */
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void SendStatus ( void ) {
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BigBuf_print_status ( ) ;
Fpga_print_status ( ) ;
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# ifdef WITH_FLASH
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Flashmem_print_status ( ) ;
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# endif
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# ifdef WITH_SMARTCARD
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I2C_print_status ( ) ;
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# endif
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# ifdef WITH_LF
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printConfig ( ) ; // LF Sampling config
printT55xxConfig ( ) ; // LF T55XX Config
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# endif
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printConnSpeed ( ) ;
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DbpString ( _BLUE_ ( " Various " ) ) ;
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Dbprintf ( " DBGLEVEL................%d " , DBGLEVEL ) ;
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Dbprintf ( " ToSendMax...............%d " , ToSendMax ) ;
Dbprintf ( " ToSendBit...............%d " , ToSendBit ) ;
Dbprintf ( " ToSend BUFFERSIZE.......%d " , TOSEND_BUFFER_SIZE ) ;
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while ( ( AT91C_BASE_PMC - > PMC_MCFR & AT91C_CKGR_MAINRDY ) = = 0 ) ; // Wait for MAINF value to become available...
uint16_t mainf = AT91C_BASE_PMC - > PMC_MCFR & AT91C_CKGR_MAINF ; // Get # main clocks within 16 slow clocks
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Dbprintf ( " Slow clock..............%d Hz " , ( 16 * MAINCK ) / mainf ) ;
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uint32_t delta_time = 0 ;
uint32_t start_time = GetTickCount ( ) ;
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# define SLCK_CHECK_MS 50
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SpinDelay ( SLCK_CHECK_MS ) ;
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delta_time = GetTickCountDelta ( start_time ) ;
if ( ( delta_time < SLCK_CHECK_MS - 1 ) | | ( delta_time > SLCK_CHECK_MS + 1 ) ) {
// error > 2% with SLCK_CHECK_MS=50
Dbprintf ( _RED_ ( " Slow Clock speed change detected, TIA needed " ) ) ;
Dbprintf ( _YELLOW_ ( " Slow Clock actual speed seems closer to %d kHz " ) ,
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( 16 * MAINCK / 1000 ) / mainf * delta_time / SLCK_CHECK_MS ) ;
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}
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DbpString ( _BLUE_ ( " Installed StandAlone Mode " ) ) ;
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ModInfo ( ) ;
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# ifdef WITH_FLASH
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Flashmem_print_info ( ) ;
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# endif
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reply_ng ( CMD_STATUS , PM3_SUCCESS , NULL , 0 ) ;
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}
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void SendCapabilities ( void ) {
capabilities_t capabilities ;
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capabilities . version = CAPABILITIES_VERSION ;
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capabilities . via_fpc = reply_via_fpc ;
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capabilities . via_usb = reply_via_usb ;
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capabilities . baudrate = 0 ; // no real baudrate for USB-CDC
# ifdef WITH_FPC_USART
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if ( reply_via_fpc )
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capabilities . baudrate = usart_baudrate ;
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# endif
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# ifdef WITH_FLASH
capabilities . compiled_with_flash = true ;
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capabilities . hw_available_flash = FlashInit ( ) ;
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# else
capabilities . compiled_with_flash = false ;
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capabilities . hw_available_flash = false ;
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# endif
# ifdef WITH_SMARTCARD
capabilities . compiled_with_smartcard = true ;
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uint8_t maj , min ;
capabilities . hw_available_smartcard = I2C_get_version ( & maj , & min ) = = PM3_SUCCESS ;
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# else
capabilities . compiled_with_smartcard = false ;
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capabilities . hw_available_smartcard = false ;
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# endif
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# ifdef WITH_FPC_USART
capabilities . compiled_with_fpc_usart = true ;
# else
capabilities . compiled_with_fpc_usart = false ;
# endif
# ifdef WITH_FPC_USART_DEV
capabilities . compiled_with_fpc_usart_dev = true ;
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# else
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capabilities . compiled_with_fpc_usart_dev = false ;
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# endif
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# ifdef WITH_FPC_USART_HOST
capabilities . compiled_with_fpc_usart_host = true ;
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# else
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capabilities . compiled_with_fpc_usart_host = false ;
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# endif
# ifdef WITH_LF
capabilities . compiled_with_lf = true ;
# else
capabilities . compiled_with_lf = false ;
# endif
# ifdef WITH_HITAG
capabilities . compiled_with_hitag = true ;
# else
capabilities . compiled_with_hitag = false ;
# endif
# ifdef WITH_HFSNIFF
capabilities . compiled_with_hfsniff = true ;
# else
capabilities . compiled_with_hfsniff = false ;
# endif
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# ifdef WITH_HFPLOT
capabilities . compiled_with_hfplot = true ;
# else
capabilities . compiled_with_hfplot = false ;
# endif
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# ifdef WITH_ISO14443a
capabilities . compiled_with_iso14443a = true ;
# else
capabilities . compiled_with_iso14443a = false ;
# endif
# ifdef WITH_ISO14443b
capabilities . compiled_with_iso14443b = true ;
# else
capabilities . compiled_with_iso14443b = false ;
# endif
# ifdef WITH_ISO15693
capabilities . compiled_with_iso15693 = true ;
# else
capabilities . compiled_with_iso15693 = false ;
# endif
# ifdef WITH_FELICA
capabilities . compiled_with_felica = true ;
# else
capabilities . compiled_with_felica = false ;
# endif
# ifdef WITH_LEGICRF
capabilities . compiled_with_legicrf = true ;
# else
capabilities . compiled_with_legicrf = false ;
# endif
# ifdef WITH_ICLASS
capabilities . compiled_with_iclass = true ;
# else
capabilities . compiled_with_iclass = false ;
# endif
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# ifdef WITH_NFCBARCODE
capabilities . compiled_with_nfcbarcode = true ;
# else
capabilities . compiled_with_nfcbarcode = false ;
# endif
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# ifdef WITH_LCD
capabilities . compiled_with_lcd = true ;
# else
capabilities . compiled_with_lcd = false ;
# endif
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reply_ng ( CMD_CAPABILITIES , PM3_SUCCESS , ( uint8_t * ) & capabilities , sizeof ( capabilities ) ) ;
}
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// Show some leds in a pattern to identify StandAlone mod is running
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void StandAloneMode ( void ) {
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DbpString ( " Stand-alone mode, no computer necessary " ) ;
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SpinDown ( 50 ) ;
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SpinDelay ( 50 ) ;
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SpinUp ( 50 ) ;
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SpinDelay ( 50 ) ;
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SpinDown ( 50 ) ;
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}
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/*
OBJECTIVE
Listen and detect an external reader . Determine the best location
for the antenna .
INSTRUCTIONS :
Inside the ListenReaderField ( ) function , there is two mode .
By default , when you call the function , you will enter mode 1.
If you press the PM3 button one time , you will enter mode 2.
If you press the PM3 button a second time , you will exit the function .
DESCRIPTION OF MODE 1 :
This mode just listens for an external reader field and lights up green
for HF and / or red for LF . This is the original mode of the detectreader
function .
DESCRIPTION OF MODE 2 :
This mode will visually represent , using the LEDs , the actual strength of the
current compared to the maximum current detected . Basically , once you know
what kind of external reader is present , it will help you spot the best location to place
your antenna . You will probably not get some good results if there is a LF and a HF reader
at the same place ! : - )
*/
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# define LIGHT_LEVELS 20
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void ListenReaderField ( uint8_t limit ) {
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# define LF_ONLY 1
# define HF_ONLY 2
# define REPORT_CHANGE 10 // report new values only if they have changed at least by REPORT_CHANGE
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uint16_t lf_av = 0 , lf_av_new , lf_baseline = 0 , lf_max = 0 ;
uint16_t hf_av = 0 , hf_av_new , hf_baseline = 0 , hf_max = 0 ;
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uint16_t mode = 1 , display_val , display_max ;
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// switch off FPGA - we don't want to measure our own signal
// 20180315 - iceman, why load this before and then turn off?
FpgaDownloadAndGo ( FPGA_BITSTREAM_HF ) ;
FpgaWriteConfWord ( FPGA_MAJOR_MODE_OFF ) ;
LEDsoff ( ) ;
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if ( limit = = LF_ONLY ) {
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lf_av = lf_max = AvgAdc ( ADC_CHAN_LF ) ;
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Dbprintf ( " LF 125/134kHz Baseline: %dmV " , ( MAX_ADC_LF_VOLTAGE * lf_av ) > > 10 ) ;
lf_baseline = lf_av ;
}
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if ( limit = = HF_ONLY ) {
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# if defined RDV4
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// iceman, useless, since we are measuring readerfield, not our field. My tests shows a max of 20v from a reader.
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hf_av = hf_max = AvgAdc ( ADC_CHAN_HF_RDV40 ) ;
# else
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hf_av = hf_max = AvgAdc ( ADC_CHAN_HF ) ;
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# endif
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Dbprintf ( " HF 13.56MHz Baseline: %dmV " , ( MAX_ADC_HF_VOLTAGE * hf_av ) > > 10 ) ;
hf_baseline = hf_av ;
}
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for ( ; ; ) {
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// Switch modes with button
if ( BUTTON_PRESS ( ) ) {
SpinDelay ( 500 ) ;
switch ( mode ) {
case 1 :
mode = 2 ;
DbpString ( " Signal Strength Mode " ) ;
break ;
case 2 :
default :
DbpString ( " Stopped " ) ;
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FpgaWriteConfWord ( FPGA_MAJOR_MODE_OFF ) ;
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LEDsoff ( ) ;
return ;
}
}
WDT_HIT ( ) ;
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if ( limit = = LF_ONLY ) {
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if ( mode = = 1 ) {
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if ( ABS ( lf_av - lf_baseline ) > REPORT_CHANGE )
LED_D_ON ( ) ;
else
LED_D_OFF ( ) ;
}
lf_av_new = AvgAdc ( ADC_CHAN_LF ) ;
// see if there's a significant change
if ( ABS ( lf_av - lf_av_new ) > REPORT_CHANGE ) {
Dbprintf ( " LF 125/134kHz Field Change: %5dmV " , ( MAX_ADC_LF_VOLTAGE * lf_av_new ) > > 10 ) ;
lf_av = lf_av_new ;
if ( lf_av > lf_max )
lf_max = lf_av ;
}
}
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if ( limit = = HF_ONLY ) {
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if ( mode = = 1 ) {
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if ( ABS ( hf_av - hf_baseline ) > REPORT_CHANGE )
LED_B_ON ( ) ;
else
LED_B_OFF ( ) ;
}
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# if defined RDV4
hf_av_new = AvgAdc ( ADC_CHAN_HF_RDV40 ) ;
# else
hf_av_new = AvgAdc ( ADC_CHAN_HF ) ;
# endif
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// see if there's a significant change
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if ( ABS ( hf_av - hf_av_new ) > REPORT_CHANGE ) {
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Dbprintf ( " HF 13.56MHz Field Change: %5dmV " , ( MAX_ADC_HF_VOLTAGE * hf_av_new ) > > 10 ) ;
hf_av = hf_av_new ;
if ( hf_av > hf_max )
hf_max = hf_av ;
}
}
if ( mode = = 2 ) {
if ( limit = = LF_ONLY ) {
display_val = lf_av ;
display_max = lf_max ;
} else if ( limit = = HF_ONLY ) {
display_val = hf_av ;
display_max = hf_max ;
} else { /* Pick one at random */
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if ( ( hf_max - hf_baseline ) > ( lf_max - lf_baseline ) ) {
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display_val = hf_av ;
display_max = hf_max ;
} else {
display_val = lf_av ;
display_max = lf_max ;
}
}
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display_val = display_val * ( 4 * LIGHT_LEVELS ) / MAX ( 1 , display_max ) ;
uint32_t duty_a = MIN ( MAX ( display_val , 0 * LIGHT_LEVELS ) , 1 * LIGHT_LEVELS ) - 0 * LIGHT_LEVELS ;
uint32_t duty_b = MIN ( MAX ( display_val , 1 * LIGHT_LEVELS ) , 2 * LIGHT_LEVELS ) - 1 * LIGHT_LEVELS ;
uint32_t duty_c = MIN ( MAX ( display_val , 2 * LIGHT_LEVELS ) , 3 * LIGHT_LEVELS ) - 2 * LIGHT_LEVELS ;
uint32_t duty_d = MIN ( MAX ( display_val , 3 * LIGHT_LEVELS ) , 4 * LIGHT_LEVELS ) - 3 * LIGHT_LEVELS ;
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// LED A
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if ( duty_a = = 0 ) {
LED_A_OFF ( ) ;
} else if ( duty_a = = LIGHT_LEVELS ) {
LED_A_ON ( ) ;
} else {
LED_A_ON ( ) ;
SpinDelay ( duty_a ) ;
LED_A_OFF ( ) ;
SpinDelay ( LIGHT_LEVELS - duty_a ) ;
}
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// LED B
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if ( duty_b = = 0 ) {
LED_B_OFF ( ) ;
} else if ( duty_b = = LIGHT_LEVELS ) {
LED_B_ON ( ) ;
} else {
LED_B_ON ( ) ;
SpinDelay ( duty_b ) ;
LED_B_OFF ( ) ;
SpinDelay ( LIGHT_LEVELS - duty_b ) ;
}
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// LED C
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if ( duty_c = = 0 ) {
LED_C_OFF ( ) ;
} else if ( duty_c = = LIGHT_LEVELS ) {
LED_C_ON ( ) ;
} else {
LED_C_ON ( ) ;
SpinDelay ( duty_c ) ;
LED_C_OFF ( ) ;
SpinDelay ( LIGHT_LEVELS - duty_c ) ;
}
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// LED D
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if ( duty_d = = 0 ) {
LED_D_OFF ( ) ;
} else if ( duty_d = = LIGHT_LEVELS ) {
LED_D_ON ( ) ;
} else {
LED_D_ON ( ) ;
SpinDelay ( duty_d ) ;
LED_D_OFF ( ) ;
SpinDelay ( LIGHT_LEVELS - duty_d ) ;
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}
}
}
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}
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static void PacketReceived ( PacketCommandNG * packet ) {
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/*
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if ( packet - > ng ) {
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Dbprintf ( " received NG frame with %d bytes payload, with command: 0x%04x " , packet - > length , cmd ) ;
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} else {
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Dbprintf ( " received OLD frame of %d bytes, with command: 0x%04x and args: %d %d %d " , packet - > length , packet - > cmd , packet - > oldarg [ 0 ] , packet - > oldarg [ 1 ] , packet - > oldarg [ 2 ] ) ;
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}
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*/
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switch ( packet - > cmd ) {
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case CMD_BREAK_LOOP :
break ;
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case CMD_QUIT_SESSION : {
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reply_via_fpc = false ;
reply_via_usb = false ;
break ;
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}
// emulator
case CMD_SET_DBGMODE : {
DBGLEVEL = packet - > data . asBytes [ 0 ] ;
Dbprintf ( " Debug level: %d " , DBGLEVEL ) ;
reply_ng ( CMD_SET_DBGMODE , PM3_SUCCESS , NULL , 0 ) ;
break ;
}
// always available
case CMD_HF_DROPFIELD : {
hf_field_off ( ) ;
break ;
}
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# ifdef WITH_LF
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case CMD_LF_T55XX_SET_CONFIG : {
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setT55xxConfig ( packet - > oldarg [ 0 ] , ( t55xx_configurations_t * ) packet - > data . asBytes ) ;
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break ;
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}
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case CMD_LF_SAMPLING_PRINT_CONFIG : {
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printConfig ( ) ;
break ;
}
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case CMD_LF_SAMPLING_GET_CONFIG : {
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sample_config * config = getSamplingConfig ( ) ;
reply_ng ( CMD_LF_SAMPLING_GET_CONFIG , PM3_SUCCESS , ( uint8_t * ) config , sizeof ( sample_config ) ) ;
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break ;
}
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case CMD_LF_SAMPLING_SET_CONFIG : {
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sample_config c ;
memcpy ( & c , packet - > data . asBytes , sizeof ( sample_config ) ) ;
setSamplingConfig ( & c ) ;
// setSamplingConfig((sample_config *) packet->data.asBytes);
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break ;
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}
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case CMD_LF_ACQ_RAW_ADC : {
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struct p {
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uint8_t verbose ;
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uint32_t samples ;
} PACKED ;
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struct p * payload = ( struct p * ) packet - > data . asBytes ;
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uint32_t bits = SampleLF ( payload - > verbose , payload - > samples ) ;
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reply_ng ( CMD_LF_ACQ_RAW_ADC , PM3_SUCCESS , ( uint8_t * ) & bits , sizeof ( bits ) ) ;
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break ;
}
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case CMD_LF_MOD_THEN_ACQ_RAW_ADC : {
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struct p {
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uint32_t delay ;
uint16_t ones ;
uint16_t zeros ;
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} PACKED ;
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struct p * payload = ( struct p * ) packet - > data . asBytes ;
ModThenAcquireRawAdcSamples125k ( payload - > delay , payload - > zeros , payload - > ones , packet - > data . asBytes + 8 ) ;
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break ;
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}
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case CMD_LF_SNIFF_RAW_ADC : {
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uint32_t bits = SniffLF ( ) ;
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reply_mix ( CMD_ACK , bits , 0 , 0 , 0 , 0 ) ;
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break ;
}
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case CMD_LF_HID_DEMOD : {
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uint32_t high , low ;
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CmdHIDdemodFSK ( 0 , & high , & low , 1 ) ;
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break ;
}
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case CMD_LF_HID_SIMULATE : {
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lf_hidsim_t * payload = ( lf_hidsim_t * ) packet - > data . asBytes ;
CmdHIDsimTAG ( payload - > hi2 , payload - > hi , payload - > lo , payload - > longFMT , 1 ) ;
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break ;
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}
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case CMD_LF_FSK_SIMULATE : {
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lf_fsksim_t * payload = ( lf_fsksim_t * ) packet - > data . asBytes ;
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CmdFSKsimTAG ( payload - > fchigh , payload - > fclow , payload - > separator , payload - > clock , packet - > length - sizeof ( lf_fsksim_t ) , payload - > data , true ) ;
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break ;
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}
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case CMD_LF_ASK_SIMULATE : {
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lf_asksim_t * payload = ( lf_asksim_t * ) packet - > data . asBytes ;
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CmdASKsimTAG ( payload - > encoding , payload - > invert , payload - > separator , payload - > clock , packet - > length - sizeof ( lf_asksim_t ) , payload - > data , true ) ;
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break ;
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}
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case CMD_LF_PSK_SIMULATE : {
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lf_psksim_t * payload = ( lf_psksim_t * ) packet - > data . asBytes ;
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CmdPSKsimTAG ( payload - > carrier , payload - > invert , payload - > clock , packet - > length - sizeof ( lf_psksim_t ) , payload - > data , true ) ;
break ;
}
case CMD_LF_NRZ_SIMULATE : {
lf_nrzsim_t * payload = ( lf_nrzsim_t * ) packet - > data . asBytes ;
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CmdNRZsimTAG ( payload - > invert , payload - > separator , payload - > clock , packet - > length - sizeof ( lf_nrzsim_t ) , payload - > data , true ) ;
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break ;
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}
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case CMD_LF_HID_CLONE : {
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CopyHIDtoT55x7 ( packet - > oldarg [ 0 ] , packet - > oldarg [ 1 ] , packet - > oldarg [ 2 ] , packet - > data . asBytes [ 0 ] ) ;
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break ;
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}
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case CMD_LF_IO_DEMOD : {
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uint32_t high , low ;
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CmdIOdemodFSK ( 0 , & high , & low , 1 ) ;
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break ;
}
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case CMD_LF_EM410X_DEMOD : {
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uint32_t high ;
uint64_t low ;
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CmdEM410xdemod ( packet - > oldarg [ 0 ] , & high , & low , 1 ) ;
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break ;
}
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case CMD_LF_EM410X_WRITE : {
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WriteEM410x ( packet - > oldarg [ 0 ] , packet - > oldarg [ 1 ] , packet - > oldarg [ 2 ] ) ;
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break ;
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}
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case CMD_LF_TI_READ : {
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ReadTItag ( ) ;
break ;
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}
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case CMD_LF_TI_WRITE : {
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WriteTItag ( packet - > oldarg [ 0 ] , packet - > oldarg [ 1 ] , packet - > oldarg [ 2 ] ) ;
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break ;
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}
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case CMD_LF_SIMULATE : {
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LED_A_ON ( ) ;
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struct p {
uint16_t len ;
uint16_t gap ;
} PACKED ;
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struct p * payload = ( struct p * ) packet - > data . asBytes ;
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// length, start gap, led control
SimulateTagLowFrequency ( payload - > len , payload - > gap , 1 ) ;
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reply_ng ( CMD_LF_SIMULATE , PM3_EOPABORTED , NULL , 0 ) ;
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LED_A_OFF ( ) ;
break ;
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}
case CMD_LF_SIMULATE_BIDIR : {
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SimulateTagLowFrequencyBidir ( packet - > oldarg [ 0 ] , packet - > oldarg [ 1 ] ) ;
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break ;
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}
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case CMD_LF_T55XX_READBL : {
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struct p {
uint32_t password ;
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uint8_t blockno ;
uint8_t page ;
bool pwdmode ;
uint8_t downlink_mode ;
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} PACKED ;
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struct p * payload = ( struct p * ) packet - > data . asBytes ;
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T55xxReadBlock ( payload - > page , payload - > pwdmode , false , payload - > blockno , payload - > password , payload - > downlink_mode ) ;
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break ;
}
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case CMD_LF_T55XX_WRITEBL : {
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// uses NG format
T55xxWriteBlock ( packet - > data . asBytes ) ;
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break ;
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}
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case CMD_LF_T55XX_DANGERRAW : {
T55xxDangerousRawTest ( packet - > data . asBytes ) ;
break ;
}
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case CMD_LF_T55XX_WAKEUP : {
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struct p {
uint32_t password ;
uint8_t flags ;
} PACKED ;
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struct p * payload = ( struct p * ) packet - > data . asBytes ;
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T55xxWakeUp ( payload - > password , payload - > flags ) ;
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break ;
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}
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case CMD_LF_T55XX_RESET_READ : {
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T55xxResetRead ( packet - > data . asBytes [ 0 ] & 0xff ) ;
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break ;
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}
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case CMD_LF_T55XX_CHK_PWDS : {
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T55xx_ChkPwds ( packet - > data . asBytes [ 0 ] & 0xff ) ;
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break ;
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}
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case CMD_LF_PCF7931_READ : {
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ReadPCF7931 ( ) ;
break ;
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}
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case CMD_LF_PCF7931_WRITE : {
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WritePCF7931 (
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packet - > data . asBytes [ 0 ] , packet - > data . asBytes [ 1 ] , packet - > data . asBytes [ 2 ] , packet - > data . asBytes [ 3 ] ,
packet - > data . asBytes [ 4 ] , packet - > data . asBytes [ 5 ] , packet - > data . asBytes [ 6 ] , packet - > data . asBytes [ 9 ] ,
packet - > data . asBytes [ 7 ] - 128 , packet - > data . asBytes [ 8 ] - 128 ,
packet - > oldarg [ 0 ] ,
packet - > oldarg [ 1 ] ,
packet - > oldarg [ 2 ]
2019-03-10 07:00:59 +08:00
) ;
2019-03-10 03:34:41 +08:00
break ;
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}
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case CMD_LF_EM4X_READWORD : {
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struct p {
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uint32_t password ;
uint8_t address ;
uint8_t usepwd ;
} PACKED ;
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struct p * payload = ( struct p * ) packet - > data . asBytes ;
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EM4xReadWord ( payload - > address , payload - > password , payload - > usepwd ) ;
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break ;
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}
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case CMD_LF_EM4X_WRITEWORD : {
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struct p {
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uint32_t password ;
uint32_t data ;
uint8_t address ;
uint8_t usepwd ;
} PACKED ;
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struct p * payload = ( struct p * ) packet - > data . asBytes ;
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EM4xWriteWord ( payload - > address , payload - > data , payload - > password , payload - > usepwd ) ;
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break ;
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}
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case CMD_LF_AWID_DEMOD : {
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uint32_t high , low ;
// Set realtime AWID demodulation
2019-09-23 00:58:49 +08:00
CmdAWIDdemodFSK ( 0 , & high , & low , 1 ) ;
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break ;
}
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case CMD_LF_VIKING_CLONE : {
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struct p {
bool Q5 ;
uint8_t blocks [ 8 ] ;
} PACKED ;
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struct p * payload = ( struct p * ) packet - > data . asBytes ;
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CopyVikingtoT55xx ( payload - > blocks , payload - > Q5 ) ;
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break ;
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}
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case CMD_LF_COTAG_READ : {
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Cotag ( packet - > oldarg [ 0 ] ) ;
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break ;
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}
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# endif
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# ifdef WITH_HITAG
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case CMD_LF_HITAG_SNIFF : { // Eavesdrop Hitag tag, args = type
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SniffHitag2 ( ) ;
// SniffHitag2(packet->oldarg[0]);
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break ;
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}
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case CMD_LF_HITAG_SIMULATE : { // Simulate Hitag tag, args = memory content
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SimulateHitag2 ( ( bool ) packet - > oldarg [ 0 ] , packet - > data . asBytes ) ;
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break ;
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}
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case CMD_LF_HITAG_READER : { // Reader for Hitag tags, args = type and function
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ReaderHitag ( ( hitag_function ) packet - > oldarg [ 0 ] , ( hitag_data * ) packet - > data . asBytes ) ;
2019-03-10 03:34:41 +08:00
break ;
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}
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case CMD_LF_HITAGS_SIMULATE : { // Simulate Hitag s tag, args = memory content
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SimulateHitagSTag ( ( bool ) packet - > oldarg [ 0 ] , packet - > data . asBytes ) ;
2019-03-10 03:34:41 +08:00
break ;
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}
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case CMD_LF_HITAGS_TEST_TRACES : { // Tests every challenge within the given file
2019-04-18 06:12:52 +08:00
check_challenges ( ( bool ) packet - > oldarg [ 0 ] , packet - > data . asBytes ) ;
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break ;
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}
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case CMD_LF_HITAGS_READ : { //Reader for only Hitag S tags, args = key or challenge
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ReadHitagS ( ( hitag_function ) packet - > oldarg [ 0 ] , ( hitag_data * ) packet - > data . asBytes ) ;
2019-03-10 03:34:41 +08:00
break ;
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}
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case CMD_LF_HITAGS_WRITE : { //writer for Hitag tags args=data to write,page and key or challenge
2019-04-18 06:12:52 +08:00
if ( ( hitag_function ) packet - > oldarg [ 0 ] < 10 ) {
WritePageHitagS ( ( hitag_function ) packet - > oldarg [ 0 ] , ( hitag_data * ) packet - > data . asBytes , packet - > oldarg [ 2 ] ) ;
2019-03-13 05:52:15 +08:00
} else {
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WriterHitag ( ( hitag_function ) packet - > oldarg [ 0 ] , ( hitag_data * ) packet - > data . asBytes , packet - > oldarg [ 2 ] ) ;
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}
break ;
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}
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# endif
2015-04-30 06:27:31 +08:00
2010-02-21 05:24:25 +08:00
# ifdef WITH_ISO15693
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case CMD_HF_ISO15693_ACQ_RAW_ADC : {
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AcquireRawAdcSamplesIso15693 ( ) ;
break ;
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}
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case CMD_HF_ISO15693_RAWADC : {
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RecordRawAdcSamplesIso15693 ( ) ;
break ;
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}
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case CMD_HF_ISO15693_COMMAND : {
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DirectTag15693Command ( packet - > oldarg [ 0 ] , packet - > oldarg [ 1 ] , packet - > oldarg [ 2 ] , packet - > data . asBytes ) ;
2019-03-10 03:34:41 +08:00
break ;
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}
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case CMD_HF_ISO15693_FINDAFI : {
2019-04-18 06:12:52 +08:00
BruteforceIso15693Afi ( packet - > oldarg [ 0 ] ) ;
2019-03-10 03:34:41 +08:00
break ;
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}
2019-08-04 01:17:00 +08:00
case CMD_HF_ISO15693_READER : {
2019-04-18 06:12:52 +08:00
ReaderIso15693 ( packet - > oldarg [ 0 ] ) ;
2019-03-10 03:34:41 +08:00
break ;
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}
2019-08-04 01:17:00 +08:00
case CMD_HF_ISO15693_SIMULATE : {
2019-04-18 06:12:52 +08:00
SimTagIso15693 ( packet - > oldarg [ 0 ] , packet - > data . asBytes ) ;
2019-03-10 03:34:41 +08:00
break ;
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}
2010-02-21 05:24:25 +08:00
# endif
2011-12-16 19:00:51 +08:00
# ifdef WITH_LEGICRF
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case CMD_HF_LEGIC_SIMULATE : {
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LegicRfSimulate ( packet - > oldarg [ 0 ] ) ;
2019-03-10 03:34:41 +08:00
break ;
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}
2019-08-04 01:17:00 +08:00
case CMD_HF_LEGIC_WRITER : {
2019-04-18 06:12:52 +08:00
LegicRfWriter ( packet - > oldarg [ 0 ] , packet - > oldarg [ 1 ] , packet - > oldarg [ 2 ] , packet - > data . asBytes ) ;
2019-03-10 03:34:41 +08:00
break ;
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}
2019-08-04 01:17:00 +08:00
case CMD_HF_LEGIC_READER : {
2019-04-18 06:12:52 +08:00
LegicRfReader ( packet - > oldarg [ 0 ] , packet - > oldarg [ 1 ] , packet - > oldarg [ 2 ] ) ;
2019-03-10 03:34:41 +08:00
break ;
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}
2019-08-04 01:17:00 +08:00
case CMD_HF_LEGIC_INFO : {
2019-03-10 03:34:41 +08:00
LegicRfInfo ( ) ;
break ;
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}
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case CMD_HF_LEGIC_ESET : {
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//-----------------------------------------------------------------------------
// Note: we call FpgaDownloadAndGo(FPGA_BITSTREAM_HF) here although FPGA is not
// involved in dealing with emulator memory. But if it is called later, it might
// destroy the Emulator Memory.
//-----------------------------------------------------------------------------
// arg0 = offset
// arg1 = num of bytes
FpgaDownloadAndGo ( FPGA_BITSTREAM_HF ) ;
2019-04-18 06:12:52 +08:00
emlSet ( packet - > data . asBytes , packet - > oldarg [ 0 ] , packet - > oldarg [ 1 ] ) ;
2019-03-10 03:34:41 +08:00
break ;
2019-06-08 03:39:45 +08:00
}
2010-02-21 05:24:25 +08:00
# endif
# ifdef WITH_ISO14443b
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case CMD_HF_SRI_READ : {
2019-04-18 06:12:52 +08:00
ReadSTMemoryIso14443b ( packet - > oldarg [ 0 ] ) ;
2019-03-10 03:34:41 +08:00
break ;
2019-06-08 03:39:45 +08:00
}
2019-08-04 01:17:00 +08:00
case CMD_HF_ISO14443B_SNIFF : {
2019-03-10 03:34:41 +08:00
SniffIso14443b ( ) ;
break ;
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}
2019-08-04 01:17:00 +08:00
case CMD_HF_ISO14443B_SIMULATE : {
2019-04-18 06:12:52 +08:00
SimulateIso14443bTag ( packet - > oldarg [ 0 ] ) ;
2019-03-10 03:34:41 +08:00
break ;
2019-06-08 03:39:45 +08:00
}
2019-08-04 01:17:00 +08:00
case CMD_HF_ISO14443B_COMMAND : {
2019-04-18 06:12:52 +08:00
//SendRawCommand14443B(packet->oldarg[0],packet->oldarg[1],packet->oldarg[2],packet->data.asBytes);
2019-04-18 03:30:01 +08:00
SendRawCommand14443B_Ex ( packet ) ;
2019-03-10 03:34:41 +08:00
break ;
2019-06-08 03:39:45 +08:00
}
2010-02-21 05:24:25 +08:00
# endif
2017-10-21 02:27:44 +08:00
# ifdef WITH_FELICA
2019-08-04 01:17:00 +08:00
case CMD_HF_FELICA_COMMAND : {
2019-04-18 03:30:01 +08:00
felica_sendraw ( packet ) ;
2019-03-10 03:34:41 +08:00
break ;
2019-06-08 03:39:45 +08:00
}
2019-08-04 01:17:00 +08:00
case CMD_HF_FELICALITE_SIMULATE : {
2019-04-18 06:12:52 +08:00
felica_sim_lite ( packet - > oldarg [ 0 ] ) ;
2017-10-21 02:27:44 +08:00
break ;
2019-06-08 03:39:45 +08:00
}
2019-08-04 01:17:00 +08:00
case CMD_HF_FELICA_SNIFF : {
2019-04-18 06:12:52 +08:00
felica_sniff ( packet - > oldarg [ 0 ] , packet - > oldarg [ 1 ] ) ;
2017-10-21 02:27:44 +08:00
break ;
2019-06-08 03:39:45 +08:00
}
2019-08-04 01:17:00 +08:00
case CMD_HF_FELICALITE_DUMP : {
2019-03-10 03:34:41 +08:00
felica_dump_lite_s ( ) ;
2017-10-21 02:27:44 +08:00
break ;
2019-06-08 03:39:45 +08:00
}
2017-10-21 02:27:44 +08:00
# endif
2010-02-21 05:24:25 +08:00
# ifdef WITH_ISO14443a
2019-08-04 01:17:00 +08:00
case CMD_HF_ISO14443A_SNIFF : {
2019-05-27 03:00:49 +08:00
SniffIso14443a ( packet - > data . asBytes [ 0 ] ) ;
2019-03-10 03:34:41 +08:00
break ;
2019-06-08 03:39:45 +08:00
}
2019-08-04 01:17:00 +08:00
case CMD_HF_ISO14443A_READER : {
2019-04-18 03:30:01 +08:00
ReaderIso14443a ( packet ) ;
2019-03-10 03:34:41 +08:00
break ;
2019-06-08 03:39:45 +08:00
}
2019-08-04 01:17:00 +08:00
case CMD_HF_ISO14443A_SIMULATE : {
2019-05-27 01:42:27 +08:00
struct p {
2019-06-08 03:39:45 +08:00
uint8_t tagtype ;
uint8_t flags ;
uint8_t uid [ 10 ] ;
2019-05-27 01:42:27 +08:00
} PACKED ;
2019-06-08 03:39:45 +08:00
struct p * payload = ( struct p * ) packet - > data . asBytes ;
2019-05-27 01:42:27 +08:00
SimulateIso14443aTag ( payload - > tagtype , payload - > flags , payload - > uid ) ; // ## Simulate iso14443a tag - pass tag type & UID
2019-03-10 03:34:41 +08:00
break ;
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}
2019-08-04 01:17:00 +08:00
case CMD_HF_ISO14443A_ANTIFUZZ : {
2019-04-18 06:12:52 +08:00
iso14443a_antifuzz ( packet - > oldarg [ 0 ] ) ;
2019-03-10 03:34:41 +08:00
break ;
2019-06-08 03:39:45 +08:00
}
2019-08-04 01:17:00 +08:00
case CMD_HF_EPA_COLLECT_NONCE : {
2019-04-18 03:30:01 +08:00
EPA_PACE_Collect_Nonce ( packet ) ;
2019-03-10 03:34:41 +08:00
break ;
2019-06-08 03:39:45 +08:00
}
2019-08-04 01:17:00 +08:00
case CMD_HF_EPA_REPLAY : {
2019-04-18 03:30:01 +08:00
EPA_PACE_Replay ( packet ) ;
2019-03-10 03:34:41 +08:00
break ;
2019-06-08 03:39:45 +08:00
}
2019-08-04 01:17:00 +08:00
case CMD_HF_MIFARE_READER : {
2019-09-25 16:24:34 +08:00
struct p {
uint8_t first_run ;
uint8_t blockno ;
uint8_t key_type ;
} PACKED ;
struct p * payload = ( struct p * ) packet - > data . asBytes ;
ReaderMifare ( payload - > first_run , payload - > blockno , payload - > key_type ) ;
2019-03-10 03:34:41 +08:00
break ;
2019-06-08 03:39:45 +08:00
}
2019-08-04 01:17:00 +08:00
case CMD_HF_MIFARE_READBL : {
2019-05-29 01:20:56 +08:00
mf_readblock_t * payload = ( mf_readblock_t * ) packet - > data . asBytes ;
MifareReadBlock ( payload - > blockno , payload - > keytype , payload - > key ) ;
2019-03-10 03:34:41 +08:00
break ;
2019-06-08 03:39:45 +08:00
}
2019-08-04 01:17:00 +08:00
case CMD_HF_MIFAREU_READBL : {
2019-04-18 06:12:52 +08:00
MifareUReadBlock ( packet - > oldarg [ 0 ] , packet - > oldarg [ 1 ] , packet - > data . asBytes ) ;
2019-03-10 03:34:41 +08:00
break ;
2019-06-08 03:39:45 +08:00
}
2019-08-04 01:17:00 +08:00
case CMD_HF_MIFAREUC_AUTH : {
2019-04-18 06:12:52 +08:00
MifareUC_Auth ( packet - > oldarg [ 0 ] , packet - > data . asBytes ) ;
2019-03-10 03:34:41 +08:00
break ;
2019-06-08 03:39:45 +08:00
}
2019-08-04 01:17:00 +08:00
case CMD_HF_MIFAREU_READCARD : {
2019-04-18 06:12:52 +08:00
MifareUReadCard ( packet - > oldarg [ 0 ] , packet - > oldarg [ 1 ] , packet - > oldarg [ 2 ] , packet - > data . asBytes ) ;
2019-03-10 03:34:41 +08:00
break ;
2019-06-08 03:39:45 +08:00
}
2019-08-04 01:17:00 +08:00
case CMD_HF_MIFAREUC_SETPWD : {
2019-04-18 06:12:52 +08:00
MifareUSetPwd ( packet - > oldarg [ 0 ] , packet - > data . asBytes ) ;
2019-03-10 03:34:41 +08:00
break ;
2019-06-08 03:39:45 +08:00
}
2019-08-04 01:17:00 +08:00
case CMD_HF_MIFARE_READSC : {
2019-05-13 18:49:41 +08:00
MifareReadSector ( packet - > oldarg [ 0 ] , packet - > oldarg [ 1 ] , packet - > data . asBytes ) ;
2019-03-10 03:34:41 +08:00
break ;
2019-06-08 03:39:45 +08:00
}
2019-08-04 01:17:00 +08:00
case CMD_HF_MIFARE_WRITEBL : {
2019-05-13 18:49:41 +08:00
MifareWriteBlock ( packet - > oldarg [ 0 ] , packet - > oldarg [ 1 ] , packet - > data . asBytes ) ;
2019-03-10 03:34:41 +08:00
break ;
2019-06-08 03:39:45 +08:00
}
2019-08-04 01:17:00 +08:00
case CMD_HF_MIFAREU_WRITEBL : {
2019-04-18 06:12:52 +08:00
MifareUWriteBlock ( packet - > oldarg [ 0 ] , packet - > oldarg [ 1 ] , packet - > data . asBytes ) ;
2019-03-10 03:34:41 +08:00
break ;
2019-06-08 03:39:45 +08:00
}
2019-08-04 01:17:00 +08:00
case CMD_HF_MIFARE_ACQ_ENCRYPTED_NONCES : {
2019-04-18 06:12:52 +08:00
MifareAcquireEncryptedNonces ( packet - > oldarg [ 0 ] , packet - > oldarg [ 1 ] , packet - > oldarg [ 2 ] , packet - > data . asBytes ) ;
2019-03-10 03:34:41 +08:00
break ;
2019-06-08 03:39:45 +08:00
}
2019-08-04 01:17:00 +08:00
case CMD_HF_MIFARE_ACQ_NONCES : {
2019-05-13 19:31:11 +08:00
MifareAcquireNonces ( packet - > oldarg [ 0 ] , packet - > oldarg [ 2 ] ) ;
2019-03-10 03:34:41 +08:00
break ;
2019-06-08 03:39:45 +08:00
}
2019-08-04 01:17:00 +08:00
case CMD_HF_MIFARE_NESTED : {
2019-10-03 22:15:47 +08:00
struct p {
uint8_t block ;
uint8_t keytype ;
uint8_t target_block ;
uint8_t target_keytype ;
bool calibrate ;
uint8_t key [ 6 ] ;
} PACKED ;
struct p * payload = ( struct p * ) packet - > data . asBytes ;
MifareNested ( payload - > block , payload - > keytype , payload - > target_block , payload - > target_keytype , payload - > calibrate , payload - > key ) ;
2019-03-10 03:34:41 +08:00
break ;
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}
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case CMD_HF_MIFARE_STATIC_NESTED : {
struct p {
uint8_t block ;
uint8_t keytype ;
uint8_t target_block ;
uint8_t target_keytype ;
uint8_t key [ 6 ] ;
} PACKED ;
struct p * payload = ( struct p * ) packet - > data . asBytes ;
MifareStaticNested ( payload - > block , payload - > keytype , payload - > target_block , payload - > target_keytype , payload - > key ) ;
break ;
}
2019-08-04 01:17:00 +08:00
case CMD_HF_MIFARE_CHKKEYS : {
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MifareChkKeys ( packet - > data . asBytes ) ;
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break ;
}
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case CMD_HF_MIFARE_CHKKEYS_FAST : {
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MifareChkKeys_fast ( packet - > oldarg [ 0 ] , packet - > oldarg [ 1 ] , packet - > oldarg [ 2 ] , packet - > data . asBytes ) ;
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break ;
}
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case CMD_HF_MIFARE_CHKKEYS_FILE : {
struct p {
uint8_t filename [ 32 ] ;
} PACKED ;
struct p * payload = ( struct p * ) packet - > data . asBytes ;
MifareChkKeys_file ( payload - > filename ) ;
break ;
}
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case CMD_HF_MIFARE_SIMULATE : {
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struct p {
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uint16_t flags ;
uint8_t exitAfter ;
uint8_t uid [ 10 ] ;
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uint16_t atqa ;
uint8_t sak ;
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} PACKED ;
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struct p * payload = ( struct p * ) packet - > data . asBytes ;
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Mifare1ksim ( payload - > flags , payload - > exitAfter , payload - > uid , payload - > atqa , payload - > sak ) ;
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break ;
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}
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case CMD_HF_MIFARE_EML_MEMCLR : {
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MifareEMemClr ( ) ;
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reply_ng ( CMD_HF_MIFARE_EML_MEMCLR , PM3_SUCCESS , NULL , 0 ) ;
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break ;
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}
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case CMD_HF_MIFARE_EML_MEMSET : {
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struct p {
uint8_t blockno ;
uint8_t blockcnt ;
uint8_t blockwidth ;
uint8_t data [ ] ;
} PACKED ;
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struct p * payload = ( struct p * ) packet - > data . asBytes ;
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MifareEMemSet ( payload - > blockno , payload - > blockcnt , payload - > blockwidth , payload - > data ) ;
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break ;
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}
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case CMD_HF_MIFARE_EML_MEMGET : {
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struct p {
uint8_t blockno ;
uint8_t blockcnt ;
} PACKED ;
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struct p * payload = ( struct p * ) packet - > data . asBytes ;
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MifareEMemGet ( payload - > blockno , payload - > blockcnt ) ;
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break ;
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}
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case CMD_HF_MIFARE_EML_LOAD : {
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mfc_eload_t * payload = ( mfc_eload_t * ) packet - > data . asBytes ;
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MifareECardLoadExt ( payload - > sectorcnt , payload - > keytype ) ;
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break ;
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}
2019-03-10 03:34:41 +08:00
// Work with "magic Chinese" card
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case CMD_HF_MIFARE_CSETBL : {
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MifareCSetBlock ( packet - > oldarg [ 0 ] , packet - > oldarg [ 1 ] , packet - > data . asBytes ) ;
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break ;
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}
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case CMD_HF_MIFARE_CGETBL : {
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MifareCGetBlock ( packet - > oldarg [ 0 ] , packet - > oldarg [ 1 ] , packet - > data . asBytes ) ;
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break ;
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}
2019-08-04 01:17:00 +08:00
case CMD_HF_MIFARE_CIDENT : {
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MifareCIdent ( ) ;
break ;
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}
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// mifare sniffer
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// case CMD_HF_MIFARE_SNIFF: {
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// SniffMifare(packet->oldarg[0]);
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// break;
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// }
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case CMD_HF_MIFARE_PERSONALIZE_UID : {
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struct p {
uint8_t keytype ;
uint8_t pers_option ;
uint8_t key [ 6 ] ;
} PACKED ;
struct p * payload = ( struct p * ) packet - > data . asBytes ;
uint64_t authkey = bytes_to_num ( payload - > key , 6 ) ;
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MifarePersonalizeUID ( payload - > keytype , payload - > pers_option , authkey ) ;
break ;
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}
2019-08-04 01:17:00 +08:00
case CMD_HF_MIFARE_SETMOD : {
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MifareSetMod ( packet - > data . asBytes ) ;
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break ;
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}
2019-03-10 03:34:41 +08:00
//mifare desfire
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case CMD_HF_DESFIRE_READBL : {
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break ;
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}
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case CMD_HF_DESFIRE_WRITEBL : {
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break ;
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}
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case CMD_HF_DESFIRE_AUTH1 : {
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MifareDES_Auth1 ( packet - > data . asBytes ) ;
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break ;
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}
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case CMD_HF_DESFIRE_AUTH2 : {
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//MifareDES_Auth2(packet->oldarg[0],packet->data.asBytes);
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break ;
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}
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case CMD_HF_DESFIRE_READER : {
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//readermifaredes(packet->oldarg[0], packet->oldarg[1], packet->data.asBytes);
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break ;
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}
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case CMD_HF_DESFIRE_INFO : {
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MifareDesfireGetInformation ( ) ;
break ;
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}
2019-08-04 01:17:00 +08:00
case CMD_HF_DESFIRE_COMMAND : {
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MifareSendCommand ( packet - > data . asBytes ) ;
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break ;
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}
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case CMD_HF_MIFARE_NACK_DETECT : {
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DetectNACKbug ( ) ;
break ;
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}
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case CMD_HF_MFU_OTP_TEAROFF : {
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MifareU_Otp_Tearoff ( packet - > oldarg [ 0 ] , packet - > oldarg [ 1 ] , packet - > data . asBytes ) ;
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break ;
}
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case CMD_HF_MIFARE_STATIC_NONCE : {
MifareHasStaticNonce ( ) ;
break ;
}
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# endif
# ifdef WITH_NFCBARCODE
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case CMD_HF_THINFILM_READ : {
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ReadThinFilm ( ) ;
break ;
}
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case CMD_HF_THINFILM_SIMULATE : {
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SimulateThinFilm ( packet - > data . asBytes , packet - > length ) ;
break ;
}
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# endif
2017-11-25 17:20:52 +08:00
2011-12-16 19:00:51 +08:00
# ifdef WITH_ICLASS
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// Makes use of ISO14443a FPGA Firmware
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case CMD_HF_ICLASS_SNIFF : {
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SniffIClass ( ) ;
break ;
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}
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case CMD_HF_ICLASS_SIMULATE : {
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SimulateIClass ( packet - > oldarg [ 0 ] , packet - > oldarg [ 1 ] , packet - > oldarg [ 2 ] , packet - > data . asBytes ) ;
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break ;
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}
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case CMD_HF_ICLASS_READER : {
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ReaderIClass ( packet - > oldarg [ 0 ] ) ;
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break ;
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}
2019-08-04 01:17:00 +08:00
case CMD_HF_ICLASS_REPLAY : {
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ReaderIClass_Replay ( packet - > oldarg [ 0 ] , packet - > data . asBytes ) ;
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break ;
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}
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case CMD_HF_ICLASS_EML_MEMSET : {
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//iceman, should call FPGADOWNLOAD before, since it corrupts BigBuf
FpgaDownloadAndGo ( FPGA_BITSTREAM_HF ) ;
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emlSet ( packet - > data . asBytes , packet - > oldarg [ 0 ] , packet - > oldarg [ 1 ] ) ;
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break ;
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}
2019-08-04 01:17:00 +08:00
case CMD_HF_ICLASS_WRITEBL : {
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struct p {
uint8_t blockno ;
uint8_t data [ 12 ] ;
} PACKED ;
struct p * payload = ( struct p * ) packet - > data . asBytes ;
iClass_WriteBlock ( payload - > blockno , payload - > data ) ;
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break ;
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}
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// iceman2019, unused?
2019-08-04 01:17:00 +08:00
case CMD_HF_ICLASS_READCHECK : { // auth step 1
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iClass_ReadCheck ( packet - > oldarg [ 0 ] , packet - > oldarg [ 1 ] ) ;
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break ;
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}
2019-08-04 01:17:00 +08:00
case CMD_HF_ICLASS_READBL : {
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/*
struct p {
uint8_t blockno ;
} PACKED ;
struct p * payload = ( struct p * ) packet - > data . asBytes ;
*/
iClass_ReadBlk ( packet - > data . asBytes [ 0 ] ) ;
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break ;
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}
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case CMD_HF_ICLASS_AUTH : { //check
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/*
struct p {
uint8_t mac [ 4 ] ;
} PACKED ;
struct p * payload = ( struct p * ) packet - > data . asBytes ;
*/
2019-04-18 06:12:52 +08:00
iClass_Authentication ( packet - > data . asBytes ) ;
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break ;
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}
2019-08-04 01:17:00 +08:00
case CMD_HF_ICLASS_CHKKEYS : {
2019-04-18 06:12:52 +08:00
iClass_Authentication_fast ( packet - > oldarg [ 0 ] , packet - > oldarg [ 1 ] , packet - > data . asBytes ) ;
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break ;
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}
2019-08-04 01:17:00 +08:00
case CMD_HF_ICLASS_DUMP : {
2019-04-18 06:12:52 +08:00
iClass_Dump ( packet - > oldarg [ 0 ] , packet - > oldarg [ 1 ] ) ;
2019-03-10 03:34:41 +08:00
break ;
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}
2019-08-04 01:17:00 +08:00
case CMD_HF_ICLASS_CLONE : {
2019-09-09 05:19:06 +08:00
struct p {
uint8_t startblock ;
uint8_t endblock ;
uint8_t data [ ] ;
} PACKED ;
struct p * payload = ( struct p * ) packet - > data . asBytes ;
iClass_Clone ( payload - > startblock , payload - > endblock , payload - > data ) ;
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break ;
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}
2011-05-18 20:33:32 +08:00
# endif
2018-07-04 21:29:27 +08:00
2019-03-12 20:15:39 +08:00
# ifdef WITH_HFSNIFF
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case CMD_HF_SNIFF : {
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HfSniff ( packet - > oldarg [ 0 ] , packet - > oldarg [ 1 ] ) ;
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break ;
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}
2015-10-28 04:47:21 +08:00
# endif
2018-07-04 21:29:27 +08:00
2020-01-12 23:45:24 +08:00
# ifdef WITH_HFPLOT
case CMD_FPGAMEM_DOWNLOAD : {
HfPlotDownload ( ) ;
break ;
}
# endif
2018-07-04 18:19:04 +08:00
# ifdef WITH_SMARTCARD
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case CMD_SMART_ATR : {
SmartCardAtr ( ) ;
break ;
}
2019-03-10 07:00:59 +08:00
case CMD_SMART_SETBAUD : {
2019-04-18 06:12:52 +08:00
SmartCardSetBaud ( packet - > oldarg [ 0 ] ) ;
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break ;
}
2019-03-10 07:00:59 +08:00
case CMD_SMART_SETCLOCK : {
2019-04-18 06:12:52 +08:00
SmartCardSetClock ( packet - > oldarg [ 0 ] ) ;
2019-03-10 03:34:41 +08:00
break ;
}
2018-07-05 22:32:10 +08:00
case CMD_SMART_RAW : {
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SmartCardRaw ( packet - > oldarg [ 0 ] , packet - > oldarg [ 1 ] , packet - > data . asBytes ) ;
2019-03-10 03:34:41 +08:00
break ;
}
case CMD_SMART_UPLOAD : {
// upload file from client
uint8_t * mem = BigBuf_get_addr ( ) ;
2019-05-01 03:10:11 +08:00
memcpy ( mem + packet - > oldarg [ 0 ] , packet - > data . asBytes , PM3_CMD_DATA_SIZE ) ;
2019-04-18 18:43:35 +08:00
reply_old ( CMD_ACK , 1 , 0 , 0 , 0 , 0 ) ;
2018-07-04 18:19:04 +08:00
break ;
2018-07-05 16:48:24 +08:00
}
case CMD_SMART_UPGRADE : {
2019-04-18 06:12:52 +08:00
SmartCardUpgrade ( packet - > oldarg [ 0 ] ) ;
2019-03-09 15:59:13 +08:00
break ;
2019-03-10 03:34:41 +08:00
}
2019-03-09 15:59:13 +08:00
# endif
2011-05-18 20:33:32 +08:00
2019-05-15 08:15:19 +08:00
# ifdef WITH_FPC_USART
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case CMD_USART_TX : {
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LED_B_ON ( ) ;
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usart_writebuffer_sync ( packet - > data . asBytes , packet - > length ) ;
reply_ng ( CMD_USART_TX , PM3_SUCCESS , NULL , 0 ) ;
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LED_B_OFF ( ) ;
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break ;
}
case CMD_USART_RX : {
2019-05-07 15:37:43 +08:00
LED_B_ON ( ) ;
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struct p {
uint32_t waittime ;
} PACKED ;
struct p * payload = ( struct p * ) & packet - > data . asBytes ;
uint16_t available ;
uint16_t pre_available = 0 ;
2019-05-07 15:37:43 +08:00
uint8_t * dest = BigBuf_malloc ( USART_FIFOLEN ) ;
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uint32_t wait = payload - > waittime ;
uint32_t ti = GetTickCount ( ) ;
while ( true ) {
WaitMS ( 50 ) ;
available = usart_rxdata_available ( ) ;
if ( available > pre_available ) {
// When receiving data, reset timer and shorten timeout
ti = GetTickCount ( ) ;
wait = 50 ;
pre_available = available ;
continue ;
}
// We stop either after waittime if no data or 50ms after last data received
if ( GetTickCountDelta ( ti ) > wait )
break ;
}
2019-04-21 01:17:32 +08:00
if ( available > 0 ) {
2019-05-04 04:30:17 +08:00
uint16_t len = usart_read_ng ( dest , available ) ;
reply_ng ( CMD_USART_RX , PM3_SUCCESS , dest , len ) ;
} else {
reply_ng ( CMD_USART_RX , PM3_ENODATA , NULL , 0 ) ;
2019-04-03 04:06:10 +08:00
}
2019-05-07 15:37:43 +08:00
BigBuf_free ( ) ;
LED_B_OFF ( ) ;
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break ;
}
case CMD_USART_TXRX : {
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LED_B_ON ( ) ;
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struct p {
uint32_t waittime ;
2019-05-24 02:43:42 +08:00
uint8_t data [ ] ;
2019-05-04 04:30:17 +08:00
} PACKED ;
struct p * payload = ( struct p * ) & packet - > data . asBytes ;
2019-05-24 02:43:42 +08:00
usart_writebuffer_sync ( payload - > data , packet - > length - sizeof ( payload ) ) ;
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uint16_t available ;
2019-05-23 05:30:52 +08:00
uint16_t pre_available = 0 ;
2019-05-07 15:37:43 +08:00
uint8_t * dest = BigBuf_malloc ( USART_FIFOLEN ) ;
2019-05-23 05:30:52 +08:00
uint32_t wait = payload - > waittime ;
uint32_t ti = GetTickCount ( ) ;
while ( true ) {
WaitMS ( 50 ) ;
available = usart_rxdata_available ( ) ;
if ( available > pre_available ) {
// When receiving data, reset timer and shorten timeout
ti = GetTickCount ( ) ;
wait = 50 ;
pre_available = available ;
continue ;
}
// We stop either after waittime if no data or 50ms after last data received
if ( GetTickCountDelta ( ti ) > wait )
break ;
}
2019-05-04 04:30:17 +08:00
if ( available > 0 ) {
uint16_t len = usart_read_ng ( dest , available ) ;
reply_ng ( CMD_USART_TXRX , PM3_SUCCESS , dest , len ) ;
} else {
reply_ng ( CMD_USART_TXRX , PM3_ENODATA , NULL , 0 ) ;
2019-03-10 03:34:41 +08:00
}
2019-05-07 15:37:43 +08:00
BigBuf_free ( ) ;
LED_B_OFF ( ) ;
2019-03-10 03:34:41 +08:00
break ;
}
2019-05-15 08:15:19 +08:00
case CMD_USART_CONFIG : {
struct p {
uint32_t baudrate ;
uint8_t parity ;
} PACKED ;
struct p * payload = ( struct p * ) & packet - > data . asBytes ;
usart_init ( payload - > baudrate , payload - > parity ) ;
reply_ng ( CMD_USART_CONFIG , PM3_SUCCESS , NULL , 0 ) ;
break ;
}
2018-07-30 15:54:44 +08:00
# endif
2019-06-08 03:39:45 +08:00
case CMD_BUFF_CLEAR : {
2019-03-10 03:34:41 +08:00
BigBuf_Clear ( ) ;
BigBuf_free ( ) ;
break ;
2019-06-08 03:39:45 +08:00
}
case CMD_MEASURE_ANTENNA_TUNING : {
2019-03-10 03:34:41 +08:00
MeasureAntennaTuning ( ) ;
break ;
2019-06-08 03:39:45 +08:00
}
case CMD_MEASURE_ANTENNA_TUNING_HF : {
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if ( packet - > length ! = 1 )
reply_ng ( CMD_MEASURE_ANTENNA_TUNING_HF , PM3_EINVARG , NULL , 0 ) ;
2019-09-24 19:06:43 +08:00
2019-05-14 14:25:26 +08:00
switch ( packet - > data . asBytes [ 0 ] ) {
case 1 : // MEASURE_ANTENNA_TUNING_HF_START
// Let the FPGA drive the high-frequency antenna around 13.56 MHz.
FpgaDownloadAndGo ( FPGA_BITSTREAM_HF ) ;
FpgaWriteConfWord ( FPGA_MAJOR_MODE_HF_READER_RX_XCORR ) ;
reply_ng ( CMD_MEASURE_ANTENNA_TUNING_HF , PM3_SUCCESS , NULL , 0 ) ;
break ;
case 2 :
if ( button_status = = BUTTON_SINGLE_CLICK )
reply_ng ( CMD_MEASURE_ANTENNA_TUNING_HF , PM3_EOPABORTED , NULL , 0 ) ;
uint16_t volt = MeasureAntennaTuningHfData ( ) ;
reply_ng ( CMD_MEASURE_ANTENNA_TUNING_HF , PM3_SUCCESS , ( uint8_t * ) & volt , sizeof ( volt ) ) ;
break ;
case 3 :
FpgaWriteConfWord ( FPGA_MAJOR_MODE_OFF ) ;
reply_ng ( CMD_MEASURE_ANTENNA_TUNING_HF , PM3_SUCCESS , NULL , 0 ) ;
break ;
default :
reply_ng ( CMD_MEASURE_ANTENNA_TUNING_HF , PM3_EINVARG , NULL , 0 ) ;
break ;
}
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break ;
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}
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case CMD_MEASURE_ANTENNA_TUNING_LF : {
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if ( packet - > length ! = 2 )
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reply_ng ( CMD_MEASURE_ANTENNA_TUNING_LF , PM3_EINVARG , NULL , 0 ) ;
switch ( packet - > data . asBytes [ 0 ] ) {
case 1 : // MEASURE_ANTENNA_TUNING_LF_START
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// Let the FPGA drive the low-frequency antenna around 125kHz
2019-09-24 19:06:43 +08:00
FpgaDownloadAndGo ( FPGA_BITSTREAM_LF ) ;
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FpgaWriteConfWord ( FPGA_MAJOR_MODE_LF_READER | FPGA_LF_ADC_READER_FIELD ) ;
2019-10-04 03:18:37 +08:00
FpgaSendCommand ( FPGA_CMD_SET_DIVISOR , packet - > data . asBytes [ 1 ] ) ;
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reply_ng ( CMD_MEASURE_ANTENNA_TUNING_LF , PM3_SUCCESS , NULL , 0 ) ;
break ;
case 2 :
if ( button_status = = BUTTON_SINGLE_CLICK )
reply_ng ( CMD_MEASURE_ANTENNA_TUNING_LF , PM3_EOPABORTED , NULL , 0 ) ;
uint32_t volt = MeasureAntennaTuningLfData ( ) ;
reply_ng ( CMD_MEASURE_ANTENNA_TUNING_LF , PM3_SUCCESS , ( uint8_t * ) & volt , sizeof ( volt ) ) ;
break ;
case 3 :
FpgaWriteConfWord ( FPGA_MAJOR_MODE_OFF ) ;
reply_ng ( CMD_MEASURE_ANTENNA_TUNING_LF , PM3_SUCCESS , NULL , 0 ) ;
break ;
default :
reply_ng ( CMD_MEASURE_ANTENNA_TUNING_LF , PM3_EINVARG , NULL , 0 ) ;
break ;
}
break ;
}
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case CMD_LISTEN_READER_FIELD : {
if ( packet - > length ! = sizeof ( uint8_t ) )
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break ;
ListenReaderField ( packet - > data . asBytes [ 0 ] ) ;
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break ;
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}
case CMD_FPGA_MAJOR_MODE_OFF : { // ## FPGA Control
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FpgaWriteConfWord ( FPGA_MAJOR_MODE_OFF ) ;
SpinDelay ( 200 ) ;
LED_D_OFF ( ) ; // LED D indicates field ON or OFF
break ;
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}
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case CMD_DOWNLOAD_BIGBUF : {
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LED_B_ON ( ) ;
uint8_t * mem = BigBuf_get_addr ( ) ;
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uint32_t startidx = packet - > oldarg [ 0 ] ;
uint32_t numofbytes = packet - > oldarg [ 1 ] ;
2019-05-27 01:42:27 +08:00
2019-03-10 03:34:41 +08:00
// arg0 = startindex
// arg1 = length bytes to transfer
// arg2 = BigBuf tracelen
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//Dbprintf("transfer to client parameters: %" PRIu32 " | %" PRIu32 " | %" PRIu32, startidx, numofbytes, packet->oldarg[2]);
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2019-05-01 03:10:11 +08:00
for ( size_t i = 0 ; i < numofbytes ; i + = PM3_CMD_DATA_SIZE ) {
size_t len = MIN ( ( numofbytes - i ) , PM3_CMD_DATA_SIZE ) ;
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int result = reply_old ( CMD_DOWNLOADED_BIGBUF , i , len , BigBuf_get_traceLen ( ) , mem + startidx + i , len ) ;
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if ( result ! = PM3_SUCCESS )
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Dbprintf ( " transfer to client failed :: | bytes between %d - %d (%d) | result: %d " , i , i + len , len , result ) ;
2019-03-10 03:34:41 +08:00
}
// Trigger a finish downloading signal with an ACK frame
// iceman, when did sending samplingconfig array got attached here?!?
// arg0 = status of download transfer
// arg1 = RFU
// arg2 = tracelen?
// asbytes = samplingconfig array
2019-04-18 18:43:35 +08:00
reply_old ( CMD_ACK , 1 , 0 , BigBuf_get_traceLen ( ) , getSamplingConfig ( ) , sizeof ( sample_config ) ) ;
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LED_B_OFF ( ) ;
break ;
}
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# ifdef WITH_LF
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case CMD_LF_UPLOAD_SIM_SAMPLES : {
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// iceman; since changing fpga_bitstreams clears bigbuff, Its better to call it before.
// to be able to use this one for uploading data to device
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// flag =
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// b0 0 skip
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// 1 clear bigbuff
struct p {
uint8_t flag ;
uint16_t offset ;
uint8_t * data ;
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} PACKED ;
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struct p * payload = ( struct p * ) packet - > data . asBytes ;
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2019-05-23 22:51:19 +08:00
FpgaDownloadAndGo ( FPGA_BITSTREAM_LF ) ;
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if ( ( payload - > flag & 0x1 ) = = 0x1 ) {
2019-05-22 20:32:30 +08:00
BigBuf_Clear_ext ( false ) ;
BigBuf_free ( ) ;
}
2020-01-08 05:05:01 +08:00
2020-01-05 03:01:06 +08:00
// 40 000 - (512-3) 509 = 39491
2019-10-10 18:41:12 +08:00
uint16_t offset = MIN ( BIGBUF_SIZE - PM3_CMD_DATA_SIZE - 3 , payload - > offset ) ;
2019-10-29 20:35:09 +08:00
2019-10-24 16:06:59 +08:00
// need to copy len bytes of data, not PM3_CMD_DATA_SIZE - 3 - offset
// ensure len bytes copied wont go past end of bigbuf
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uint16_t len = MIN ( BIGBUF_SIZE - offset , PM3_CMD_DATA_SIZE - 3 ) ;
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uint8_t * mem = BigBuf_get_addr ( ) ;
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// x + 394
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memcpy ( mem + offset , & payload - > data , len ) ;
// memcpy(mem + offset, &payload->data, PM3_CMD_DATA_SIZE - 3 - offset);
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reply_ng ( CMD_LF_UPLOAD_SIM_SAMPLES , PM3_SUCCESS , NULL , 0 ) ;
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break ;
}
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# endif
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case CMD_DOWNLOAD_EML_BIGBUF : {
LED_B_ON ( ) ;
uint8_t * mem = BigBuf_get_EM_addr ( ) ;
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uint32_t startidx = packet - > oldarg [ 0 ] ;
uint32_t numofbytes = packet - > oldarg [ 1 ] ;
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// arg0 = startindex
// arg1 = length bytes to transfer
// arg2 = RFU
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for ( size_t i = 0 ; i < numofbytes ; i + = PM3_CMD_DATA_SIZE ) {
2019-06-08 00:41:39 +08:00
size_t len = MIN ( ( numofbytes - i ) , PM3_CMD_DATA_SIZE ) ;
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int result = reply_old ( CMD_DOWNLOADED_EML_BIGBUF , i , len , 0 , mem + startidx + i , len ) ;
if ( result ! = PM3_SUCCESS )
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Dbprintf ( " transfer to client failed :: | bytes between %d - %d (%d) | result: %d " , i , i + len , len , result ) ;
2019-03-10 03:34:41 +08:00
}
// Trigger a finish downloading signal with an ACK frame
2020-01-12 23:45:24 +08:00
reply_mix ( CMD_ACK , 1 , 0 , 0 , 0 , 0 ) ;
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LED_B_OFF ( ) ;
break ;
}
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case CMD_READ_MEM : {
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if ( packet - > length ! = sizeof ( uint32_t ) )
break ;
ReadMem ( packet - > data . asDwords [ 0 ] ) ;
2019-03-10 03:34:41 +08:00
break ;
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}
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# ifdef WITH_FLASH
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case CMD_SPIFFS_TEST : {
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test_spiffs ( ) ;
break ;
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}
2019-08-13 21:58:08 +08:00
case CMD_SPIFFS_CHECK : {
rdv40_spiffs_check ( ) ;
break ;
}
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case CMD_SPIFFS_MOUNT : {
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rdv40_spiffs_lazy_mount ( ) ;
break ;
}
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case CMD_SPIFFS_UNMOUNT : {
rdv40_spiffs_lazy_unmount ( ) ;
break ;
}
case CMD_SPIFFS_PRINT_TREE : {
rdv40_spiffs_safe_print_tree ( false ) ;
break ;
}
2019-07-24 03:33:52 +08:00
case CMD_SPIFFS_PRINT_FSINFO : {
2019-07-24 03:48:09 +08:00
rdv40_spiffs_safe_print_fsinfo ( ) ;
2019-07-24 03:33:52 +08:00
break ;
}
2019-07-23 04:56:06 +08:00
case CMD_SPIFFS_DOWNLOAD : {
LED_B_ON ( ) ;
uint8_t filename [ 32 ] ;
uint8_t * pfilename = packet - > data . asBytes ;
2019-07-24 03:33:52 +08:00
memcpy ( filename , pfilename , SPIFFS_OBJ_NAME_LEN ) ;
if ( DBGLEVEL > 1 ) Dbprintf ( " > Filename received for spiffs dump : %s " , filename ) ;
//uint32_t size = 0;
2019-07-23 04:56:06 +08:00
//rdv40_spiffs_stat((char *)filename, (uint32_t *)size,RDV40_SPIFFS_SAFETY_SAFE);
uint32_t size = packet - > oldarg [ 1 ] ;
//uint8_t buff[size];
uint8_t * buff = BigBuf_malloc ( size ) ;
2019-07-24 03:33:52 +08:00
rdv40_spiffs_read_as_filetype ( ( char * ) filename , ( uint8_t * ) buff , size , RDV40_SPIFFS_SAFETY_SAFE ) ;
2019-07-23 04:56:06 +08:00
// arg0 = filename
// arg1 = size
// arg2 = RFU
for ( size_t i = 0 ; i < size ; i + = PM3_CMD_DATA_SIZE ) {
size_t len = MIN ( ( size - i ) , PM3_CMD_DATA_SIZE ) ;
int result = reply_old ( CMD_SPIFFS_DOWNLOADED , i , len , 0 , buff + i , len ) ;
if ( result ! = PM3_SUCCESS )
Dbprintf ( " transfer to client failed :: | bytes between %d - %d (%d) | result: %d " , i , i + len , len , result ) ;
}
// Trigger a finish downloading signal with an ACK frame
2020-01-12 23:45:24 +08:00
reply_mix ( CMD_ACK , 1 , 0 , 0 , 0 , 0 ) ;
2019-07-23 04:56:06 +08:00
LED_B_OFF ( ) ;
break ;
}
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case CMD_SPIFFS_STAT : {
2019-07-23 04:56:06 +08:00
LED_B_ON ( ) ;
uint8_t filename [ 32 ] ;
uint8_t * pfilename = packet - > data . asBytes ;
2019-07-24 03:33:52 +08:00
memcpy ( filename , pfilename , SPIFFS_OBJ_NAME_LEN ) ;
if ( DBGLEVEL > 1 ) Dbprintf ( " > Filename received for spiffs STAT : %s " , filename ) ;
2019-07-23 04:56:06 +08:00
int changed = rdv40_spiffs_lazy_mount ( ) ;
uint32_t size = size_in_spiffs ( ( char * ) filename ) ;
if ( changed ) rdv40_spiffs_lazy_unmount ( ) ;
2019-07-24 03:33:52 +08:00
reply_old ( CMD_ACK , size , 0 , 0 , 0 , 0 ) ;
2019-07-23 04:56:06 +08:00
LED_B_OFF ( ) ;
break ;
}
2019-07-24 03:33:52 +08:00
case CMD_SPIFFS_REMOVE : {
LED_B_ON ( ) ;
uint8_t filename [ 32 ] ;
2019-07-23 04:56:06 +08:00
uint8_t * pfilename = packet - > data . asBytes ;
2019-07-24 03:33:52 +08:00
memcpy ( filename , pfilename , SPIFFS_OBJ_NAME_LEN ) ;
if ( DBGLEVEL > 1 ) Dbprintf ( " > Filename received for spiffs REMOVE : %s " , filename ) ;
rdv40_spiffs_remove ( ( char * ) filename , RDV40_SPIFFS_SAFETY_SAFE ) ;
LED_B_OFF ( ) ;
2019-07-23 04:56:06 +08:00
break ;
2019-07-24 03:33:52 +08:00
}
case CMD_SPIFFS_RENAME : {
2019-07-23 04:56:06 +08:00
LED_B_ON ( ) ;
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uint8_t src [ 32 ] ;
uint8_t dest [ 32 ] ;
2019-07-23 04:56:06 +08:00
uint8_t * pfilename = packet - > data . asBytes ;
2019-07-24 03:33:52 +08:00
char * token ;
2019-07-23 04:56:06 +08:00
token = strtok ( ( char * ) pfilename , " , " ) ;
2019-10-09 16:33:42 +08:00
strncpy ( ( char * ) src , token , sizeof ( src ) - 1 ) ;
2019-07-24 03:33:52 +08:00
token = strtok ( NULL , " , " ) ;
2019-10-09 16:33:42 +08:00
strncpy ( ( char * ) dest , token , sizeof ( dest ) - 1 ) ;
2019-10-20 04:06:27 +08:00
if ( DBGLEVEL > 1 ) {
Dbprintf ( " > Filename received as source for spiffs RENAME : %s " , src ) ;
Dbprintf ( " > Filename received as destination for spiffs RENAME : %s " , dest ) ;
}
2019-10-09 16:33:42 +08:00
rdv40_spiffs_rename ( ( char * ) src , ( char * ) dest , RDV40_SPIFFS_SAFETY_SAFE ) ;
2019-07-24 03:33:52 +08:00
LED_B_OFF ( ) ;
2019-07-23 04:56:06 +08:00
break ;
}
2019-07-24 03:33:52 +08:00
case CMD_SPIFFS_COPY : {
2019-07-23 04:56:06 +08:00
LED_B_ON ( ) ;
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uint8_t src [ 32 ] ;
uint8_t dest [ 32 ] ;
2019-07-23 04:56:06 +08:00
uint8_t * pfilename = packet - > data . asBytes ;
char * token ;
token = strtok ( ( char * ) pfilename , " , " ) ;
2019-10-09 16:33:42 +08:00
strncpy ( ( char * ) src , token , sizeof ( src ) - 1 ) ;
2019-07-24 03:33:52 +08:00
token = strtok ( NULL , " , " ) ;
2019-10-09 16:33:42 +08:00
strncpy ( ( char * ) dest , token , sizeof ( dest ) - 1 ) ;
2019-10-20 04:06:27 +08:00
if ( DBGLEVEL > 1 ) {
Dbprintf ( " > Filename received as source for spiffs COPY : %s " , src ) ;
Dbprintf ( " > Filename received as destination for spiffs COPY : %s " , dest ) ;
}
2019-10-09 16:33:42 +08:00
rdv40_spiffs_copy ( ( char * ) src , ( char * ) dest , RDV40_SPIFFS_SAFETY_SAFE ) ;
2019-07-24 03:33:52 +08:00
LED_B_OFF ( ) ;
2019-07-23 04:56:06 +08:00
break ;
}
case CMD_SPIFFS_WRITE : {
LED_B_ON ( ) ;
uint8_t filename [ 32 ] ;
uint32_t append = packet - > oldarg [ 0 ] ;
uint32_t size = packet - > oldarg [ 1 ] ;
uint8_t * data = packet - > data . asBytes ;
2019-07-24 03:33:52 +08:00
//rdv40_spiffs_lazy_mount();
2019-07-23 04:56:06 +08:00
uint8_t * pfilename = packet - > data . asBytes ;
2019-07-24 03:33:52 +08:00
memcpy ( filename , pfilename , SPIFFS_OBJ_NAME_LEN ) ;
data + = SPIFFS_OBJ_NAME_LEN ;
if ( DBGLEVEL > 1 ) Dbprintf ( " > Filename received for spiffs WRITE : %s with APPEND SET TO : %d " , filename , append ) ;
if ( ! append ) {
rdv40_spiffs_write ( ( char * ) filename , ( uint8_t * ) data , size , RDV40_SPIFFS_SAFETY_SAFE ) ;
} else {
rdv40_spiffs_append ( ( char * ) filename , ( uint8_t * ) data , size , RDV40_SPIFFS_SAFETY_SAFE ) ;
}
2020-01-12 23:45:24 +08:00
reply_mix ( CMD_ACK , 1 , 0 , 0 , 0 , 0 ) ;
2019-07-23 04:56:06 +08:00
LED_B_OFF ( ) ;
break ;
}
2019-06-08 03:39:45 +08:00
case CMD_FLASHMEM_SET_SPIBAUDRATE : {
2019-09-19 18:13:39 +08:00
if ( packet - > length ! = sizeof ( uint32_t ) )
break ;
FlashmemSetSpiBaudrate ( packet - > data . asDwords [ 0 ] ) ;
2019-03-10 03:34:41 +08:00
break ;
2019-06-08 03:39:45 +08:00
}
2019-03-10 03:34:41 +08:00
case CMD_FLASHMEM_WRITE : {
LED_B_ON ( ) ;
uint8_t isok = 0 ;
uint16_t res = 0 ;
2019-04-18 06:12:52 +08:00
uint32_t startidx = packet - > oldarg [ 0 ] ;
uint16_t len = packet - > oldarg [ 1 ] ;
uint8_t * data = packet - > data . asBytes ;
2019-03-10 03:34:41 +08:00
if ( ! FlashInit ( ) ) {
break ;
}
2019-05-31 23:14:57 +08:00
if ( startidx = = DEFAULT_T55XX_KEYS_OFFSET ) {
2019-08-03 02:48:38 +08:00
Flash_CheckBusy ( BUSY_TIMEOUT ) ;
Flash_WriteEnable ( ) ;
2019-03-10 03:34:41 +08:00
Flash_Erase4k ( 3 , 0xC ) ;
2019-05-31 23:14:57 +08:00
} else if ( startidx = = DEFAULT_MF_KEYS_OFFSET ) {
2019-08-03 02:48:38 +08:00
Flash_CheckBusy ( BUSY_TIMEOUT ) ;
Flash_WriteEnable ( ) ;
2019-05-31 23:14:57 +08:00
Flash_Erase4k ( 3 , 0x9 ) ;
2019-08-03 02:48:38 +08:00
Flash_CheckBusy ( BUSY_TIMEOUT ) ;
Flash_WriteEnable ( ) ;
2019-05-31 23:15:54 +08:00
Flash_Erase4k ( 3 , 0xA ) ;
2019-05-31 23:14:57 +08:00
} else if ( startidx = = DEFAULT_ICLASS_KEYS_OFFSET ) {
2019-08-03 02:48:38 +08:00
Flash_CheckBusy ( BUSY_TIMEOUT ) ;
Flash_WriteEnable ( ) ;
2019-03-10 03:34:41 +08:00
Flash_Erase4k ( 3 , 0xB ) ;
2019-05-31 23:14:57 +08:00
}
2019-03-10 03:34:41 +08:00
2019-08-03 02:48:38 +08:00
res = Flash_Write ( startidx , data , len ) ;
isok = ( res = = len ) ? 1 : 0 ;
2019-03-10 03:34:41 +08:00
2020-01-12 23:45:24 +08:00
reply_mix ( CMD_ACK , isok , 0 , 0 , 0 , 0 ) ;
2019-03-10 03:34:41 +08:00
LED_B_OFF ( ) ;
break ;
}
case CMD_FLASHMEM_WIPE : {
LED_B_ON ( ) ;
2019-04-18 06:12:52 +08:00
uint8_t page = packet - > oldarg [ 0 ] ;
uint8_t initalwipe = packet - > oldarg [ 1 ] ;
2019-03-10 03:34:41 +08:00
bool isok = false ;
2019-03-10 07:00:59 +08:00
if ( initalwipe ) {
2019-03-10 03:34:41 +08:00
isok = Flash_WipeMemory ( ) ;
2020-01-12 23:45:24 +08:00
reply_mix ( CMD_ACK , isok , 0 , 0 , 0 , 0 ) ;
2019-03-10 03:34:41 +08:00
LED_B_OFF ( ) ;
break ;
}
2019-03-10 07:00:59 +08:00
if ( page < 3 )
2019-03-10 03:34:41 +08:00
isok = Flash_WipeMemoryPage ( page ) ;
2020-01-12 23:45:24 +08:00
reply_mix ( CMD_ACK , isok , 0 , 0 , 0 , 0 ) ;
2019-03-10 03:34:41 +08:00
LED_B_OFF ( ) ;
break ;
}
case CMD_FLASHMEM_DOWNLOAD : {
LED_B_ON ( ) ;
2019-05-01 03:10:11 +08:00
uint8_t * mem = BigBuf_malloc ( PM3_CMD_DATA_SIZE ) ;
2019-04-18 06:12:52 +08:00
uint32_t startidx = packet - > oldarg [ 0 ] ;
uint32_t numofbytes = packet - > oldarg [ 1 ] ;
2019-03-10 03:34:41 +08:00
// arg0 = startindex
// arg1 = length bytes to transfer
// arg2 = RFU
if ( ! FlashInit ( ) ) {
break ;
}
2019-05-01 03:10:11 +08:00
for ( size_t i = 0 ; i < numofbytes ; i + = PM3_CMD_DATA_SIZE ) {
size_t len = MIN ( ( numofbytes - i ) , PM3_CMD_DATA_SIZE ) ;
2019-08-03 02:48:38 +08:00
Flash_CheckBusy ( BUSY_TIMEOUT ) ;
2019-04-07 17:36:24 +08:00
bool isok = Flash_ReadDataCont ( startidx + i , mem , len ) ;
2019-03-10 07:00:59 +08:00
if ( ! isok )
2019-03-10 03:34:41 +08:00
Dbprintf ( " reading flash memory failed :: | bytes between %d - %d " , i , len ) ;
2019-04-18 18:43:35 +08:00
isok = reply_old ( CMD_FLASHMEM_DOWNLOADED , i , len , 0 , mem , len ) ;
2019-03-10 03:34:41 +08:00
if ( isok ! = 0 )
Dbprintf ( " transfer to client failed :: | bytes between %d - %d " , i , len ) ;
}
2019-03-10 07:00:59 +08:00
FlashStop ( ) ;
2019-03-10 03:34:41 +08:00
2020-01-12 23:45:24 +08:00
reply_mix ( CMD_ACK , 1 , 0 , 0 , 0 , 0 ) ;
2019-03-13 19:46:03 +08:00
BigBuf_free ( ) ;
2019-03-10 03:34:41 +08:00
LED_B_OFF ( ) ;
break ;
}
case CMD_FLASHMEM_INFO : {
LED_B_ON ( ) ;
2019-03-10 07:00:59 +08:00
rdv40_validation_t * info = ( rdv40_validation_t * ) BigBuf_malloc ( sizeof ( rdv40_validation_t ) ) ;
2019-03-10 03:34:41 +08:00
bool isok = Flash_ReadData ( FLASH_MEM_SIGNATURE_OFFSET , info - > signature , FLASH_MEM_SIGNATURE_LEN ) ;
if ( FlashInit ( ) ) {
2019-03-10 07:00:59 +08:00
Flash_UniqueID ( info - > flashid ) ;
2019-03-10 03:34:41 +08:00
FlashStop ( ) ;
}
2019-04-18 18:43:35 +08:00
reply_old ( CMD_ACK , isok , 0 , 0 , info , sizeof ( rdv40_validation_t ) ) ;
2019-03-10 03:34:41 +08:00
BigBuf_free ( ) ;
LED_B_OFF ( ) ;
break ;
}
2018-04-18 22:17:49 +08:00
# endif
2019-08-04 01:17:00 +08:00
case CMD_LF_SET_DIVISOR : {
2019-03-10 03:34:41 +08:00
FpgaDownloadAndGo ( FPGA_BITSTREAM_LF ) ;
2019-05-20 16:28:34 +08:00
FpgaSendCommand ( FPGA_CMD_SET_DIVISOR , packet - > data . asBytes [ 0 ] ) ;
2019-03-10 03:34:41 +08:00
break ;
2019-06-08 03:39:45 +08:00
}
case CMD_SET_ADC_MUX : {
2019-05-20 16:28:34 +08:00
switch ( packet - > data . asBytes [ 0 ] ) {
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case 0 :
SetAdcMuxFor ( GPIO_MUXSEL_LOPKD ) ;
break ;
case 2 :
SetAdcMuxFor ( GPIO_MUXSEL_HIPKD ) ;
break ;
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# ifndef WITH_FPC_USART
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case 1 :
SetAdcMuxFor ( GPIO_MUXSEL_LORAW ) ;
break ;
case 3 :
SetAdcMuxFor ( GPIO_MUXSEL_HIRAW ) ;
break ;
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# endif
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}
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break ;
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}
case CMD_VERSION : {
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SendVersion ( ) ;
break ;
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}
case CMD_STATUS : {
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SendStatus ( ) ;
break ;
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}
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case CMD_TIA : {
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while ( ( AT91C_BASE_PMC - > PMC_MCFR & AT91C_CKGR_MAINRDY ) = = 0 ) ; // Wait for MAINF value to become available...
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uint16_t mainf = AT91C_BASE_PMC - > PMC_MCFR & AT91C_CKGR_MAINF ;
Dbprintf ( " Slow clock old measured value:.........%d Hz " , ( 16 * MAINCK ) / mainf ) ;
TimingIntervalAcquisition ( ) ;
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while ( ( AT91C_BASE_PMC - > PMC_MCFR & AT91C_CKGR_MAINRDY ) = = 0 ) ; // Wait for MAINF value to become available...
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mainf = AT91C_BASE_PMC - > PMC_MCFR & AT91C_CKGR_MAINF ;
Dbprintf ( " " ) ; // first message gets lost
Dbprintf ( " Slow clock new measured value:.........%d Hz " , ( 16 * MAINCK ) / mainf ) ;
reply_ng ( CMD_TIA , PM3_SUCCESS , NULL , 0 ) ;
break ;
}
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case CMD_STANDALONE : {
RunMod ( ) ;
break ;
}
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case CMD_CAPABILITIES : {
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SendCapabilities ( ) ;
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break ;
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}
case CMD_PING : {
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reply_ng ( CMD_PING , PM3_SUCCESS , packet - > data . asBytes , packet - > length ) ;
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break ;
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}
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# ifdef WITH_LCD
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case CMD_LCD_RESET : {
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LCDReset ( ) ;
break ;
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}
case CMD_LCD : {
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LCDSend ( packet - > oldarg [ 0 ] ) ;
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break ;
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}
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# endif
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case CMD_FINISH_WRITE :
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case CMD_HARDWARE_RESET : {
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usb_disable ( ) ;
// (iceman) why this wait?
SpinDelay ( 1000 ) ;
AT91C_BASE_RSTC - > RSTC_RCR = RST_CONTROL_KEY | AT91C_RSTC_PROCRST ;
// We're going to reset, and the bootrom will take control.
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for ( ; ; ) { }
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break ;
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}
case CMD_START_FLASH : {
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if ( common_area . flags . bootrom_present ) {
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common_area . command = COMMON_AREA_COMMAND_ENTER_FLASH_MODE ;
}
usb_disable ( ) ;
AT91C_BASE_RSTC - > RSTC_RCR = RST_CONTROL_KEY | AT91C_RSTC_PROCRST ;
// We're going to flash, and the bootrom will take control.
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for ( ; ; ) { }
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break ;
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}
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case CMD_DEVICE_INFO : {
uint32_t dev_info = DEVICE_INFO_FLAG_OSIMAGE_PRESENT | DEVICE_INFO_FLAG_CURRENT_MODE_OS ;
if ( common_area . flags . bootrom_present ) {
dev_info | = DEVICE_INFO_FLAG_BOOTROM_PRESENT ;
}
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reply_old ( CMD_DEVICE_INFO , dev_info , 0 , 0 , 0 , 0 ) ;
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break ;
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}
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default : {
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Dbprintf ( " %s: 0x%04x " , " unknown command: " , packet - > cmd ) ;
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break ;
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}
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}
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}
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void __attribute__ ( ( noreturn ) ) AppMain ( void ) {
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SpinDelay ( 100 ) ;
clear_trace ( ) ;
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if ( common_area . magic ! = COMMON_AREA_MAGIC | | common_area . version ! = 1 ) {
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/* Initialize common area */
memset ( & common_area , 0 , sizeof ( common_area ) ) ;
common_area . magic = COMMON_AREA_MAGIC ;
common_area . version = 1 ;
}
common_area . flags . osimage_present = 1 ;
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LEDsoff ( ) ;
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// The FPGA gets its clock from us from PCK0 output, so set that up.
AT91C_BASE_PIOA - > PIO_BSR = GPIO_PCK0 ;
AT91C_BASE_PIOA - > PIO_PDR = GPIO_PCK0 ;
AT91C_BASE_PMC - > PMC_SCER | = AT91C_PMC_PCK0 ;
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// PCK0 is PLL clock / 4 = 96MHz / 4 = 24MHz
AT91C_BASE_PMC - > PMC_PCKR [ 0 ] = AT91C_PMC_CSS_PLL_CLK | AT91C_PMC_PRES_CLK_4 ; // 4 for 24MHz pck0, 2 for 48 MHZ pck0
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AT91C_BASE_PIOA - > PIO_OER = GPIO_PCK0 ;
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// Reset SPI
AT91C_BASE_SPI - > SPI_CR = AT91C_SPI_SWRST ;
AT91C_BASE_SPI - > SPI_CR = AT91C_SPI_SWRST ; // errata says it needs twice to be correctly set.
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// Reset SSC
AT91C_BASE_SSC - > SSC_CR = AT91C_SSC_SWRST ;
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// Configure MUX
SetAdcMuxFor ( GPIO_MUXSEL_HIPKD ) ;
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// Load the FPGA image, which we have stored in our flash.
// (the HF version by default)
FpgaDownloadAndGo ( FPGA_BITSTREAM_HF ) ;
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StartTickCount ( ) ;
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# ifdef WITH_LCD
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LCDInit ( ) ;
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# endif
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# ifdef WITH_SMARTCARD
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I2C_init ( ) ;
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# endif
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# ifdef WITH_FPC_USART
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usart_init ( USART_BAUD_RATE , USART_PARITY ) ;
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# endif
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// This is made as late as possible to ensure enumeration without timeout
// against device such as http://www.hobbytronics.co.uk/usb-host-board-v2
usb_disable ( ) ;
usb_enable ( ) ;
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allow_send_wtx = true ;
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# ifdef WITH_FLASH
// If flash is not present, BUSY_TIMEOUT kicks in, let's do it after USB
loadT55xxConfig ( ) ;
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//
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// Enforce a spiffs check/garbage collection at boot so we are likely to never
// fall under the 2 contigous free blocks availables
rdv40_spiffs_check ( ) ;
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# endif
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for ( ; ; ) {
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WDT_HIT ( ) ;
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// Check if there is a packet available
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PacketCommandNG rx ;
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memset ( & rx . data , 0 , sizeof ( rx . data ) ) ;
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int ret = receive_ng ( & rx ) ;
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if ( ret = = PM3_SUCCESS ) {
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PacketReceived ( & rx ) ;
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} else if ( ret ! = PM3_ENODATA ) {
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Dbprintf ( " Error in frame reception: %d %s " , ret , ( ret = = PM3_EIO ) ? " PM3_EIO " : " " ) ;
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// TODO if error, shall we resync ?
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}
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// Press button for one second to enter a possible standalone mode
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button_status = BUTTON_HELD ( 1000 ) ;
if ( button_status = = BUTTON_HOLD ) {
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/*
* So this is the trigger to execute a standalone mod . Generic entrypoint by following the standalone / standalone . h headerfile
* All standalone mod " main loop " should be the RunMod ( ) function .
*/
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allow_send_wtx = false ;
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RunMod ( ) ;
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allow_send_wtx = true ;
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}
}
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}