proxmark3/armsrc/appmain.c

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//-----------------------------------------------------------------------------
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// Copyright (C) Jonathan Westhues, Mar 2006
// Copyright (C) Gerhard de Koning Gans, Sep 2007
// Copyright (C) Proxmark3 contributors. See AUTHORS.md for details.
//
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// This program is free software: you can redistribute it and/or modify
// it under the terms of the GNU General Public License as published by
// the Free Software Foundation, either version 3 of the License, or
// (at your option) any later version.
//
// This program is distributed in the hope that it will be useful,
// but WITHOUT ANY WARRANTY; without even the implied warranty of
// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
// GNU General Public License for more details.
//
// See LICENSE.txt for the text of the license.
//-----------------------------------------------------------------------------
// The main application code. This is the first thing called after start.c
// executes.
//-----------------------------------------------------------------------------
#include "appmain.h"
#include "clocks.h"
#include "usb_cdc.h"
#include "proxmark3_arm.h"
#include "dbprint.h"
#include "pmflash.h"
#include "fpga.h"
#include "fpga.h"
#include "fpgaloader.h"
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#include "string.h"
#include "printf.h"
#include "legicrf.h"
#include "BigBuf.h"
#include "iclass_cmd.h"
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#include "hfops.h"
#include "iso14443a.h"
#include "iso14443b.h"
#include "iso15693.h"
#include "thinfilm.h"
#include "felica.h"
#include "hitag2.h"
#include "hitagS.h"
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#include "em4x50.h"
#include "em4x70.h"
#include "iclass.h"
#include "legicrfsim.h"
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//#include "cryptorfsim.h"
#include "epa.h"
#include "hfsnoop.h"
#include "lfops.h"
#include "lfsampling.h"
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#include "lfzx.h"
#include "mifarecmd.h"
#include "mifaredesfire.h"
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#include "mifaresim.h"
#include "pcf7931.h"
#include "Standalone/standalone.h"
#include "util.h"
#include "ticks.h"
#include "commonutil.h"
#include "crc16.h"
#include "protocols.h"
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#include "mifareutil.h"
#include "sam_picopass.h"
#include "sam_seos.h"
#include "sam_mfc.h"
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#ifdef WITH_LCD
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#include "LCD_disabled.h"
#endif
#ifdef WITH_SMARTCARD
#include "i2c.h"
#endif
#ifdef WITH_FPC_USART
#include "usart.h"
#endif
#ifdef WITH_FLASH
#include "flashmem.h"
#include "spiffs.h"
#endif
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int g_dbglevel = DBG_ERROR;
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uint8_t g_trigger = 0;
bool g_hf_field_active = false;
extern uint32_t _stack_start[], _stack_end[];
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common_area_t g_common_area __attribute__((section(".commonarea")));
static int button_status = BUTTON_NO_CLICK;
static bool allow_send_wtx = false;
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uint16_t g_tearoff_delay_us = 0;
bool g_tearoff_enabled = false;
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int tearoff_hook(void) {
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if (g_tearoff_enabled) {
if (g_tearoff_delay_us == 0) {
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Dbprintf(_RED_("No tear-off delay configured!"));
return PM3_SUCCESS; // SUCCESS = the hook didn't do anything
}
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SpinDelayUsPrecision(g_tearoff_delay_us);
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FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF);
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g_tearoff_enabled = false;
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Dbprintf(_YELLOW_("Tear-off triggered!"));
return PM3_ETEAROFF;
} else {
return PM3_SUCCESS; // SUCCESS = the hook didn't do anything
}
}
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void hf_field_off(void) {
FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF);
LEDsoff();
g_hf_field_active = false;
}
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void send_wtx(uint16_t wtx) {
if (allow_send_wtx) {
reply_ng(CMD_WTX, PM3_SUCCESS, (uint8_t *)&wtx, sizeof(wtx));
}
}
//-----------------------------------------------------------------------------
// Read an ADC channel and block till it completes, then return the result
// in ADC units (0 to 1023). Also a routine to sum up a number of samples and
// return that.
//-----------------------------------------------------------------------------
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static uint16_t ReadAdc(uint8_t ch) {
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// Note: ADC_MODE_PRESCALE and ADC_MODE_SAMPLE_HOLD_TIME are set to the maximum allowed value.
// AMPL_HI is are high impedance (10MOhm || 1MOhm) output, the input capacitance of the ADC is 12pF (typical). This results in a time constant
// of RC = (0.91MOhm) * 12pF = 10.9us. Even after the maximum configurable sample&hold time of 40us the input capacitor will not be fully charged.
//
// The maths are:
// If there is a voltage v_in at the input, the voltage v_cap at the capacitor (this is what we are measuring) will be
//
// v_cap = v_in * (1 - exp(-SHTIM/RC)) = v_in * (1 - exp(-40us/10.9us)) = v_in * 0,97 (i.e. an error of 3%)
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AT91C_BASE_ADC->ADC_CR = AT91C_ADC_SWRST;
AT91C_BASE_ADC->ADC_MR =
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ADC_MODE_PRESCALE(63) // ADC_CLK = MCK / ((63+1) * 2) = 48MHz / 128 = 375kHz
| ADC_MODE_STARTUP_TIME(1) // Startup Time = (1+1) * 8 / ADC_CLK = 16 / 375kHz = 42,7us Note: must be > 20us
| ADC_MODE_SAMPLE_HOLD_TIME(15); // Sample & Hold Time SHTIM = 15 / ADC_CLK = 15 / 375kHz = 40us
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AT91C_BASE_ADC->ADC_CHER = ADC_CHANNEL(ch);
AT91C_BASE_ADC->ADC_CR = AT91C_ADC_START;
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while (!(AT91C_BASE_ADC->ADC_SR & ADC_END_OF_CONVERSION(ch))) {};
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return (AT91C_BASE_ADC->ADC_CDR[ch] & 0x3FF);
}
// was static - merlok
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uint16_t AvgAdc(uint8_t ch) {
return SumAdc(ch, 32) >> 5;
}
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uint16_t SumAdc(uint8_t ch, uint8_t NbSamples) {
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uint16_t a = 0;
for (uint8_t i = 0; i < NbSamples; i++)
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a += ReadAdc(ch);
return (a + (NbSamples >> 1) - 1);
}
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static void MeasureAntennaTuning(void) {
uint32_t peak = 0;
// in mVolt
struct p {
uint32_t v_lf134;
uint32_t v_lf125;
uint32_t v_lfconf;
uint32_t v_hf;
uint32_t peak_v;
uint32_t peak_f;
int divisor;
uint8_t results[256];
} PACKED payload;
// Need to clear all values to ensure non-random responses.
memset(&payload, 0, sizeof(payload));
// memset(payload.results, 0, sizeof(payload.results));
sample_config *sc = getSamplingConfig();
payload.divisor = sc->divisor;
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LED_B_ON();
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/*
* Sweeps the useful LF range of the proxmark from
* 46.8kHz (divisor=255) to 600kHz (divisor=19) and
* read the voltage in the antenna, the result left
* in the buffer is a graph which should clearly show
* the resonating frequency of your LF antenna
* ( hopefully around 95 if it is tuned to 125kHz!)
*/
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FpgaDownloadAndGo(FPGA_BITSTREAM_LF);
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FpgaWriteConfWord(FPGA_MAJOR_MODE_LF_READER | FPGA_LF_ADC_READER_FIELD);
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SpinDelay(50);
for (uint8_t i = 255; i >= 19; i--) {
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WDT_HIT();
FpgaSendCommand(FPGA_CMD_SET_DIVISOR, i);
SpinDelay(20);
uint32_t adcval = ((MAX_ADC_LF_VOLTAGE * (SumAdc(ADC_CHAN_LF, 32) >> 1)) >> 14);
if (i == LF_DIVISOR_125)
payload.v_lf125 = adcval; // voltage at 125kHz
if (i == LF_DIVISOR_134)
payload.v_lf134 = adcval; // voltage at 134kHz
if (i == sc->divisor)
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payload.v_lfconf = adcval; // voltage at `lf config --divisor`
payload.results[i] = adcval >> 9; // scale int to fit in byte for graphing purposes
if (payload.results[i] > peak) {
payload.peak_v = adcval;
payload.peak_f = i;
peak = payload.results[i];
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}
}
LED_A_ON();
// Let the FPGA drive the high-frequency antenna around 13.56 MHz.
FpgaDownloadAndGo(FPGA_BITSTREAM_HF);
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FpgaWriteConfWord(FPGA_MAJOR_MODE_HF_READER);
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SpinDelay(50);
payload.v_hf = (MAX_ADC_HF_VOLTAGE * SumAdc(ADC_CHAN_HF, 32)) >> 15;
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FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF);
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reply_ng(CMD_MEASURE_ANTENNA_TUNING, PM3_SUCCESS, (uint8_t *)&payload, sizeof(payload));
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LEDsoff();
}
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// Measure HF in milliVolt
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static uint16_t MeasureAntennaTuningHfData(void) {
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return (MAX_ADC_HF_VOLTAGE * SumAdc(ADC_CHAN_HF, 32)) >> 15;
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}
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// Measure LF in milliVolt
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static uint32_t MeasureAntennaTuningLfData(void) {
return (MAX_ADC_LF_VOLTAGE * (SumAdc(ADC_CHAN_LF, 32) >> 1)) >> 14;
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}
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void print_stack_usage(void) {
for (uint32_t *p = _stack_start; ; ++p) {
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if (*p != 0xdeadbeef) {
Dbprintf(" Max stack usage......... %d / %d bytes", (uint32_t)_stack_end - (uint32_t)p, (uint32_t)_stack_end - (uint32_t)_stack_start);
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break;
}
}
}
void ReadMem(int addr) {
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const uint8_t *data = ((uint8_t *)addr);
Dbprintf("%x: %02x %02x %02x %02x %02x %02x %02x %02x", addr, data[0], data[1], data[2], data[3], data[4], data[5], data[6], data[7]);
}
/* osimage version information is linked in, cf commonutil.h */
/* bootrom version information is pointed to from _bootphase1_version_pointer */
extern uint32_t _bootphase1_version_pointer[], _flash_start[], _flash_end[], __data_src_start__[];
#ifdef WITH_NO_COMPRESSION
extern uint32_t _bootrom_end[], _bootrom_start[], __os_size__[];
#endif
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static void SendVersion(void) {
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char temp[PM3_CMD_DATA_SIZE - 12]; /* Limited data payload in USB packets */
char VersionString[PM3_CMD_DATA_SIZE - 12] = { '\0' };
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/* Try to find the bootrom version information. Expect to find a pointer at
* symbol _bootphase1_version_pointer, perform slight sanity checks on the
* pointer, then use it.
*/
// dummy casting to avoid "dereferencing type-punned pointer breaking strict-aliasing rules" errors
uint32_t bootrom_version_ptr = (uint32_t)_bootphase1_version_pointer;
char *bootrom_version = *(char **)(bootrom_version_ptr);
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strncat(VersionString, " [ "_YELLOW_("ARM")" ]\n", sizeof(VersionString) - strlen(VersionString) - 1);
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if ((uint32_t)bootrom_version < (uint32_t)_flash_start || (uint32_t)bootrom_version >= (uint32_t)_flash_end) {
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strcat(VersionString, "bootrom version information appears invalid\n");
} else {
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FormatVersionInformation(temp, sizeof(temp), " bootrom: ", bootrom_version);
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strncat(VersionString, temp, sizeof(VersionString) - strlen(VersionString) - 1);
strncat(VersionString, "\n", sizeof(VersionString) - strlen(VersionString) - 1);
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}
FormatVersionInformation(temp, sizeof(temp), " os: ", &g_version_information);
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strncat(VersionString, temp, sizeof(VersionString) - strlen(VersionString) - 1);
strncat(VersionString, "\n", sizeof(VersionString) - strlen(VersionString) - 1);
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#if defined(__clang__)
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strncat(VersionString, " compiled with Clang/LLVM "__VERSION__"\n", sizeof(VersionString) - strlen(VersionString) - 1);
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#elif defined(__GNUC__) || defined(__GNUG__)
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strncat(VersionString, " compiled with GCC "__VERSION__"\n", sizeof(VersionString) - strlen(VersionString) - 1);
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#endif
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strncat(VersionString, "\n [ "_YELLOW_("FPGA")" ] \n ", sizeof(VersionString) - strlen(VersionString) - 1);
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for (int i = 0; i < g_fpga_bitstream_num; i++) {
strncat(VersionString, g_fpga_version_information[i], sizeof(VersionString) - strlen(VersionString) - 1);
if (i < g_fpga_bitstream_num - 1) {
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strncat(VersionString, "\n ", sizeof(VersionString) - strlen(VersionString) - 1);
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}
}
#ifndef WITH_NO_COMPRESSION
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// Send Chip ID and used flash memory
uint32_t text_and_rodata_section_size = (uint32_t)__data_src_start__ - (uint32_t)_flash_start;
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uint32_t compressed_data_section_size = g_common_area.arg1;
#endif
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struct p {
uint32_t id;
uint32_t section_size;
uint32_t versionstr_len;
char versionstr[PM3_CMD_DATA_SIZE - 12];
} PACKED;
struct p payload;
payload.id = *(AT91C_DBGU_CIDR);
#ifdef WITH_NO_COMPRESSION
payload.section_size = (uint32_t)_bootrom_end - (uint32_t)_bootrom_start + (uint32_t)__os_size__;
#else
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payload.section_size = text_and_rodata_section_size + compressed_data_section_size;
#endif
payload.versionstr_len = strlen(VersionString) + 1;
memcpy(payload.versionstr, VersionString, payload.versionstr_len);
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reply_ng(CMD_VERSION, PM3_SUCCESS, (uint8_t *)&payload, 12 + payload.versionstr_len);
}
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static void TimingIntervalAcquisition(void) {
// trigger new acquisition by turning main oscillator off and on
mck_from_pll_to_slck();
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mck_from_slck_to_pll();
// wait for MCFR and recompute RTMR scaler
StartTickCount();
}
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static void print_debug_level(void) {
char dbglvlstr[20] = {0};
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switch (g_dbglevel) {
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case DBG_NONE:
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sprintf(dbglvlstr, "off");
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break;
case DBG_ERROR:
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sprintf(dbglvlstr, "error");
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break;
case DBG_INFO:
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sprintf(dbglvlstr, "info");
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break;
case DBG_DEBUG:
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sprintf(dbglvlstr, "debug");
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break;
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case DBG_EXTENDED:
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sprintf(dbglvlstr, "extended");
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break;
}
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Dbprintf(" Debug log level......... %d ( " _YELLOW_("%s")" )", g_dbglevel, dbglvlstr);
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}
// measure the Connection Speed by sending SpeedTestBufferSize bytes to client and measuring the elapsed time.
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// Note: this mimics GetFromBigbuf(), i.e. we have the overhead of the PacketCommandNG structure included.
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static void printConnSpeed(uint32_t wait) {
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DbpString(_CYAN_("Transfer Speed"));
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Dbprintf(" Sending packets to client...");
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uint8_t *test_data = BigBuf_get_addr();
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uint32_t start_time = GetTickCount();
uint32_t delta_time = 0;
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uint32_t bytes_transferred = 0;
LED_B_ON();
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while (delta_time < wait) {
reply_ng(CMD_DOWNLOADED_BIGBUF, PM3_SUCCESS, test_data, PM3_CMD_DATA_SIZE);
bytes_transferred += PM3_CMD_DATA_SIZE;
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delta_time = GetTickCountDelta(start_time);
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}
LED_B_OFF();
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Dbprintf(" Time elapsed................... %dms", delta_time);
Dbprintf(" Bytes transferred.............. %d", bytes_transferred);
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if (delta_time) {
Dbprintf(" Transfer Speed PM3 -> Client... " _YELLOW_("%llu") " bytes/s", 1000 * (uint64_t)bytes_transferred / delta_time);
}
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}
/**
* Prints runtime information about the PM3.
**/
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static void SendStatus(uint32_t wait) {
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BigBuf_print_status();
Fpga_print_status();
#ifdef WITH_FLASH
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Flashmem_print_status();
#endif
#ifdef WITH_SMARTCARD
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I2C_print_status();
#endif
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#ifdef WITH_LF
printLFConfig(); // LF Sampling config
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printT55xxConfig(); // LF T55XX Config
#endif
#ifdef WITH_ISO14443a
printHf14aConfig(); // HF 14a config
#endif
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printConnSpeed(wait);
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DbpString(_CYAN_("Various"));
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print_stack_usage();
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print_debug_level();
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tosend_t *ts = get_tosend();
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Dbprintf(" ToSendMax............... %d", ts->max);
Dbprintf(" ToSend BUFFERSIZE....... %d", TOSEND_BUFFER_SIZE);
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while ((AT91C_BASE_PMC->PMC_MCFR & AT91C_CKGR_MAINRDY) == 0); // Wait for MAINF value to become available...
uint16_t mainf = AT91C_BASE_PMC->PMC_MCFR & AT91C_CKGR_MAINF; // Get # main clocks within 16 slow clocks
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Dbprintf(" Slow clock.............. %d Hz", (16 * MAINCK) / mainf);
uint32_t delta_time = 0;
uint32_t start_time = GetTickCount();
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#define SLCK_CHECK_MS 50
SpinDelay(SLCK_CHECK_MS);
delta_time = GetTickCountDelta(start_time);
if ((delta_time < SLCK_CHECK_MS - 1) || (delta_time > SLCK_CHECK_MS + 1)) {
// error > 2% with SLCK_CHECK_MS=50
Dbprintf(_RED_(" Slow Clock speed change detected, run `hw tia`"));
Dbprintf(_YELLOW_(" Slow Clock actual speed seems closer to %d kHz"),
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(16 * MAINCK / 1000) / mainf * delta_time / SLCK_CHECK_MS);
}
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DbpString(_CYAN_("Installed StandAlone Mode"));
ModInfo();
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#ifdef WITH_FLASH
Flashmem_print_info();
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#endif
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DbpString("");
reply_ng(CMD_STATUS, PM3_SUCCESS, NULL, 0);
}
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static void SendCapabilities(void) {
capabilities_t capabilities;
capabilities.version = CAPABILITIES_VERSION;
capabilities.via_fpc = g_reply_via_fpc;
capabilities.via_usb = g_reply_via_usb;
capabilities.bigbuf_size = BigBuf_get_size();
capabilities.baudrate = 0; // no real baudrate for USB-CDC
#ifdef WITH_FPC_USART
if (g_reply_via_fpc)
capabilities.baudrate = g_usart_baudrate;
#endif
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#ifdef RDV4
capabilities.is_rdv4 = true;
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#else
capabilities.is_rdv4 = false;
#endif
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#ifdef WITH_FLASH
capabilities.compiled_with_flash = true;
capabilities.hw_available_flash = FlashInit();
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#else
capabilities.compiled_with_flash = false;
capabilities.hw_available_flash = false;
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#endif
#ifdef WITH_SMARTCARD
capabilities.compiled_with_smartcard = true;
uint8_t maj, min;
capabilities.hw_available_smartcard = I2C_get_version(&maj, &min) == PM3_SUCCESS;
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#else
capabilities.compiled_with_smartcard = false;
capabilities.hw_available_smartcard = false;
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#endif
#ifdef WITH_FPC_USART
capabilities.compiled_with_fpc_usart = true;
#else
capabilities.compiled_with_fpc_usart = false;
#endif
#ifdef WITH_FPC_USART_DEV
capabilities.compiled_with_fpc_usart_dev = true;
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#else
capabilities.compiled_with_fpc_usart_dev = false;
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#endif
#ifdef WITH_FPC_USART_HOST
capabilities.compiled_with_fpc_usart_host = true;
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#else
capabilities.compiled_with_fpc_usart_host = false;
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#endif
#ifdef WITH_LF
capabilities.compiled_with_lf = true;
#else
capabilities.compiled_with_lf = false;
#endif
#ifdef WITH_HITAG
capabilities.compiled_with_hitag = true;
#else
capabilities.compiled_with_hitag = false;
#endif
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#ifdef WITH_EM4x50
capabilities.compiled_with_em4x50 = true;
#else
capabilities.compiled_with_em4x50 = false;
#endif
#ifdef WITH_EM4x70
capabilities.compiled_with_em4x70 = true;
#else
capabilities.compiled_with_em4x70 = false;
#endif
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#ifdef WITH_HFSNIFF
capabilities.compiled_with_hfsniff = true;
#else
capabilities.compiled_with_hfsniff = false;
#endif
#ifdef WITH_HFPLOT
capabilities.compiled_with_hfplot = true;
#else
capabilities.compiled_with_hfplot = false;
#endif
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#ifdef WITH_ISO14443a
capabilities.compiled_with_iso14443a = true;
#else
capabilities.compiled_with_iso14443a = false;
#endif
#ifdef WITH_ISO14443b
capabilities.compiled_with_iso14443b = true;
#else
capabilities.compiled_with_iso14443b = false;
#endif
#ifdef WITH_ISO15693
capabilities.compiled_with_iso15693 = true;
#else
capabilities.compiled_with_iso15693 = false;
#endif
#ifdef WITH_FELICA
capabilities.compiled_with_felica = true;
#else
capabilities.compiled_with_felica = false;
#endif
#ifdef WITH_LEGICRF
capabilities.compiled_with_legicrf = true;
#else
capabilities.compiled_with_legicrf = false;
#endif
#ifdef WITH_ICLASS
capabilities.compiled_with_iclass = true;
#else
capabilities.compiled_with_iclass = false;
#endif
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#ifdef WITH_NFCBARCODE
capabilities.compiled_with_nfcbarcode = true;
#else
capabilities.compiled_with_nfcbarcode = false;
#endif
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#ifdef WITH_LCD
capabilities.compiled_with_lcd = true;
#else
capabilities.compiled_with_lcd = false;
#endif
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#ifdef WITH_ZX8211
capabilities.compiled_with_zx8211 = true;
#else
capabilities.compiled_with_zx8211 = false;
#endif
reply_ng(CMD_CAPABILITIES, PM3_SUCCESS, (uint8_t *)&capabilities, sizeof(capabilities));
}
// Show some leds in a pattern to identify StandAlone mod is running
void StandAloneMode(void) {
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DbpString("");
DbpString("Stand-alone mode, no computer necessary");
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SpinDown(50);
SpinDelay(50);
SpinUp(50);
SpinDelay(50);
SpinDown(50);
}
/*
OBJECTIVE
Listen and detect an external reader. Determine the best location
for the antenna.
INSTRUCTIONS:
Inside the ListenReaderField() function, there is two mode.
By default, when you call the function, you will enter mode 1.
If you press the PM3 button one time, you will enter mode 2.
If you press the PM3 button a second time, you will exit the function.
DESCRIPTION OF MODE 1:
This mode just listens for an external reader field and lights up green
for HF and/or red for LF. This is the original mode of the detectreader
function.
DESCRIPTION OF MODE 2:
This mode will visually represent, using the LEDs, the actual strength of the
current compared to the maximum current detected. Basically, once you know
what kind of external reader is present, it will help you spot the best location to place
your antenna. You will probably not get some good results if there is a LF and a HF reader
at the same place! :-)
*/
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#define LIGHT_LEVELS 20
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void ListenReaderField(uint8_t limit) {
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#define LF_ONLY 1
#define HF_ONLY 2
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#define REPORT_CHANGE 1000 // report new values only if they have changed at least by REPORT_CHANGE mV
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uint16_t lf_av = 0, lf_av_new, lf_baseline = 0, lf_max = 0;
uint16_t hf_av = 0, hf_av_new, hf_baseline = 0, hf_max = 0;
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uint16_t mode = 1, display_val, display_max;
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// switch off FPGA - we don't want to measure our own signal
// 20180315 - iceman, why load this before and then turn off?
FpgaDownloadAndGo(FPGA_BITSTREAM_HF);
FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF);
LEDsoff();
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if (limit == LF_ONLY) {
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lf_av = lf_max = (MAX_ADC_LF_VOLTAGE * SumAdc(ADC_CHAN_LF, 32)) >> 15;
Dbprintf("LF 125/134kHz Baseline: %dmV", lf_av);
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lf_baseline = lf_av;
}
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if (limit == HF_ONLY) {
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// iceman, useless, since we are measuring readerfield, not our field. My tests shows a max of 20v from a reader.
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hf_av = hf_max = (MAX_ADC_HF_VOLTAGE * SumAdc(ADC_CHAN_HF, 32)) >> 15;
Dbprintf("HF 13.56MHz Baseline: %dmV", hf_av);
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hf_baseline = hf_av;
}
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for (;;) {
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// Switch modes with button
if (BUTTON_PRESS()) {
SpinDelay(500);
switch (mode) {
case 1:
mode = 2;
DbpString("Signal Strength Mode");
break;
case 2:
default:
DbpString("Stopped");
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FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF);
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LEDsoff();
return;
}
}
WDT_HIT();
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if (limit == LF_ONLY) {
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if (mode == 1) {
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if (ABS(lf_av - lf_baseline) > REPORT_CHANGE)
LED_D_ON();
else
LED_D_OFF();
}
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lf_av_new = (MAX_ADC_LF_VOLTAGE * SumAdc(ADC_CHAN_LF, 32)) >> 15;
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// see if there's a significant change
if (ABS(lf_av - lf_av_new) > REPORT_CHANGE) {
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Dbprintf("LF 125/134kHz Field Change: %5dmV", lf_av_new);
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lf_av = lf_av_new;
if (lf_av > lf_max)
lf_max = lf_av;
}
}
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if (limit == HF_ONLY) {
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if (mode == 1) {
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if (ABS(hf_av - hf_baseline) > REPORT_CHANGE)
LED_B_ON();
else
LED_B_OFF();
}
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hf_av_new = (MAX_ADC_HF_VOLTAGE * SumAdc(ADC_CHAN_HF, 32)) >> 15;
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// see if there's a significant change
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if (ABS(hf_av - hf_av_new) > REPORT_CHANGE) {
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Dbprintf("HF 13.56MHz Field Change: %5dmV", hf_av_new);
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hf_av = hf_av_new;
if (hf_av > hf_max)
hf_max = hf_av;
}
}
if (mode == 2) {
if (limit == LF_ONLY) {
display_val = lf_av;
display_max = lf_max;
} else if (limit == HF_ONLY) {
display_val = hf_av;
display_max = hf_max;
} else { /* Pick one at random */
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if ((hf_max - hf_baseline) > (lf_max - lf_baseline)) {
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display_val = hf_av;
display_max = hf_max;
} else {
display_val = lf_av;
display_max = lf_max;
}
}
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display_val = display_val * (4 * LIGHT_LEVELS) / MAX(1, display_max);
uint32_t duty_a = MIN(MAX(display_val, 0 * LIGHT_LEVELS), 1 * LIGHT_LEVELS) - 0 * LIGHT_LEVELS;
uint32_t duty_b = MIN(MAX(display_val, 1 * LIGHT_LEVELS), 2 * LIGHT_LEVELS) - 1 * LIGHT_LEVELS;
uint32_t duty_c = MIN(MAX(display_val, 2 * LIGHT_LEVELS), 3 * LIGHT_LEVELS) - 2 * LIGHT_LEVELS;
uint32_t duty_d = MIN(MAX(display_val, 3 * LIGHT_LEVELS), 4 * LIGHT_LEVELS) - 3 * LIGHT_LEVELS;
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// LED A
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if (duty_a == 0) {
LED_A_OFF();
} else if (duty_a == LIGHT_LEVELS) {
LED_A_ON();
} else {
LED_A_ON();
SpinDelay(duty_a);
LED_A_OFF();
SpinDelay(LIGHT_LEVELS - duty_a);
}
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// LED B
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if (duty_b == 0) {
LED_B_OFF();
} else if (duty_b == LIGHT_LEVELS) {
LED_B_ON();
} else {
LED_B_ON();
SpinDelay(duty_b);
LED_B_OFF();
SpinDelay(LIGHT_LEVELS - duty_b);
}
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// LED C
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if (duty_c == 0) {
LED_C_OFF();
} else if (duty_c == LIGHT_LEVELS) {
LED_C_ON();
} else {
LED_C_ON();
SpinDelay(duty_c);
LED_C_OFF();
SpinDelay(LIGHT_LEVELS - duty_c);
}
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// LED D
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if (duty_d == 0) {
LED_D_OFF();
} else if (duty_d == LIGHT_LEVELS) {
LED_D_ON();
} else {
LED_D_ON();
SpinDelay(duty_d);
LED_D_OFF();
SpinDelay(LIGHT_LEVELS - duty_d);
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}
}
}
}
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static void PacketReceived(PacketCommandNG *packet) {
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/*
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if (packet->ng) {
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Dbprintf("received NG frame with %d bytes payload, with command: 0x%04x", packet->length, cmd);
} else {
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Dbprintf("received OLD frame of %d bytes, with command: 0x%04x and args: %d %d %d", packet->length, packet->cmd, packet->oldarg[0], packet->oldarg[1], packet->oldarg[2]);
}
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*/
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switch (packet->cmd) {
case CMD_BREAK_LOOP:
break;
case CMD_QUIT_SESSION: {
g_reply_via_fpc = false;
g_reply_via_usb = false;
break;
}
case CMD_SET_FPGAMODE: {
uint8_t mode = packet->data.asBytes[0];
if (mode >= FPGA_BITSTREAM_LF && mode <= FPGA_BITSTREAM_HF_15) {
FpgaDownloadAndGo(mode);
reply_ng(CMD_SET_FPGAMODE, PM3_SUCCESS, NULL, 0);
}
reply_ng(CMD_SET_FPGAMODE, PM3_EINVARG, NULL, 0);
break;
}
// emulator
case CMD_SET_DBGMODE: {
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g_dbglevel = packet->data.asBytes[0];
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if (packet->length == 1 || packet->data.asBytes[1] != 0)
print_debug_level();
reply_ng(CMD_SET_DBGMODE, PM3_SUCCESS, NULL, 0);
break;
}
case CMD_GET_DBGMODE: {
reply_ng(CMD_GET_DBGMODE, PM3_SUCCESS, (uint8_t *)&g_dbglevel, 1);
break;
}
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case CMD_SET_TEAROFF: {
struct p {
uint16_t delay_us;
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bool on;
bool off;
} PACKED;
struct p *payload = (struct p *)packet->data.asBytes;
if (payload->on && payload->off) {
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reply_ng(CMD_SET_TEAROFF, PM3_EINVARG, NULL, 0);
}
if (payload->on) {
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g_tearoff_enabled = true;
}
if (payload->off) {
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g_tearoff_enabled = false;
}
if (payload->delay_us > 0) {
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g_tearoff_delay_us = payload->delay_us;
}
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reply_ng(CMD_SET_TEAROFF, PM3_SUCCESS, NULL, 0);
break;
}
// always available
case CMD_HF_DROPFIELD: {
hf_field_off();
break;
}
#ifdef WITH_LF
case CMD_LF_T55XX_SET_CONFIG: {
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setT55xxConfig(packet->oldarg[0], (t55xx_configurations_t *) packet->data.asBytes);
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break;
}
case CMD_LF_SAMPLING_PRINT_CONFIG: {
printLFConfig();
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break;
}
case CMD_LF_SAMPLING_GET_CONFIG: {
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sample_config *config = getSamplingConfig();
reply_ng(CMD_LF_SAMPLING_GET_CONFIG, PM3_SUCCESS, (uint8_t *)config, sizeof(sample_config));
break;
}
case CMD_LF_SAMPLING_SET_CONFIG: {
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sample_config c;
memcpy(&c, packet->data.asBytes, sizeof(sample_config));
setSamplingConfig(&c);
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break;
}
case CMD_LF_ACQ_RAW_ADC: {
lf_sample_payload_t *payload = (lf_sample_payload_t *)packet->data.asBytes;
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if (payload->realtime) {
ReadLF_realtime(true);
} else {
uint32_t bits = SampleLF(payload->verbose, payload->samples, true);
reply_ng(CMD_LF_ACQ_RAW_ADC, PM3_SUCCESS, (uint8_t *)&bits, sizeof(bits));
}
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break;
}
case CMD_LF_MOD_THEN_ACQ_RAW_ADC: {
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struct p {
uint32_t delay;
uint16_t period_0;
uint16_t period_1;
uint8_t symbol_extra[LF_CMDREAD_MAX_EXTRA_SYMBOLS];
uint16_t period_extra[LF_CMDREAD_MAX_EXTRA_SYMBOLS];
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uint32_t samples : 30;
bool keep : 1;
bool verbose : 1;
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} PACKED;
struct p *payload = (struct p *)packet->data.asBytes;
uint8_t symbol_extra[LF_CMDREAD_MAX_EXTRA_SYMBOLS];
uint16_t period_extra[LF_CMDREAD_MAX_EXTRA_SYMBOLS];
memcpy(symbol_extra, payload->symbol_extra, sizeof(symbol_extra));
memcpy(period_extra, payload->period_extra, sizeof(period_extra));
2021-12-18 07:42:06 +08:00
ModThenAcquireRawAdcSamples125k(payload->delay, payload->period_0, payload->period_1, symbol_extra, period_extra, packet->data.asBytes + sizeof(struct p), payload->verbose, payload->keep, payload->samples, true);
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break;
}
case CMD_LF_SNIFF_RAW_ADC: {
lf_sample_payload_t *payload = (lf_sample_payload_t *)packet->data.asBytes;
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if (payload->realtime) {
ReadLF_realtime(false);
} else {
uint32_t bits = SniffLF(payload->verbose, payload->samples, true);
reply_ng(CMD_LF_SNIFF_RAW_ADC, PM3_SUCCESS, (uint8_t *)&bits, sizeof(bits));
}
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break;
}
case CMD_LF_HID_WATCH: {
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uint32_t high, low;
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int res = lf_hid_watch(0, &high, &low, true);
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reply_ng(CMD_LF_HID_WATCH, res, NULL, 0);
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break;
}
case CMD_LF_HID_SIMULATE: {
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lf_hidsim_t *payload = (lf_hidsim_t *)packet->data.asBytes;
CmdHIDsimTAG(payload->hi2, payload->hi, payload->lo, payload->longFMT, 1);
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break;
}
case CMD_LF_FSK_SIMULATE: {
lf_fsksim_t *payload = (lf_fsksim_t *)packet->data.asBytes;
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CmdFSKsimTAG(payload->fchigh, payload->fclow, payload->separator, payload->clock, packet->length - sizeof(lf_fsksim_t), payload->data, true);
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break;
}
case CMD_LF_ASK_SIMULATE: {
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lf_asksim_t *payload = (lf_asksim_t *)packet->data.asBytes;
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CmdASKsimTAG(payload->encoding, payload->invert, payload->separator, payload->clock, packet->length - sizeof(lf_asksim_t), payload->data, true);
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break;
}
case CMD_LF_PSK_SIMULATE: {
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lf_psksim_t *payload = (lf_psksim_t *)packet->data.asBytes;
CmdPSKsimTAG(payload->carrier, payload->invert, payload->clock, packet->length - sizeof(lf_psksim_t), payload->data, true);
break;
}
case CMD_LF_NRZ_SIMULATE: {
lf_nrzsim_t *payload = (lf_nrzsim_t *)packet->data.asBytes;
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CmdNRZsimTAG(payload->invert, payload->separator, payload->clock, packet->length - sizeof(lf_nrzsim_t), payload->data, true);
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break;
}
case CMD_LF_HID_CLONE: {
lf_hidsim_t *payload = (lf_hidsim_t *)packet->data.asBytes;
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CopyHIDtoT55x7(payload->hi2, payload->hi, payload->lo, payload->longFMT, payload->Q5, payload->EM, true);
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break;
}
case CMD_LF_IO_WATCH: {
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uint32_t high, low;
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int res = lf_io_watch(0, &high, &low, true);
reply_ng(CMD_LF_IO_WATCH, res, NULL, 0);
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break;
}
case CMD_LF_EM410X_WATCH: {
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uint32_t high;
uint64_t low;
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int res = lf_em410x_watch(0, &high, &low, true);
reply_ng(CMD_LF_EM410X_WATCH, res, NULL, 0);
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break;
}
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case CMD_LF_EM410X_CLONE: {
struct p {
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bool Q5;
bool EM;
uint8_t clock;
uint32_t high;
uint32_t low;
} PACKED;
struct p *payload = (struct p *)packet->data.asBytes;
2022-04-29 22:32:01 +08:00
uint8_t card = payload->Q5 ? 0 : (payload->EM ? 2 : 1);
int res = copy_em410x_to_t55xx(card, payload->clock, payload->high, payload->low, true);
reply_ng(CMD_LF_EM410X_CLONE, res, NULL, 0);
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break;
}
case CMD_LF_TI_READ: {
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ReadTItag(true);
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break;
}
case CMD_LF_TI_WRITE: {
struct p {
uint32_t high;
uint32_t low;
uint16_t crc;
} PACKED;
struct p *payload = (struct p *)packet->data.asBytes;
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WriteTItag(payload->high, payload->low, packet->crc, true);
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break;
}
case CMD_LF_SIMULATE: {
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LED_A_ON();
struct p {
uint16_t len;
uint16_t gap;
} PACKED;
struct p *payload = (struct p *)packet->data.asBytes;
// length, start gap, led control
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SimulateTagLowFrequency(payload->len, payload->gap, true);
reply_ng(CMD_LF_SIMULATE, PM3_EOPABORTED, NULL, 0);
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LED_A_OFF();
break;
}
case CMD_LF_SIMULATE_BIDIR: {
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SimulateTagLowFrequencyBidir(packet->oldarg[0], packet->oldarg[1]);
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break;
}
case CMD_LF_T55XX_READBL: {
struct p {
uint32_t password;
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uint8_t blockno;
uint8_t page;
bool pwdmode;
uint8_t downlink_mode;
} PACKED;
struct p *payload = (struct p *) packet->data.asBytes;
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T55xxReadBlock(payload->page, payload->pwdmode, false, payload->blockno, payload->password, payload->downlink_mode, true);
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break;
}
case CMD_LF_T55XX_WRITEBL: {
// uses NG format
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T55xxWriteBlock(packet->data.asBytes, true);
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break;
}
2019-10-09 19:03:23 +08:00
case CMD_LF_T55XX_DANGERRAW: {
2021-11-18 21:26:41 +08:00
T55xxDangerousRawTest(packet->data.asBytes, true);
2019-10-09 19:03:23 +08:00
break;
}
case CMD_LF_T55XX_WAKEUP: {
struct p {
uint32_t password;
uint8_t flags;
} PACKED;
struct p *payload = (struct p *) packet->data.asBytes;
2021-11-18 21:26:41 +08:00
T55xxWakeUp(payload->password, payload->flags, true);
2019-07-24 05:43:30 +08:00
break;
}
case CMD_LF_T55XX_RESET_READ: {
2021-11-18 21:26:41 +08:00
T55xxResetRead(packet->data.asBytes[0] & 0xff, true);
2019-03-10 03:34:41 +08:00
break;
}
case CMD_LF_T55XX_CHK_PWDS: {
2021-11-18 21:26:41 +08:00
T55xx_ChkPwds(packet->data.asBytes[0] & 0xff, true);
2019-03-10 03:34:41 +08:00
break;
}
case CMD_LF_PCF7931_READ: {
2021-11-18 21:26:41 +08:00
ReadPCF7931(true);
2019-03-10 03:34:41 +08:00
break;
}
case CMD_LF_PCF7931_WRITE: {
2019-03-10 03:34:41 +08:00
WritePCF7931(
2019-04-18 06:12:52 +08:00
packet->data.asBytes[0], packet->data.asBytes[1], packet->data.asBytes[2], packet->data.asBytes[3],
packet->data.asBytes[4], packet->data.asBytes[5], packet->data.asBytes[6], packet->data.asBytes[9],
packet->data.asBytes[7] - 128, packet->data.asBytes[8] - 128,
packet->oldarg[0],
packet->oldarg[1],
2021-11-18 21:26:41 +08:00
packet->oldarg[2],
true
2019-03-10 07:00:59 +08:00
);
2019-03-10 03:34:41 +08:00
break;
}
2020-10-19 05:46:36 +08:00
case CMD_LF_EM4X_LOGIN: {
struct p {
uint32_t password;
} PACKED;
struct p *payload = (struct p *) packet->data.asBytes;
2021-11-18 21:26:41 +08:00
EM4xLogin(payload->password, true);
2020-10-19 05:46:36 +08:00
break;
}
2020-10-20 19:18:43 +08:00
case CMD_LF_EM4X_BF: {
struct p {
uint32_t start_pwd;
uint32_t n;
} PACKED;
struct p *payload = (struct p *) packet->data.asBytes;
2021-11-18 21:26:41 +08:00
EM4xBruteforce(payload->start_pwd, payload->n, true);
2020-10-20 19:18:43 +08:00
break;
}
case CMD_LF_EM4X_READWORD: {
struct p {
uint32_t password;
uint8_t address;
uint8_t usepwd;
} PACKED;
struct p *payload = (struct p *) packet->data.asBytes;
2021-11-18 21:26:41 +08:00
EM4xReadWord(payload->address, payload->password, payload->usepwd, true);
2019-03-10 03:34:41 +08:00
break;
}
case CMD_LF_EM4X_WRITEWORD: {
struct p {
uint32_t password;
uint32_t data;
uint8_t address;
uint8_t usepwd;
} PACKED;
struct p *payload = (struct p *) packet->data.asBytes;
2021-11-18 21:26:41 +08:00
EM4xWriteWord(payload->address, payload->data, payload->password, payload->usepwd, true);
2019-03-10 03:34:41 +08:00
break;
}
case CMD_LF_EM4X_PROTECTWORD: {
struct p {
uint32_t password;
uint32_t data;
uint8_t usepwd;
} PACKED;
struct p *payload = (struct p *) packet->data.asBytes;
2021-11-18 21:26:41 +08:00
EM4xProtectWord(payload->data, payload->password, payload->usepwd, true);
break;
}
case CMD_LF_AWID_WATCH: {
2019-03-10 03:34:41 +08:00
uint32_t high, low;
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int res = lf_awid_watch(0, &high, &low, true);
reply_ng(CMD_LF_AWID_WATCH, res, NULL, 0);
2019-03-10 03:34:41 +08:00
break;
}
case CMD_LF_VIKING_CLONE: {
2019-09-15 01:58:17 +08:00
struct p {
bool Q5;
bool EM;
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uint8_t blocks[8];
} PACKED;
struct p *payload = (struct p *)packet->data.asBytes;
2021-11-18 21:26:41 +08:00
CopyVikingtoT55xx(payload->blocks, payload->Q5, payload->EM, true);
2019-03-10 03:34:41 +08:00
break;
}
case CMD_LF_COTAG_READ: {
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struct p {
uint8_t mode;
} PACKED;
struct p *payload = (struct p *)packet->data.asBytes;
2021-11-18 21:26:41 +08:00
Cotag(payload->mode, true);
break;
}
#endif
#ifdef WITH_HITAG
case CMD_LF_HITAG_SNIFF: { // Eavesdrop Hitag tag, args = type
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SniffHitag2(true);
// SniffHitag2(packet->oldarg[0]);
2020-07-20 02:45:47 +08:00
reply_ng(CMD_LF_HITAG_SNIFF, PM3_SUCCESS, NULL, 0);
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break;
}
case CMD_LF_HITAG_SIMULATE: { // Simulate Hitag tag, args = memory content
2021-11-18 21:26:41 +08:00
SimulateHitag2(true);
2019-03-10 03:34:41 +08:00
break;
}
case CMD_LF_HITAG_READER: { // Reader for Hitag tags, args = type and function
2021-11-18 21:26:41 +08:00
ReaderHitag((hitag_function)packet->oldarg[0], (hitag_data *)packet->data.asBytes, true);
2019-03-10 03:34:41 +08:00
break;
}
case CMD_LF_HITAGS_SIMULATE: { // Simulate Hitag s tag, args = memory content
2021-11-18 21:26:41 +08:00
SimulateHitagSTag((bool)packet->oldarg[0], packet->data.asBytes, true);
2019-03-10 03:34:41 +08:00
break;
}
case CMD_LF_HITAGS_TEST_TRACES: { // Tests every challenge within the given file
Hitag_check_challenges(packet->data.asBytes, packet->oldarg[0], true);
2019-03-10 03:34:41 +08:00
break;
}
case CMD_LF_HITAGS_READ: { //Reader for only Hitag S tags, args = key or challenge
2021-11-18 21:26:41 +08:00
ReadHitagS((hitag_function)packet->oldarg[0], (hitag_data *)packet->data.asBytes, true);
2019-03-10 03:34:41 +08:00
break;
}
case CMD_LF_HITAGS_WRITE: { //writer for Hitag tags args=data to write,page and key or challenge
2019-04-18 06:12:52 +08:00
if ((hitag_function)packet->oldarg[0] < 10) {
2021-11-18 21:26:41 +08:00
WritePageHitagS((hitag_function)packet->oldarg[0], (hitag_data *)packet->data.asBytes, packet->oldarg[2], true);
2019-03-13 05:52:15 +08:00
} else {
2021-11-18 21:26:41 +08:00
WriterHitag((hitag_function)packet->oldarg[0], (hitag_data *)packet->data.asBytes, packet->oldarg[2], true);
2019-03-10 03:34:41 +08:00
}
break;
}
2021-04-08 16:44:31 +08:00
case CMD_LF_HITAG_ELOAD: {
lf_hitag_t *payload = (lf_hitag_t *) packet->data.asBytes;
2021-04-04 23:06:48 +08:00
uint8_t *mem = BigBuf_get_EM_addr();
memcpy((uint8_t *)mem, payload->data, payload->len);
2021-04-04 23:06:48 +08:00
break;
}
#endif
2020-06-15 20:32:34 +08:00
#ifdef WITH_EM4x50
case CMD_LF_EM4X50_INFO: {
2023-08-09 14:03:34 +08:00
em4x50_info((const em4x50_data_t *)packet->data.asBytes, true);
2020-06-15 20:32:34 +08:00
break;
}
case CMD_LF_EM4X50_WRITE: {
2023-08-09 14:03:34 +08:00
em4x50_write((const em4x50_data_t *)packet->data.asBytes, true);
break;
}
case CMD_LF_EM4X50_WRITEPWD: {
2023-08-09 14:03:34 +08:00
em4x50_writepwd((const em4x50_data_t *)packet->data.asBytes, true);
break;
}
2020-06-29 03:37:53 +08:00
case CMD_LF_EM4X50_READ: {
2023-08-09 14:03:34 +08:00
em4x50_read((const em4x50_data_t *)packet->data.asBytes, true);
2020-06-26 20:20:08 +08:00
break;
}
2020-09-27 19:42:27 +08:00
case CMD_LF_EM4X50_BRUTE: {
2023-08-09 14:03:34 +08:00
em4x50_brute((const em4x50_data_t *)packet->data.asBytes, true);
break;
}
2020-09-28 05:22:51 +08:00
case CMD_LF_EM4X50_LOGIN: {
2023-08-09 14:03:34 +08:00
em4x50_login((const uint32_t *)packet->data.asBytes, true);
2020-09-28 05:22:51 +08:00
break;
}
2020-10-27 05:10:48 +08:00
case CMD_LF_EM4X50_SIM: {
//-----------------------------------------------------------------------------
// Note: we call FpgaDownloadAndGo(FPGA_BITSTREAM_LF) here although FPGA is not
// involved in dealing with emulator memory. But if it is called later, it might
// destroy the Emulator Memory.
//-----------------------------------------------------------------------------
FpgaDownloadAndGo(FPGA_BITSTREAM_LF);
2023-08-09 14:03:34 +08:00
em4x50_sim((const uint32_t *)packet->data.asBytes, true);
2020-10-27 05:10:48 +08:00
break;
}
2020-11-30 06:57:55 +08:00
case CMD_LF_EM4X50_READER: {
2021-11-18 21:26:41 +08:00
em4x50_reader(true);
2020-10-28 01:18:02 +08:00
break;
}
case CMD_LF_EM4X50_ESET: {
//-----------------------------------------------------------------------------
// Note: we call FpgaDownloadAndGo(FPGA_BITSTREAM_LF) here although FPGA is not
// involved in dealing with emulator memory. But if it is called later, it might
// destroy the Emulator Memory.
//-----------------------------------------------------------------------------
FpgaDownloadAndGo(FPGA_BITSTREAM_LF);
emlSet(packet->data.asBytes, packet->oldarg[0], packet->oldarg[1]);
break;
}
case CMD_LF_EM4X50_CHK: {
//-----------------------------------------------------------------------------
// Note: we call FpgaDownloadAndGo(FPGA_BITSTREAM_LF) here although FPGA is not
// involved in dealing with emulator memory. But if it is called later, it might
// destroy the Emulator Memory.
//-----------------------------------------------------------------------------
FpgaDownloadAndGo(FPGA_BITSTREAM_LF);
2023-08-09 14:03:34 +08:00
em4x50_chk((const char *)packet->data.asBytes, true);
2020-07-09 07:59:01 +08:00
break;
}
#endif
#ifdef WITH_EM4x70
case CMD_LF_EM4X70_INFO: {
2021-11-18 21:26:41 +08:00
em4x70_info((em4x70_data_t *)packet->data.asBytes, true);
break;
}
2020-12-12 12:26:17 +08:00
case CMD_LF_EM4X70_WRITE: {
2021-11-18 21:26:41 +08:00
em4x70_write((em4x70_data_t *)packet->data.asBytes, true);
2020-12-12 12:26:17 +08:00
break;
}
case CMD_LF_EM4X70_UNLOCK: {
2021-11-18 21:26:41 +08:00
em4x70_unlock((em4x70_data_t *)packet->data.asBytes, true);
break;
}
2020-12-12 22:59:30 +08:00
case CMD_LF_EM4X70_AUTH: {
2021-11-18 21:26:41 +08:00
em4x70_auth((em4x70_data_t *)packet->data.asBytes, true);
2020-12-12 22:59:30 +08:00
break;
}
case CMD_LF_EM4X70_WRITEPIN: {
2021-11-18 21:26:41 +08:00
em4x70_write_pin((em4x70_data_t *)packet->data.asBytes, true);
break;
}
case CMD_LF_EM4X70_WRITEKEY: {
2021-11-18 21:26:41 +08:00
em4x70_write_key((em4x70_data_t *)packet->data.asBytes, true);
break;
}
case CMD_LF_EM4X70_BRUTE: {
em4x70_brute((em4x70_data_t *)packet->data.asBytes, true);
break;
}
2020-06-15 20:32:34 +08:00
#endif
2021-12-24 20:32:28 +08:00
#ifdef WITH_ZX8211
case CMD_LF_ZX_READ: {
zx8211_read((zx8211_data_t *)packet->data.asBytes, true);
break;
}
case CMD_LF_ZX_WRITE: {
zx8211_write((zx8211_data_t *)packet->data.asBytes, true);
break;
}
#endif
#ifdef WITH_ISO15693
case CMD_HF_ISO15693_ACQ_RAW_ADC: {
2019-03-10 03:34:41 +08:00
AcquireRawAdcSamplesIso15693();
break;
}
2020-07-08 15:45:49 +08:00
case CMD_HF_ISO15693_SNIFF: {
SniffIso15693(0, NULL, false);
2020-07-20 02:45:47 +08:00
reply_ng(CMD_HF_ISO15693_SNIFF, PM3_SUCCESS, NULL, 0);
2019-03-10 03:34:41 +08:00
break;
}
case CMD_HF_ISO15693_COMMAND: {
iso15_raw_cmd_t *payload = (iso15_raw_cmd_t *)packet->data.asBytes;
SendRawCommand15693(payload);
2019-03-10 03:34:41 +08:00
break;
}
case CMD_HF_ISO15693_FINDAFI: {
struct p {
uint32_t flags;
} PACKED;
struct p *payload = (struct p *)packet->data.asBytes;
BruteforceIso15693Afi(payload->flags);
2019-03-10 03:34:41 +08:00
break;
}
case CMD_HF_ISO15693_READER: {
ReaderIso15693(NULL);
2019-03-10 03:34:41 +08:00
break;
}
case CMD_HF_ISO15693_EML_CLEAR: {
//-----------------------------------------------------------------------------
// Note: we call FpgaDownloadAndGo(FPGA_BITSTREAM_HF_15) here although FPGA is not
// involved in dealing with emulator memory. But if it is called later, it might
// destroy the Emulator Memory.
//-----------------------------------------------------------------------------
EmlClearIso15693();
break;
}
case CMD_HF_ISO15693_EML_SETMEM: {
//-----------------------------------------------------------------------------
// Note: we call FpgaDownloadAndGo(FPGA_BITSTREAM_HF_15) here although FPGA is not
// involved in dealing with emulator memory. But if it is called later, it might
// destroy the Emulator Memory.
//-----------------------------------------------------------------------------
FpgaDownloadAndGo(FPGA_BITSTREAM_HF_15);
struct p {
uint32_t offset;
uint16_t count;
uint8_t data[];
} PACKED;
struct p *payload = (struct p *) packet->data.asBytes;
2023-07-28 01:01:46 +08:00
emlSet(payload->data, payload->offset, payload->count);
break;
}
case CMD_HF_ISO15693_EML_GETMEM: {
FpgaDownloadAndGo(FPGA_BITSTREAM_HF_15);
struct p {
uint32_t offset;
uint16_t length;
} PACKED;
2024-01-25 08:55:07 +08:00
struct p *payload = (struct p *) packet->data.asBytes;
if (payload->length > PM3_CMD_DATA_SIZE) {
reply_ng(CMD_HF_ISO15693_EML_GETMEM, PM3_EMALLOC, NULL, 0);
return;
}
2024-01-25 08:55:07 +08:00
uint8_t *buf = BigBuf_malloc(payload->length);
emlGet(buf, payload->offset, payload->length);
LED_B_ON();
reply_ng(CMD_HF_ISO15693_EML_GETMEM, PM3_SUCCESS, buf, payload->length);
LED_B_OFF();
2024-01-25 08:55:07 +08:00
BigBuf_free_keep_EM();
break;
}
case CMD_HF_ISO15693_SIMULATE: {
2020-07-07 19:18:53 +08:00
struct p {
2020-08-17 14:52:24 +08:00
uint8_t uid[8];
uint8_t block_size;
2020-07-07 19:18:53 +08:00
} PACKED;
struct p *payload = (struct p *) packet->data.asBytes;
SimTagIso15693(payload->uid, payload->block_size);
2019-03-10 03:34:41 +08:00
break;
}
2020-08-17 14:52:24 +08:00
case CMD_HF_ISO15693_CSETUID: {
struct p {
uint8_t uid[8];
} PACKED;
struct p *payload = (struct p *) packet->data.asBytes;
SetTag15693Uid(payload->uid);
break;
2020-08-17 14:52:24 +08:00
}
case CMD_HF_ISO15693_SLIX_DISABLE_EAS: {
struct p {
uint8_t pwd[4];
2023-01-29 11:59:50 +08:00
bool usepwd;
} PACKED;
struct p *payload = (struct p *) packet->data.asBytes;
DisableEAS_AFISlixIso15693(payload->pwd, payload->usepwd);
2021-05-06 03:04:48 +08:00
break;
}
case CMD_HF_ISO15693_SLIX_ENABLE_EAS: {
struct p {
uint8_t pwd[4];
2023-01-29 11:59:50 +08:00
bool usepwd;
} PACKED;
struct p *payload = (struct p *) packet->data.asBytes;
EnableEAS_AFISlixIso15693(payload->pwd, payload->usepwd);
break;
}
case CMD_HF_ISO15693_SLIX_WRITE_PWD: {
struct p {
uint8_t old_pwd[4];
uint8_t new_pwd[4];
uint8_t pwd_id;
} PACKED;
struct p *payload = (struct p *) packet->data.asBytes;
WritePasswordSlixIso15693(payload->old_pwd, payload->new_pwd, payload->pwd_id);
2021-05-06 03:04:48 +08:00
break;
}
case CMD_HF_ISO15693_SLIX_DISABLE_PRIVACY: {
struct p {
uint8_t pwd[4];
} PACKED;
struct p *payload = (struct p *) packet->data.asBytes;
DisablePrivacySlixIso15693(payload->pwd);
break;
}
case CMD_HF_ISO15693_SLIX_ENABLE_PRIVACY: {
struct p {
uint8_t pwd[4];
} PACKED;
2023-01-29 11:59:50 +08:00
struct p *payload = (struct p *)packet->data.asBytes;
EnablePrivacySlixIso15693(payload->pwd);
break;
}
case CMD_HF_ISO15693_SLIX_PASS_PROTECT_AFI: {
struct p {
uint8_t pwd[4];
} PACKED;
2023-01-29 11:59:50 +08:00
struct p *payload = (struct p *)packet->data.asBytes;
PassProtectAFISlixIso15693(payload->pwd);
break;
}
case CMD_HF_ISO15693_WRITE_AFI: {
struct p {
uint8_t pwd[4];
bool use_pwd;
uint8_t uid[8];
bool use_uid;
uint8_t afi;
} PACKED;
2023-01-29 11:59:50 +08:00
struct p *payload = (struct p *)packet->data.asBytes;
WriteAFIIso15693(payload->pwd, payload->use_pwd, payload->uid, payload->use_uid, payload->afi);
break;
}
case CMD_HF_ISO15693_SLIX_PASS_PROTECT_EAS: {
struct p {
uint8_t pwd[4];
} PACKED;
2023-01-29 11:59:50 +08:00
struct p *payload = (struct p *)packet->data.asBytes;
PassProtextEASSlixIso15693(payload->pwd);
break;
}
#endif
2011-12-16 19:00:51 +08:00
#ifdef WITH_LEGICRF
case CMD_HF_LEGIC_SIMULATE: {
2020-09-07 16:35:09 +08:00
struct p {
uint8_t tagtype;
bool send_reply;
} PACKED;
struct p *payload = (struct p *) packet->data.asBytes;
LegicRfSimulate(payload->tagtype, payload->send_reply);
2019-03-10 03:34:41 +08:00
break;
}
case CMD_HF_LEGIC_WRITER: {
2022-02-15 04:44:15 +08:00
legic_packet_t *payload = (legic_packet_t *) packet->data.asBytes;
LegicRfWriter(payload->offset, payload->len, payload->iv, payload->data);
2019-03-10 03:34:41 +08:00
break;
}
case CMD_HF_LEGIC_READER: {
2022-02-15 04:44:15 +08:00
legic_packet_t *payload = (legic_packet_t *) packet->data.asBytes;
LegicRfReader(payload->offset, payload->len, payload->iv);
2019-03-10 03:34:41 +08:00
break;
}
case CMD_HF_LEGIC_INFO: {
2019-03-10 03:34:41 +08:00
LegicRfInfo();
break;
}
case CMD_HF_LEGIC_ESET: {
2019-03-10 03:34:41 +08:00
//-----------------------------------------------------------------------------
// Note: we call FpgaDownloadAndGo(FPGA_BITSTREAM_HF) here although FPGA is not
// involved in dealing with emulator memory. But if it is called later, it might
// destroy the Emulator Memory.
//-----------------------------------------------------------------------------
FpgaDownloadAndGo(FPGA_BITSTREAM_HF);
2022-02-15 04:44:15 +08:00
legic_packet_t *payload = (legic_packet_t *) packet->data.asBytes;
emlSet(payload->data, payload->offset, payload->len);
2019-03-10 03:34:41 +08:00
break;
}
#endif
#ifdef WITH_ISO14443b
case CMD_HF_SRI_READ: {
struct p {
uint8_t blockno;
} PACKED;
struct p *payload = (struct p *) packet->data.asBytes;
read_14b_st_block(payload->blockno);
2019-03-10 03:34:41 +08:00
break;
}
case CMD_HF_ISO14443B_SNIFF: {
2019-03-10 03:34:41 +08:00
SniffIso14443b();
2020-07-20 02:45:47 +08:00
reply_ng(CMD_HF_ISO14443B_SNIFF, PM3_SUCCESS, NULL, 0);
2019-03-10 03:34:41 +08:00
break;
}
case CMD_HF_ISO14443B_SIMULATE: {
SimulateIso14443bTag(packet->data.asBytes);
2019-03-10 03:34:41 +08:00
break;
}
2021-05-06 03:04:48 +08:00
case CMD_HF_ISO14443B_COMMAND: {
iso14b_raw_cmd_t *payload = (iso14b_raw_cmd_t *)packet->data.asBytes;
SendRawCommand14443B(payload);
2019-03-10 03:34:41 +08:00
break;
}
2020-08-21 23:58:07 +08:00
case CMD_HF_CRYPTORF_SIM : {
// simulate_crf_tag();
break;
}
#endif
2017-10-21 02:27:44 +08:00
#ifdef WITH_FELICA
case CMD_HF_FELICA_COMMAND: {
2019-04-18 03:30:01 +08:00
felica_sendraw(packet);
2019-03-10 03:34:41 +08:00
break;
}
case CMD_HF_FELICALITE_SIMULATE: {
2021-03-25 16:39:40 +08:00
struct p {
uint8_t uid[8];
} PACKED;
struct p *payload = (struct p *) packet->data.asBytes;
felica_sim_lite(payload->uid);
2017-10-21 02:27:44 +08:00
break;
}
case CMD_HF_FELICA_SNIFF: {
2021-03-27 04:01:50 +08:00
struct p {
uint32_t samples;
uint32_t triggers;
} PACKED;
struct p *payload = (struct p *) packet->data.asBytes;
felica_sniff(payload->samples, payload->triggers);
2017-10-21 02:27:44 +08:00
break;
}
case CMD_HF_FELICALITE_DUMP: {
2019-03-10 03:34:41 +08:00
felica_dump_lite_s();
2017-10-21 02:27:44 +08:00
break;
}
2017-10-21 02:27:44 +08:00
#endif
2022-06-25 05:36:42 +08:00
#ifdef WITH_GENERAL_HF
case CMD_HF_ACQ_RAW_ADC: {
uint32_t samplesCount = 0;
memcpy(&samplesCount, packet->data.asBytes, 4);
2022-06-25 19:56:24 +08:00
HfReadADC(samplesCount, true);
2022-06-25 05:36:42 +08:00
break;
}
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case CMD_HF_TEXKOM_SIMULATE: {
2022-07-07 00:03:17 +08:00
struct p {
uint8_t data[8];
uint8_t modulation;
uint32_t timeout;
} PACKED;
struct p *payload = (struct p *) packet->data.asBytes;
HfSimulateTkm(payload->data, payload->modulation, payload->timeout);
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break;
}
2022-06-25 05:36:42 +08:00
#endif
#ifdef WITH_ISO14443a
case CMD_HF_ISO14443A_PRINT_CONFIG: {
printHf14aConfig();
break;
}
case CMD_HF_ISO14443A_GET_CONFIG: {
hf14a_config *hf14aconfig = getHf14aConfig();
reply_ng(CMD_HF_ISO14443A_GET_CONFIG, PM3_SUCCESS, (uint8_t *)hf14aconfig, sizeof(hf14a_config));
break;
}
case CMD_HF_ISO14443A_SET_CONFIG: {
hf14a_config c;
memcpy(&c, packet->data.asBytes, sizeof(hf14a_config));
setHf14aConfig(&c);
break;
}
case CMD_HF_ISO14443A_SET_THRESHOLDS: {
struct p {
uint8_t threshold;
uint8_t threshold_high;
uint8_t legic_threshold;
} PACKED;
struct p *payload = (struct p *) packet->data.asBytes;
FpgaDownloadAndGo(FPGA_BITSTREAM_HF);
FpgaSendCommand(FPGA_CMD_SET_EDGE_DETECT_THRESHOLD, (payload->threshold & 0x3f) | ((payload->threshold_high & 0x3f) << 6));
LegicRfSetThreshold((uint32_t)payload->legic_threshold);
break;
}
case CMD_HF_ISO14443A_SNIFF: {
2019-05-27 03:00:49 +08:00
SniffIso14443a(packet->data.asBytes[0]);
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reply_ng(CMD_HF_ISO14443A_SNIFF, PM3_SUCCESS, NULL, 0);
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break;
}
case CMD_HF_ISO14443A_READER: {
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ReaderIso14443a(packet);
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break;
}
case CMD_HF_ISO14443A_SIMULATE: {
struct p {
uint8_t tagtype;
uint16_t flags;
uint8_t uid[10];
uint8_t exitAfter;
} PACKED;
struct p *payload = (struct p *) packet->data.asBytes;
SimulateIso14443aTag(payload->tagtype, payload->flags, payload->uid, payload->exitAfter); // ## Simulate iso14443a tag - pass tag type & UID
2019-03-10 03:34:41 +08:00
break;
}
case CMD_HF_ISO14443A_ANTIFUZZ: {
2020-10-20 23:36:01 +08:00
struct p {
uint8_t flag;
} PACKED;
struct p *payload = (struct p *) packet->data.asBytes;
iso14443a_antifuzz(payload->flag);
2019-03-10 03:34:41 +08:00
break;
}
// EPA related
case CMD_HF_EPA_COLLECT_NONCE: {
2019-04-18 03:30:01 +08:00
EPA_PACE_Collect_Nonce(packet);
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break;
}
case CMD_HF_EPA_REPLAY: {
2019-04-18 03:30:01 +08:00
EPA_PACE_Replay(packet);
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break;
}
case CMD_HF_EPA_PACE_SIMULATE: {
EPA_PACE_Simulate(packet);
break;
}
2022-10-29 07:26:12 +08:00
case CMD_HF_MIFARE_READER: {
struct p {
uint8_t first_run;
uint8_t blockno;
uint8_t key_type;
} PACKED;
struct p *payload = (struct p *) packet->data.asBytes;
ReaderMifare(payload->first_run, payload->blockno, payload->key_type);
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break;
}
case CMD_HF_MIFARE_READBL: {
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mf_readblock_t *payload = (mf_readblock_t *)packet->data.asBytes;
uint8_t outbuf[16];
int16_t retval = mifare_cmd_readblocks(MF_WAKE_WUPA, MIFARE_AUTH_KEYA + (payload->keytype & 1), payload->key, ISO14443A_CMD_READBLOCK, payload->blockno, 1, outbuf);
reply_ng(CMD_HF_MIFARE_READBL, retval, outbuf, sizeof(outbuf));
2019-03-10 03:34:41 +08:00
break;
}
case CMD_HF_MIFARE_READBL_EX: {
mf_readblock_ex_t *payload = (mf_readblock_ex_t *)packet->data.asBytes;
uint8_t outbuf[16];
int16_t retval = mifare_cmd_readblocks(payload->wakeup, payload->auth_cmd, payload->key, payload->read_cmd, payload->block_no, 1, outbuf);
reply_ng(CMD_HF_MIFARE_READBL_EX, retval, outbuf, sizeof(outbuf));
break;
}
case CMD_HF_MIFAREU_READBL: {
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MifareUReadBlock(packet->oldarg[0], packet->oldarg[1], packet->data.asBytes);
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break;
}
case CMD_HF_MIFAREUC_AUTH: {
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MifareUC_Auth(packet->oldarg[0], packet->data.asBytes);
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break;
}
case CMD_HF_MIFAREULAES_AUTH: {
struct p {
bool turn_off_field;
uint8_t keyno;
uint8_t key[18];
} PACKED;
struct p *payload = (struct p *) packet->data.asBytes;
MifareUL_AES_Auth(payload->turn_off_field, payload->keyno, payload->key);
break;
}
case CMD_HF_MIFAREU_READCARD: {
2019-04-18 06:12:52 +08:00
MifareUReadCard(packet->oldarg[0], packet->oldarg[1], packet->oldarg[2], packet->data.asBytes);
2019-03-10 03:34:41 +08:00
break;
}
case CMD_HF_MIFAREUC_SETPWD: {
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MifareUSetPwd(packet->oldarg[0], packet->data.asBytes);
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break;
}
case CMD_HF_MIFARE_READSC: {
2019-05-13 18:49:41 +08:00
MifareReadSector(packet->oldarg[0], packet->oldarg[1], packet->data.asBytes);
2019-03-10 03:34:41 +08:00
break;
}
case CMD_HF_MIFARE_WRITEBL: {
uint8_t block_no = packet->oldarg[0];
uint8_t key_type = packet->oldarg[1];
uint8_t *key = packet->data.asBytes;
uint8_t *block_data = packet->data.asBytes + 10;
int16_t retval = mifare_cmd_writeblocks(MF_WAKE_WUPA, MIFARE_AUTH_KEYA + (key_type & 1), key, ISO14443A_CMD_WRITEBLOCK, block_no, 1, block_data);
// convert ng style retval to old status
if (retval >= 0) {
retval = 1;
}
reply_mix(CMD_ACK, retval, 0, 0, 0, 0);
2019-03-10 03:34:41 +08:00
break;
}
case CMD_HF_MIFARE_WRITEBL_EX: {
mf_writeblock_ex_t *payload = (mf_writeblock_ex_t *)packet->data.asBytes;
int16_t retval = mifare_cmd_writeblocks(payload->wakeup, payload->auth_cmd, payload->key, payload->write_cmd, payload->block_no, 1, payload->block_data);
reply_ng(CMD_HF_MIFARE_WRITEBL_EX, retval, NULL, 0);
break;
}
case CMD_HF_MIFARE_VALUE: {
MifareValue(packet->oldarg[0], packet->oldarg[1], packet->oldarg[2], packet->data.asBytes);
break;
}
case CMD_HF_MIFAREU_WRITEBL: {
2019-04-18 06:12:52 +08:00
MifareUWriteBlock(packet->oldarg[0], packet->oldarg[1], packet->data.asBytes);
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break;
}
case CMD_HF_MIFAREU_WRITEBL_COMPAT: {
MifareUWriteBlockCompat(packet->oldarg[0], packet->oldarg[1], packet->data.asBytes);
break;
}
case CMD_HF_MIFARE_ACQ_ENCRYPTED_NONCES: {
2019-04-18 06:12:52 +08:00
MifareAcquireEncryptedNonces(packet->oldarg[0], packet->oldarg[1], packet->oldarg[2], packet->data.asBytes);
2019-03-10 03:34:41 +08:00
break;
}
case CMD_HF_MIFARE_ACQ_NONCES: {
MifareAcquireNonces(packet->oldarg[0], packet->oldarg[2]);
2019-03-10 03:34:41 +08:00
break;
}
case CMD_HF_MIFARE_NESTED: {
struct p {
uint8_t block;
uint8_t keytype;
uint8_t target_block;
uint8_t target_keytype;
bool calibrate;
uint8_t key[6];
} PACKED;
struct p *payload = (struct p *) packet->data.asBytes;
MifareNested(payload->block, payload->keytype, payload->target_block, payload->target_keytype, payload->calibrate, payload->key);
2019-03-10 03:34:41 +08:00
break;
}
case CMD_HF_MIFARE_STATIC_NESTED: {
struct p {
uint8_t block;
uint8_t keytype;
uint8_t target_block;
uint8_t target_keytype;
uint8_t key[6];
} PACKED;
struct p *payload = (struct p *) packet->data.asBytes;
MifareStaticNested(payload->block, payload->keytype, payload->target_block, payload->target_keytype, payload->key);
break;
}
case CMD_HF_MIFARE_CHKKEYS: {
2020-08-31 09:04:32 +08:00
MifareChkKeys(packet->data.asBytes, false);
2019-03-10 03:34:41 +08:00
break;
}
case CMD_HF_MIFARE_CHKKEYS_FAST: {
2019-04-18 06:12:52 +08:00
MifareChkKeys_fast(packet->oldarg[0], packet->oldarg[1], packet->oldarg[2], packet->data.asBytes);
2019-03-10 03:34:41 +08:00
break;
}
case CMD_HF_MIFARE_CHKKEYS_FILE: {
struct p {
uint8_t filename[32];
} PACKED;
struct p *payload = (struct p *) packet->data.asBytes;
MifareChkKeys_file(payload->filename);
break;
}
case CMD_HF_MIFARE_SIMULATE: {
struct p {
uint16_t flags;
uint8_t exitAfter;
uint8_t uid[10];
uint16_t atqa;
uint8_t sak;
} PACKED;
struct p *payload = (struct p *) packet->data.asBytes;
Mifare1ksim(payload->flags, payload->exitAfter, payload->uid, payload->atqa, payload->sak);
2019-03-10 03:34:41 +08:00
break;
}
case CMD_HF_MIFARE_EML_MEMCLR: {
2019-05-13 18:30:27 +08:00
MifareEMemClr();
reply_ng(CMD_HF_MIFARE_EML_MEMCLR, PM3_SUCCESS, NULL, 0);
FpgaDownloadAndGo(FPGA_BITSTREAM_HF);
2019-03-10 03:34:41 +08:00
break;
}
case CMD_HF_MIFARE_EML_MEMSET: {
struct p {
uint8_t blockno;
uint8_t blockcnt;
uint8_t blockwidth;
uint8_t data[];
} PACKED;
struct p *payload = (struct p *) packet->data.asBytes;
2023-07-28 01:01:46 +08:00
FpgaDownloadAndGo(FPGA_BITSTREAM_HF);
// backwards compat... default bytewidth
if (payload->blockwidth == 0)
payload->blockwidth = 16;
emlSetMem_xt(payload->data, payload->blockno, payload->blockcnt, payload->blockwidth);
2019-03-10 03:34:41 +08:00
break;
}
case CMD_HF_MIFARE_EML_MEMGET: {
struct p {
uint8_t blockno;
uint8_t blockcnt;
} PACKED;
struct p *payload = (struct p *) packet->data.asBytes;
MifareEMemGet(payload->blockno, payload->blockcnt);
2019-03-10 03:34:41 +08:00
break;
}
case CMD_HF_MIFARE_EML_LOAD: {
2019-08-30 16:45:52 +08:00
mfc_eload_t *payload = (mfc_eload_t *) packet->data.asBytes;
2019-08-29 03:21:52 +08:00
MifareECardLoadExt(payload->sectorcnt, payload->keytype);
2019-03-10 03:34:41 +08:00
break;
}
// Gen1a / 1b - "magic Chinese" card
case CMD_HF_MIFARE_CSETBL: {
2019-04-18 06:12:52 +08:00
MifareCSetBlock(packet->oldarg[0], packet->oldarg[1], packet->data.asBytes);
2019-03-10 03:34:41 +08:00
break;
}
case CMD_HF_MIFARE_CGETBL: {
2019-04-18 06:12:52 +08:00
MifareCGetBlock(packet->oldarg[0], packet->oldarg[1], packet->data.asBytes);
2019-03-10 03:34:41 +08:00
break;
}
case CMD_HF_MIFARE_CIDENT: {
2024-01-02 04:52:05 +08:00
struct p {
uint8_t is_mfc;
uint8_t keytype;
uint8_t key[6];
} PACKED;
struct p *payload = (struct p *) packet->data.asBytes;
MifareCIdent(payload->is_mfc, payload->keytype, payload->key);
2019-03-10 03:34:41 +08:00
break;
}
2020-09-06 03:32:11 +08:00
// Gen 3 magic cards
case CMD_HF_MIFARE_GEN3UID: {
MifareGen3UID(packet->oldarg[0], packet->data.asBytes);
break;
}
case CMD_HF_MIFARE_GEN3BLK: {
MifareGen3Blk(packet->oldarg[0], packet->data.asBytes);
break;
}
case CMD_HF_MIFARE_GEN3FREEZ: {
MifareGen3Freez();
break;
}
// Gen 4 GTU magic cards
case CMD_HF_MIFARE_G4_RDBL: {
struct p {
uint8_t blockno;
uint8_t pwd[4];
uint8_t workFlags;
} PACKED;
struct p *payload = (struct p *) packet->data.asBytes;
MifareG4ReadBlk(payload->blockno, payload->pwd, payload->workFlags);
break;
}
2022-11-05 10:30:43 +08:00
case CMD_HF_MIFARE_G4_WRBL: {
struct p {
uint8_t blockno;
uint8_t pwd[4];
uint8_t data[16]; // data to be written
uint8_t workFlags;
2022-11-05 10:30:43 +08:00
} PACKED;
struct p *payload = (struct p *) packet->data.asBytes;
MifareG4WriteBlk(payload->blockno, payload->pwd, payload->data, payload->workFlags);
2022-11-05 10:30:43 +08:00
break;
}
case CMD_HF_MIFARE_G4_GDM_WRBL: {
struct p {
uint8_t blockno;
uint8_t key[6];
uint8_t data[16]; // data to be written
} PACKED;
struct p *payload = (struct p *) packet->data.asBytes;
int16_t retval = mifare_cmd_writeblocks(MF_WAKE_WUPA, MIFARE_MAGIC_GDM_AUTH_KEY, payload->key, MIFARE_MAGIC_GDM_WRITEBLOCK, payload->blockno, 1, payload->data);
reply_ng(CMD_HF_MIFARE_G4_GDM_WRBL, retval, NULL, 0);
break;
}
2020-03-10 00:11:11 +08:00
case CMD_HF_MIFARE_PERSONALIZE_UID: {
struct p {
uint8_t keytype;
uint8_t pers_option;
uint8_t key[6];
} PACKED;
struct p *payload = (struct p *) packet->data.asBytes;
uint64_t authkey = bytes_to_num(payload->key, 6);
2020-03-10 00:11:11 +08:00
MifarePersonalizeUID(payload->keytype, payload->pers_option, authkey);
break;
}
case CMD_HF_MIFARE_SETMOD: {
2019-05-15 18:52:22 +08:00
MifareSetMod(packet->data.asBytes);
2019-03-10 03:34:41 +08:00
break;
}
2019-03-10 03:34:41 +08:00
//mifare desfire
case CMD_HF_DESFIRE_READBL: {
2019-03-10 03:34:41 +08:00
break;
}
case CMD_HF_DESFIRE_WRITEBL: {
2019-03-10 03:34:41 +08:00
break;
}
case CMD_HF_DESFIRE_AUTH1: {
2020-04-11 03:02:46 +08:00
MifareDES_Auth1(packet->data.asBytes);
2019-03-10 03:34:41 +08:00
break;
}
case CMD_HF_DESFIRE_AUTH2: {
2019-04-18 06:12:52 +08:00
//MifareDES_Auth2(packet->oldarg[0],packet->data.asBytes);
2019-03-10 03:34:41 +08:00
break;
}
case CMD_HF_DESFIRE_READER: {
2019-04-18 06:12:52 +08:00
//readermifaredes(packet->oldarg[0], packet->oldarg[1], packet->data.asBytes);
2019-03-10 03:34:41 +08:00
break;
}
case CMD_HF_DESFIRE_INFO: {
2019-03-10 03:34:41 +08:00
MifareDesfireGetInformation();
break;
}
case CMD_HF_DESFIRE_COMMAND: {
2020-04-11 04:52:16 +08:00
MifareSendCommand(packet->data.asBytes);
2019-03-10 03:34:41 +08:00
break;
}
case CMD_HF_MIFARE_NACK_DETECT: {
2019-03-10 03:34:41 +08:00
DetectNACKbug();
break;
}
case CMD_HF_MFU_OTP_TEAROFF: {
2020-04-19 03:34:48 +08:00
MifareU_Otp_Tearoff(packet->oldarg[0], packet->oldarg[1], packet->data.asBytes);
break;
}
2020-10-20 07:00:23 +08:00
case CMD_HF_MFU_COUNTER_TEAROFF: {
2020-10-13 01:08:29 +08:00
struct p {
uint8_t counter;
uint32_t tearoff_time;
2020-11-05 19:06:12 +08:00
uint8_t value[4];
2020-10-13 01:08:29 +08:00
} PACKED;
2020-10-20 07:00:23 +08:00
struct p *payload = (struct p *) packet->data.asBytes;
2020-11-05 19:06:12 +08:00
MifareU_Counter_Tearoff(payload->counter, payload->tearoff_time, payload->value);
2020-10-13 01:08:29 +08:00
break;
}
case CMD_HF_MIFARE_STATIC_NONCE: {
MifareHasStaticNonce();
break;
}
2023-12-12 03:24:26 +08:00
case CMD_HF_MIFARE_STATIC_ENCRYPTED_NONCE: {
struct p {
uint8_t block_no;
uint8_t key_type;
uint8_t key[6];
} PACKED;
struct p *payload = (struct p *) packet->data.asBytes;
2023-12-12 07:11:10 +08:00
2023-12-12 03:24:26 +08:00
MifareHasStaticEncryptedNonce(payload->block_no, payload->key_type, payload->key);
break;
}
2019-08-04 03:17:52 +08:00
#endif
#ifdef WITH_NFCBARCODE
case CMD_HF_THINFILM_READ: {
ReadThinFilm();
break;
}
case CMD_HF_THINFILM_SIMULATE: {
2019-08-02 06:00:37 +08:00
SimulateThinFilm(packet->data.asBytes, packet->length);
break;
}
#endif
2017-11-25 17:20:52 +08:00
2011-12-16 19:00:51 +08:00
#ifdef WITH_ICLASS
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// Makes use of ISO14443a FPGA Firmware
case CMD_HF_ICLASS_SNIFF: {
2020-07-07 19:18:53 +08:00
struct p {
uint8_t jam_search_len;
uint8_t jam_search_string[];
} PACKED;
struct p *payload = (struct p *) packet->data.asBytes;
SniffIClass(payload->jam_search_len, payload->jam_search_string);
2020-07-20 02:45:47 +08:00
reply_ng(CMD_HF_ICLASS_SNIFF, PM3_SUCCESS, NULL, 0);
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break;
}
case CMD_HF_ICLASS_SIMULATE: {
2020-10-20 07:00:23 +08:00
/*
struct p {
uint8_t reader[4];
uint8_t mac[4];
} PACKED;
struct p *payload = (struct p *) packet->data.asBytes;
*/
SimulateIClass(packet->oldarg[0], packet->oldarg[1], packet->oldarg[2], packet->data.asBytes);
break;
}
case CMD_HF_ICLASS_READER: {
iclass_card_select_t *payload = (iclass_card_select_t *) packet->data.asBytes;
ReaderIClass(payload->flags);
2019-03-10 03:34:41 +08:00
break;
}
case CMD_HF_ICLASS_EML_MEMSET: {
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//-----------------------------------------------------------------------------
// Note: we call FpgaDownloadAndGo(FPGA_BITSTREAM_HF_15) here although FPGA is not
// involved in dealing with emulator memory. But if it is called later, it might
// destroy the Emulator Memory.
//-----------------------------------------------------------------------------
FpgaDownloadAndGo(FPGA_BITSTREAM_HF_15);
2021-05-03 00:41:43 +08:00
struct p {
uint16_t offset;
uint16_t len;
uint8_t data[];
} PACKED;
struct p *payload = (struct p *) packet->data.asBytes;
emlSet(payload->data, payload->offset, payload->len);
2019-03-10 03:34:41 +08:00
break;
}
case CMD_HF_ICLASS_WRITEBL: {
iClass_WriteBlock(packet->data.asBytes);
2019-03-10 03:34:41 +08:00
break;
}
case CMD_HF_ICLASS_READBL: {
iClass_ReadBlock(packet->data.asBytes);
2019-03-10 03:34:41 +08:00
break;
}
case CMD_HF_ICLASS_CHKKEYS: {
2021-05-06 03:04:48 +08:00
iClass_Authentication_fast((iclass_chk_t *)packet->data.asBytes);
2019-03-10 03:34:41 +08:00
break;
}
case CMD_HF_ICLASS_DUMP: {
iClass_Dump(packet->data.asBytes);
2019-03-10 03:34:41 +08:00
break;
}
2021-05-06 03:04:48 +08:00
case CMD_HF_ICLASS_RESTORE: {
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iClass_Restore((iclass_restore_req_t *)packet->data.asBytes);
break;
}
case CMD_HF_ICLASS_CREDIT_EPURSE: {
iclass_credit_epurse((iclass_credit_epurse_t *)packet->data.asBytes);
break;
}
#endif
2018-07-04 21:29:27 +08:00
2019-03-12 20:15:39 +08:00
#ifdef WITH_HFSNIFF
case CMD_HF_SNIFF: {
2020-06-18 17:55:27 +08:00
struct p {
uint32_t samplesToSkip;
uint32_t triggersToSkip;
uint8_t skipMode;
uint8_t skipRatio;
2020-06-18 17:55:27 +08:00
} PACKED;
struct p *payload = (struct p *) packet->data.asBytes;
2020-06-18 17:55:27 +08:00
uint16_t len = 0;
int res = HfSniff(payload->samplesToSkip, payload->triggersToSkip, &len, payload->skipMode, payload->skipRatio);
struct {
uint16_t len;
} PACKED retval;
retval.len = len;
reply_ng(CMD_HF_SNIFF, res, (uint8_t *)&retval, sizeof(retval));
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break;
}
#endif
2018-07-04 21:29:27 +08:00
#ifdef WITH_HFPLOT
case CMD_FPGAMEM_DOWNLOAD: {
HfPlotDownload();
break;
}
#endif
#ifdef WITH_SMARTCARD
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case CMD_SMART_ATR: {
SmartCardAtr();
break;
}
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case CMD_SMART_SETBAUD: {
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SmartCardSetBaud(packet->oldarg[0]);
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break;
}
2019-03-10 07:00:59 +08:00
case CMD_SMART_SETCLOCK: {
2020-10-20 23:34:42 +08:00
struct p {
uint32_t new_clk;
} PACKED;
struct p *payload = (struct p *) packet->data.asBytes;
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SmartCardSetClock(payload->new_clk);
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break;
}
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case CMD_SMART_RAW: {
SmartCardRaw((smart_card_raw_t *) packet->data.asBytes);
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break;
}
case CMD_SMART_UPLOAD: {
// upload file from client
struct p {
uint32_t idx;
uint32_t bytes_in_packet;
uint16_t crc;
uint8_t data[400];
} PACKED;
struct p *payload = (struct p *) packet->data.asBytes;
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uint8_t *mem = BigBuf_get_addr();
memcpy(mem + payload->idx, payload->data, payload->bytes_in_packet);
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uint8_t a = 0, b = 0;
compute_crc(CRC_14443_A, mem + payload->idx, payload->bytes_in_packet, &a, &b);
int res = PM3_SUCCESS;
if (payload->crc != (a << 8 | b)) {
DbpString("CRC Failed");
res = PM3_ESOFT;
}
reply_ng(CMD_SMART_UPLOAD, res, NULL, 0);
break;
}
case CMD_SMART_UPGRADE: {
struct p {
uint16_t fw_size;
uint16_t crc;
} PACKED;
struct p *payload = (struct p *) packet->data.asBytes;
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uint8_t *fwdata = BigBuf_get_addr();
uint8_t a = 0, b = 0;
compute_crc(CRC_14443_A, fwdata, payload->fw_size, &a, &b);
if (payload->crc != (a << 8 | b)) {
Dbprintf("CRC Failed, 0x[%04x] != 0x[%02x%02x]", payload->crc, a, b);
reply_ng(CMD_SMART_UPGRADE, PM3_ESOFT, NULL, 0);
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} else {
SmartCardUpgrade(payload->fw_size);
}
fwdata = NULL;
break;
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}
case CMD_HF_SAM_PICOPASS: {
sam_picopass_get_pacs();
break;
}
case CMD_HF_SAM_SEOS: {
// sam_seos_get_pacs();
break;
}
case CMD_HF_SAM_MFC: {
// sam_mfc_get_pacs();
break;
}
#endif
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#ifdef WITH_FPC_USART
case CMD_USART_TX: {
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LED_B_ON();
usart_writebuffer_sync(packet->data.asBytes, packet->length);
reply_ng(CMD_USART_TX, PM3_SUCCESS, NULL, 0);
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LED_B_OFF();
break;
}
case CMD_USART_RX: {
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LED_B_ON();
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struct p {
uint32_t waittime;
} PACKED;
struct p *payload = (struct p *) packet->data.asBytes;
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uint16_t available;
uint16_t pre_available = 0;
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uint8_t *dest = BigBuf_malloc(USART_FIFOLEN);
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uint32_t wait = payload->waittime;
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StartTicks();
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uint32_t ti = GetTickCount();
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while (true) {
WaitMS(50);
available = usart_rxdata_available();
if (available > pre_available) {
// When receiving data, reset timer and shorten timeout
ti = GetTickCount();
wait = 50;
pre_available = available;
continue;
}
// We stop either after waittime if no data or 50ms after last data received
if (GetTickCountDelta(ti) > wait)
break;
}
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if (available > 0) {
uint16_t len = usart_read_ng(dest, available);
reply_ng(CMD_USART_RX, PM3_SUCCESS, dest, len);
} else {
reply_ng(CMD_USART_RX, PM3_ENODATA, NULL, 0);
}
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StopTicks();
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BigBuf_free();
LED_B_OFF();
break;
}
case CMD_USART_TXRX: {
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LED_B_ON();
struct p {
uint32_t waittime;
uint8_t data[];
} PACKED;
struct p *payload = (struct p *) packet->data.asBytes;
usart_writebuffer_sync(payload->data, packet->length - sizeof(payload));
uint16_t available;
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uint16_t pre_available = 0;
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uint8_t *dest = BigBuf_malloc(USART_FIFOLEN);
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uint32_t wait = payload->waittime;
StartTicks();
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uint32_t ti = GetTickCount();
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while (true) {
WaitMS(50);
available = usart_rxdata_available();
if (available > pre_available) {
// When receiving data, reset timer and shorten timeout
ti = GetTickCount();
wait = 50;
pre_available = available;
continue;
}
// We stop either after waittime if no data or 50ms after last data received
if (GetTickCountDelta(ti) > wait)
break;
}
if (available > 0) {
uint16_t len = usart_read_ng(dest, available);
reply_ng(CMD_USART_TXRX, PM3_SUCCESS, dest, len);
} else {
reply_ng(CMD_USART_TXRX, PM3_ENODATA, NULL, 0);
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}
StopTicks();
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BigBuf_free();
LED_B_OFF();
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break;
}
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case CMD_USART_CONFIG: {
struct p {
uint32_t baudrate;
uint8_t parity;
} PACKED;
struct p *payload = (struct p *) packet->data.asBytes;
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usart_init(payload->baudrate, payload->parity);
reply_ng(CMD_USART_CONFIG, PM3_SUCCESS, NULL, 0);
break;
}
#endif
case CMD_BUFF_CLEAR: {
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BigBuf_Clear();
BigBuf_free();
break;
}
case CMD_MEASURE_ANTENNA_TUNING: {
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MeasureAntennaTuning();
break;
}
case CMD_MEASURE_ANTENNA_TUNING_HF: {
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if (packet->length != 1)
reply_ng(CMD_MEASURE_ANTENNA_TUNING_HF, PM3_EINVARG, NULL, 0);
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switch (packet->data.asBytes[0]) {
case 1: // MEASURE_ANTENNA_TUNING_HF_START
// Let the FPGA drive the high-frequency antenna around 13.56 MHz.
FpgaDownloadAndGo(FPGA_BITSTREAM_HF);
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FpgaWriteConfWord(FPGA_MAJOR_MODE_HF_READER);
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reply_ng(CMD_MEASURE_ANTENNA_TUNING_HF, PM3_SUCCESS, NULL, 0);
break;
case 2:
if (button_status == BUTTON_SINGLE_CLICK) {
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reply_ng(CMD_MEASURE_ANTENNA_TUNING_HF, PM3_EOPABORTED, NULL, 0);
}
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uint16_t volt = MeasureAntennaTuningHfData();
reply_ng(CMD_MEASURE_ANTENNA_TUNING_HF, PM3_SUCCESS, (uint8_t *)&volt, sizeof(volt));
break;
case 3:
FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF);
reply_ng(CMD_MEASURE_ANTENNA_TUNING_HF, PM3_SUCCESS, NULL, 0);
break;
default:
reply_ng(CMD_MEASURE_ANTENNA_TUNING_HF, PM3_EINVARG, NULL, 0);
break;
}
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break;
}
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case CMD_MEASURE_ANTENNA_TUNING_LF: {
if (packet->length != 2)
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reply_ng(CMD_MEASURE_ANTENNA_TUNING_LF, PM3_EINVARG, NULL, 0);
switch (packet->data.asBytes[0]) {
case 1: // MEASURE_ANTENNA_TUNING_LF_START
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// Let the FPGA drive the low-frequency antenna around 125kHz
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FpgaDownloadAndGo(FPGA_BITSTREAM_LF);
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FpgaWriteConfWord(FPGA_MAJOR_MODE_LF_READER | FPGA_LF_ADC_READER_FIELD);
FpgaSendCommand(FPGA_CMD_SET_DIVISOR, packet->data.asBytes[1]);
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reply_ng(CMD_MEASURE_ANTENNA_TUNING_LF, PM3_SUCCESS, NULL, 0);
break;
case 2:
if (button_status == BUTTON_SINGLE_CLICK) {
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reply_ng(CMD_MEASURE_ANTENNA_TUNING_LF, PM3_EOPABORTED, NULL, 0);
}
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uint32_t volt = MeasureAntennaTuningLfData();
reply_ng(CMD_MEASURE_ANTENNA_TUNING_LF, PM3_SUCCESS, (uint8_t *)&volt, sizeof(volt));
break;
case 3:
FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF);
reply_ng(CMD_MEASURE_ANTENNA_TUNING_LF, PM3_SUCCESS, NULL, 0);
break;
default:
reply_ng(CMD_MEASURE_ANTENNA_TUNING_LF, PM3_EINVARG, NULL, 0);
break;
}
break;
}
case CMD_LISTEN_READER_FIELD: {
if (packet->length != sizeof(uint8_t))
2019-05-20 16:28:34 +08:00
break;
ListenReaderField(packet->data.asBytes[0]);
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break;
}
case CMD_FPGA_MAJOR_MODE_OFF: { // ## FPGA Control
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FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF);
SpinDelay(200);
LED_D_OFF(); // LED D indicates field ON or OFF
break;
}
case CMD_DOWNLOAD_BIGBUF: {
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LED_B_ON();
uint8_t *mem = BigBuf_get_addr();
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uint32_t startidx = packet->oldarg[0];
uint32_t numofbytes = packet->oldarg[1];
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// arg0 = startindex
// arg1 = length bytes to transfer
// arg2 = BigBuf tracelen
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//Dbprintf("transfer to client parameters: %" PRIu32 " | %" PRIu32 " | %" PRIu32, startidx, numofbytes, packet->oldarg[2]);
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for (size_t i = 0; i < numofbytes; i += PM3_CMD_DATA_SIZE) {
size_t len = MIN((numofbytes - i), PM3_CMD_DATA_SIZE);
int result = reply_old(CMD_DOWNLOADED_BIGBUF, i, len, BigBuf_get_traceLen(), mem + startidx + i, len);
if (result != PM3_SUCCESS)
Dbprintf("transfer to client failed :: | bytes between %d - %d (%d) | result: %d", i, i + len, len, result);
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}
// Trigger a finish downloading signal with an ACK frame
// iceman, when did sending samplingconfig array got attached here?!?
// arg0 = status of download transfer
// arg1 = RFU
// arg2 = tracelen?
// asbytes = samplingconfig array
2020-05-08 18:42:10 +08:00
reply_mix(CMD_ACK, 1, 0, BigBuf_get_traceLen(), getSamplingConfig(), sizeof(sample_config));
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LED_B_OFF();
break;
}
#ifdef WITH_LF
case CMD_LF_UPLOAD_SIM_SAMPLES: {
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// iceman; since changing fpga_bitstreams clears bigbuff, Its better to call it before.
// to be able to use this one for uploading data to device
// flag =
// b0 0 skip
// 1 clear bigbuff
struct p {
uint8_t flag;
uint16_t offset;
uint8_t data[PM3_CMD_DATA_SIZE - sizeof(uint8_t) - sizeof(uint16_t)];
} PACKED;
struct p *payload = (struct p *) packet->data.asBytes;
FpgaDownloadAndGo(FPGA_BITSTREAM_LF);
if ((payload->flag & 0x1) == 0x1) {
BigBuf_Clear_ext(false);
BigBuf_free();
}
2020-04-30 01:41:10 +08:00
// offset should not be over buffer
if (payload->offset >= BigBuf_get_size()) {
reply_ng(CMD_LF_UPLOAD_SIM_SAMPLES, PM3_EOVFLOW, NULL, 0);
break;
}
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// ensure len bytes copied won't go past end of bigbuf
uint16_t len = MIN(BigBuf_get_size() - payload->offset, sizeof(payload->data));
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uint8_t *mem = BigBuf_get_addr();
memcpy(mem + payload->offset, &payload->data, len);
reply_ng(CMD_LF_UPLOAD_SIM_SAMPLES, PM3_SUCCESS, NULL, 0);
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break;
}
#endif
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case CMD_DOWNLOAD_EML_BIGBUF: {
LED_B_ON();
uint8_t *mem = BigBuf_get_EM_addr();
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uint32_t startidx = packet->oldarg[0];
uint32_t numofbytes = packet->oldarg[1];
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// arg0 = startindex
// arg1 = length bytes to transfer
// arg2 = RFU
for (size_t i = 0; i < numofbytes; i += PM3_CMD_DATA_SIZE) {
2019-06-08 00:41:39 +08:00
size_t len = MIN((numofbytes - i), PM3_CMD_DATA_SIZE);
int result = reply_old(CMD_DOWNLOADED_EML_BIGBUF, i, len, 0, mem + startidx + i, len);
if (result != PM3_SUCCESS)
Dbprintf("transfer to client failed :: | bytes between %d - %d (%d) | result: %d", i, i + len, len, result);
2019-03-10 03:34:41 +08:00
}
// Trigger a finish downloading signal with an ACK frame
reply_mix(CMD_ACK, 1, 0, 0, 0, 0);
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LED_B_OFF();
break;
}
case CMD_READ_MEM: {
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if (packet->length != sizeof(uint32_t))
break;
ReadMem(packet->data.asDwords[0]);
2019-03-10 03:34:41 +08:00
break;
}
case CMD_READ_MEM_DOWNLOAD: {
LED_B_ON();
size_t offset = packet->oldarg[0];
size_t count = packet->oldarg[1];
uint32_t flags = packet->oldarg[2];
bool isok = true;
uint8_t *base = NULL;
2024-01-25 00:12:56 +08:00
bool raw_address_mode = ((flags & READ_MEM_DOWNLOAD_FLAG_RAW) == READ_MEM_DOWNLOAD_FLAG_RAW);
if (!raw_address_mode) {
base = (uint8_t *) _flash_start;
size_t flash_size = get_flash_size();
// Boundary check the offset.
if (offset > flash_size) {
isok = false;
Dbprintf("reading mcu flash failed :: | out of bounds, offset %u count %u", offset, count);
}
// Clip the length if it goes past the end of the flash memory.
count = MIN(count, flash_size - offset);
} else {
// Allow reading from any memory address and length in special 'raw' mode.
base = NULL;
// Boundary check against end of addressable space.
if (offset > 0)
2024-01-23 22:28:50 +08:00
count = MIN(count, -offset);
}
if (isok) {
for (size_t pos = 0; pos < count; pos += PM3_CMD_DATA_SIZE) {
size_t len = MIN((count - pos), PM3_CMD_DATA_SIZE);
isok = 0 == reply_old(CMD_READ_MEM_DOWNLOADED, pos, len, 0, &base[offset + pos], len);
if (!isok) {
Dbprintf("transfer to client failed :: | pos %u len %u", pos, len);
break;
}
}
}
reply_old(CMD_ACK, 1, 0, 0, 0, 0);
LED_B_OFF();
break;
}
#ifdef WITH_FLASH
case CMD_SPIFFS_TEST: {
2019-07-24 03:33:52 +08:00
test_spiffs();
break;
}
case CMD_SPIFFS_CHECK: {
rdv40_spiffs_check();
break;
}
case CMD_SPIFFS_MOUNT: {
2019-07-24 03:33:52 +08:00
rdv40_spiffs_lazy_mount();
break;
}
case CMD_SPIFFS_UNMOUNT: {
rdv40_spiffs_lazy_unmount();
break;
}
case CMD_SPIFFS_PRINT_TREE: {
2021-04-05 14:49:15 +08:00
rdv40_spiffs_safe_print_tree();
break;
}
2019-07-24 03:33:52 +08:00
case CMD_SPIFFS_PRINT_FSINFO: {
2019-07-24 03:48:09 +08:00
rdv40_spiffs_safe_print_fsinfo();
2019-07-24 03:33:52 +08:00
break;
}
case CMD_SPIFFS_DOWNLOAD: {
LED_B_ON();
uint8_t filename[32];
uint8_t *pfilename = packet->data.asBytes;
2019-07-24 03:33:52 +08:00
memcpy(filename, pfilename, SPIFFS_OBJ_NAME_LEN);
2021-08-22 05:02:27 +08:00
if (g_dbglevel >= DBG_DEBUG) Dbprintf("Filename received for spiffs dump : %s", filename);
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uint32_t size = packet->oldarg[1];
uint8_t *buff = BigBuf_malloc(size);
if (buff == NULL) {
2022-10-16 23:56:12 +08:00
if (g_dbglevel >= DBG_DEBUG) Dbprintf("Could not allocate buffer");
// Trigger a finish downloading signal with an PM3_EMALLOC
reply_ng(CMD_SPIFFS_DOWNLOAD, PM3_EMALLOC, NULL, 0);
} else {
rdv40_spiffs_read_as_filetype((char *)filename, (uint8_t *)buff, size, RDV40_SPIFFS_SAFETY_SAFE);
// arg0 = filename
// arg1 = size
// arg2 = RFU
for (size_t i = 0; i < size; i += PM3_CMD_DATA_SIZE) {
size_t len = MIN((size - i), PM3_CMD_DATA_SIZE);
int result = reply_old(CMD_SPIFFS_DOWNLOADED, i, len, 0, buff + i, len);
if (result != PM3_SUCCESS)
Dbprintf("transfer to client failed :: | bytes between %d - %d (%d) | result: %d", i, i + len, len, result);
}
// Trigger a finish downloading signal with an ACK frame
reply_ng(CMD_SPIFFS_DOWNLOAD, PM3_SUCCESS, NULL, 0);
2022-10-16 23:56:12 +08:00
BigBuf_free();
}
LED_B_OFF();
break;
}
2019-07-24 03:33:52 +08:00
case CMD_SPIFFS_STAT: {
LED_B_ON();
uint8_t filename[32];
uint8_t *pfilename = packet->data.asBytes;
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memcpy(filename, pfilename, SPIFFS_OBJ_NAME_LEN);
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if (g_dbglevel >= DBG_DEBUG) {
Dbprintf("Filename received for spiffs STAT : %s", filename);
}
int changed = rdv40_spiffs_lazy_mount();
uint32_t size = size_in_spiffs((char *)filename);
if (changed) {
rdv40_spiffs_lazy_unmount();
}
reply_ng(CMD_SPIFFS_STAT, PM3_SUCCESS, (uint8_t *)&size, sizeof(uint32_t));
LED_B_OFF();
break;
}
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case CMD_SPIFFS_REMOVE: {
LED_B_ON();
struct p {
uint8_t len;
uint8_t fn[32];
} PACKED;
struct p *payload = (struct p *) packet->data.asBytes;
2021-08-22 05:02:27 +08:00
if (g_dbglevel >= DBG_DEBUG) {
Dbprintf("Filename received for spiffs REMOVE : %s", payload->fn);
}
rdv40_spiffs_remove((char *)payload->fn, RDV40_SPIFFS_SAFETY_SAFE);
reply_ng(CMD_SPIFFS_REMOVE, PM3_SUCCESS, NULL, 0);
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LED_B_OFF();
break;
2019-07-24 03:33:52 +08:00
}
case CMD_SPIFFS_RENAME: {
LED_B_ON();
struct p {
uint8_t slen;
uint8_t src[32];
uint8_t dlen;
uint8_t dest[32];
} PACKED;
struct p *payload = (struct p *) packet->data.asBytes;
2021-08-22 05:02:27 +08:00
if (g_dbglevel >= DBG_DEBUG) {
Dbprintf("SPIFFS RENAME");
Dbprintf("Source........ %s", payload->src);
Dbprintf("Destination... %s", payload->dest);
2019-10-20 04:06:27 +08:00
}
rdv40_spiffs_rename((char *)payload->src, (char *)payload->dest, RDV40_SPIFFS_SAFETY_SAFE);
reply_ng(CMD_SPIFFS_RENAME, PM3_SUCCESS, NULL, 0);
2019-07-24 03:33:52 +08:00
LED_B_OFF();
break;
}
2019-07-24 03:33:52 +08:00
case CMD_SPIFFS_COPY: {
LED_B_ON();
struct p {
uint8_t slen;
uint8_t src[32];
uint8_t dlen;
uint8_t dest[32];
} PACKED;
struct p *payload = (struct p *) packet->data.asBytes;
2021-08-22 05:02:27 +08:00
if (g_dbglevel >= DBG_DEBUG) {
Dbprintf("SPIFFS COPY");
Dbprintf("Source........ %s", payload->src);
Dbprintf("Destination... %s", payload->dest);
2019-10-20 04:06:27 +08:00
}
rdv40_spiffs_copy((char *)payload->src, (char *)payload->dest, RDV40_SPIFFS_SAFETY_SAFE);
reply_ng(CMD_SPIFFS_COPY, PM3_SUCCESS, NULL, 0);
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LED_B_OFF();
break;
}
case CMD_SPIFFS_WRITE: {
LED_B_ON();
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flashmem_write_t *payload = (flashmem_write_t *)packet->data.asBytes;
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if (g_dbglevel >= DBG_DEBUG) {
Dbprintf("SPIFFS WRITE, dest `%s` with APPEND set to: %c", payload->fn, payload->append ? 'Y' : 'N');
}
2020-08-31 07:40:02 +08:00
if (payload->append) {
rdv40_spiffs_append((char *) payload->fn, payload->data, payload->bytes_in_packet, RDV40_SPIFFS_SAFETY_SAFE);
2019-07-24 03:33:52 +08:00
} else {
rdv40_spiffs_write((char *) payload->fn, payload->data, payload->bytes_in_packet, RDV40_SPIFFS_SAFETY_SAFE);
2019-07-24 03:33:52 +08:00
}
reply_ng(CMD_SPIFFS_WRITE, PM3_SUCCESS, NULL, 0);
LED_B_OFF();
break;
}
2020-08-08 18:33:12 +08:00
case CMD_SPIFFS_WIPE: {
LED_B_ON();
rdv40_spiffs_safe_wipe();
reply_ng(CMD_SPIFFS_WIPE, PM3_SUCCESS, NULL, 0);
LED_B_OFF();
break;
}
case CMD_SPIFFS_ELOAD: {
LED_B_ON();
uint8_t *em = BigBuf_get_EM_addr();
if (em == NULL) {
reply_ng(CMD_SPIFFS_ELOAD, PM3_EMALLOC, NULL, 0);
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LED_B_OFF();
break;
2022-10-29 07:26:12 +08:00
}
char *fn = (char *)packet->data.asBytes;
uint32_t size = size_in_spiffs(fn);
if (size == 0) {
reply_ng(CMD_SPIFFS_ELOAD, PM3_SUCCESS, NULL, 0);
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LED_B_OFF();
break;
}
rdv40_spiffs_read_as_filetype(fn, em, size, RDV40_SPIFFS_SAFETY_SAFE);
reply_ng(CMD_SPIFFS_ELOAD, PM3_SUCCESS, NULL, 0);
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LED_B_OFF();
break;
}
case CMD_FLASHMEM_SET_SPIBAUDRATE: {
if (packet->length != sizeof(uint32_t))
break;
FlashmemSetSpiBaudrate(packet->data.asDwords[0]);
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break;
}
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case CMD_FLASHMEM_WRITE: {
LED_B_ON();
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flashmem_old_write_t *payload = (flashmem_old_write_t *)packet->data.asBytes;
if (FlashInit() == false) {
reply_ng(CMD_FLASHMEM_WRITE, PM3_EIO, NULL, 0);
LED_B_OFF();
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break;
}
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if (payload->startidx == DEFAULT_T55XX_KEYS_OFFSET) {
Flash_CheckBusy(BUSY_TIMEOUT);
Flash_WriteEnable();
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Flash_Erase4k(3, 0xC);
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} else if (payload->startidx == DEFAULT_MF_KEYS_OFFSET) {
Flash_CheckBusy(BUSY_TIMEOUT);
Flash_WriteEnable();
Flash_Erase4k(3, 0x8);
Flash_CheckBusy(BUSY_TIMEOUT);
Flash_WriteEnable();
Flash_Erase4k(3, 0x9);
Flash_CheckBusy(BUSY_TIMEOUT);
Flash_WriteEnable();
Flash_Erase4k(3, 0xA);
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} else if (payload->startidx == DEFAULT_ICLASS_KEYS_OFFSET) {
Flash_CheckBusy(BUSY_TIMEOUT);
Flash_WriteEnable();
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Flash_Erase4k(3, 0xB);
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} else if (payload->startidx == FLASH_MEM_SIGNATURE_OFFSET) {
Flash_CheckBusy(BUSY_TIMEOUT);
Flash_WriteEnable();
Flash_Erase4k(3, 0xF);
}
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uint16_t res = Flash_Write(payload->startidx, payload->data, payload->len);
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reply_ng(CMD_FLASHMEM_WRITE, (res == payload->len) ? PM3_SUCCESS : PM3_ESOFT, NULL, 0);
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LED_B_OFF();
break;
}
case CMD_FLASHMEM_WIPE: {
LED_B_ON();
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uint8_t page = packet->oldarg[0];
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uint8_t initialwipe = packet->oldarg[1];
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bool isok = false;
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if (initialwipe) {
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isok = Flash_WipeMemory();
reply_mix(CMD_ACK, isok, 0, 0, 0, 0);
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LED_B_OFF();
break;
}
if (page < 3) {
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isok = Flash_WipeMemoryPage(page);
// let spiffs check and update its info post flash erase
rdv40_spiffs_check();
}
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reply_mix(CMD_ACK, isok, 0, 0, 0, 0);
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LED_B_OFF();
break;
}
case CMD_FLASHMEM_DOWNLOAD: {
LED_B_ON();
uint8_t *mem = BigBuf_malloc(PM3_CMD_DATA_SIZE);
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uint32_t startidx = packet->oldarg[0];
uint32_t numofbytes = packet->oldarg[1];
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// arg0 = startindex
// arg1 = length bytes to transfer
// arg2 = RFU
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if (FlashInit() == false) {
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break;
}
for (size_t i = 0; i < numofbytes; i += PM3_CMD_DATA_SIZE) {
size_t len = MIN((numofbytes - i), PM3_CMD_DATA_SIZE);
Flash_CheckBusy(BUSY_TIMEOUT);
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bool isok = Flash_ReadDataCont(startidx + i, mem, len);
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if (isok == false)
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Dbprintf("reading flash memory failed :: | bytes between %d - %d", i, len);
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isok = reply_old(CMD_FLASHMEM_DOWNLOADED, i, len, 0, mem, len);
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if (isok != 0)
Dbprintf("transfer to client failed :: | bytes between %d - %d", i, len);
}
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FlashStop();
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reply_mix(CMD_ACK, 1, 0, 0, 0, 0);
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BigBuf_free();
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LED_B_OFF();
break;
}
case CMD_FLASHMEM_INFO: {
LED_B_ON();
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rdv40_validation_t *info = (rdv40_validation_t *)BigBuf_malloc(sizeof(rdv40_validation_t));
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bool isok = Flash_ReadData(FLASH_MEM_SIGNATURE_OFFSET, info->signature, FLASH_MEM_SIGNATURE_LEN);
if (FlashInit()) {
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Flash_UniqueID(info->flashid);
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FlashStop();
}
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reply_mix(CMD_ACK, isok, 0, 0, info, sizeof(rdv40_validation_t));
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BigBuf_free();
LED_B_OFF();
break;
}
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#endif
case CMD_LF_SET_DIVISOR: {
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FpgaDownloadAndGo(FPGA_BITSTREAM_LF);
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FpgaSendCommand(FPGA_CMD_SET_DIVISOR, packet->data.asBytes[0]);
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break;
}
case CMD_SET_ADC_MUX: {
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switch (packet->data.asBytes[0]) {
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case 0:
SetAdcMuxFor(GPIO_MUXSEL_LOPKD);
break;
case 2:
SetAdcMuxFor(GPIO_MUXSEL_HIPKD);
break;
#ifndef WITH_FPC_USART
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case 1:
SetAdcMuxFor(GPIO_MUXSEL_LORAW);
break;
case 3:
SetAdcMuxFor(GPIO_MUXSEL_HIRAW);
break;
#endif
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}
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break;
}
case CMD_VERSION: {
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SendVersion();
break;
}
case CMD_STATUS: {
if (packet->length == 4)
SendStatus(packet->data.asDwords[0]);
else
SendStatus(CONN_SPEED_TEST_MIN_TIME_DEFAULT);
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break;
}
case CMD_TIA: {
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while ((AT91C_BASE_PMC->PMC_MCFR & AT91C_CKGR_MAINRDY) == 0); // Wait for MAINF value to become available...
uint16_t mainf = AT91C_BASE_PMC->PMC_MCFR & AT91C_CKGR_MAINF;
Dbprintf(" Slow clock old measured value:.........%d Hz", (16 * MAINCK) / mainf);
TimingIntervalAcquisition();
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while ((AT91C_BASE_PMC->PMC_MCFR & AT91C_CKGR_MAINRDY) == 0); // Wait for MAINF value to become available...
mainf = AT91C_BASE_PMC->PMC_MCFR & AT91C_CKGR_MAINF;
Dbprintf(""); // first message gets lost
Dbprintf(" Slow clock new measured value:.........%d Hz", (16 * MAINCK) / mainf);
reply_ng(CMD_TIA, PM3_SUCCESS, NULL, 0);
break;
}
case CMD_STANDALONE: {
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uint8_t *bb = BigBuf_get_EM_addr();
bb[0] = packet->data.asBytes[0];
RunMod();
break;
}
case CMD_CAPABILITIES: {
SendCapabilities();
break;
}
case CMD_PING: {
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reply_ng(CMD_PING, PM3_SUCCESS, packet->data.asBytes, packet->length);
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break;
}
#ifdef WITH_LCD
case CMD_LCD_RESET: {
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LCDReset();
break;
}
case CMD_LCD: {
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LCDSend(packet->oldarg[0]);
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break;
}
#endif
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case CMD_FINISH_WRITE:
case CMD_HARDWARE_RESET: {
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usb_disable();
// (iceman) why this wait?
SpinDelay(1000);
AT91C_BASE_RSTC->RSTC_RCR = RST_CONTROL_KEY | AT91C_RSTC_PROCRST;
// We're going to reset, and the bootrom will take control.
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for (;;) {}
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break;
}
case CMD_START_FLASH: {
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if (g_common_area.flags.bootrom_present) {
g_common_area.command = COMMON_AREA_COMMAND_ENTER_FLASH_MODE;
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}
usb_disable();
AT91C_BASE_RSTC->RSTC_RCR = RST_CONTROL_KEY | AT91C_RSTC_PROCRST;
// We're going to flash, and the bootrom will take control.
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for (;;) {}
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break;
}
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case CMD_DEVICE_INFO: {
uint32_t dev_info = DEVICE_INFO_FLAG_OSIMAGE_PRESENT | DEVICE_INFO_FLAG_CURRENT_MODE_OS;
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if (g_common_area.flags.bootrom_present) {
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dev_info |= DEVICE_INFO_FLAG_BOOTROM_PRESENT;
}
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reply_old(CMD_DEVICE_INFO, dev_info, 0, 0, 0, 0);
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break;
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}
default: {
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Dbprintf("%s: 0x%04x", "unknown command:", packet->cmd);
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break;
}
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}
}
void __attribute__((noreturn)) AppMain(void) {
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SpinDelay(100);
BigBuf_initialize();
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// Add stack canary
for (uint32_t *p = _stack_start; p + 0x200 < _stack_end ; ++p) {
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*p = 0xdeadbeef;
}
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LEDsoff();
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// The FPGA gets its clock from us from PCK0 output, so set that up.
AT91C_BASE_PIOA->PIO_BSR = GPIO_PCK0;
AT91C_BASE_PIOA->PIO_PDR = GPIO_PCK0;
AT91C_BASE_PMC->PMC_SCER |= AT91C_PMC_PCK0;
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// PCK0 is PLL clock / 4 = 96MHz / 4 = 24MHz
AT91C_BASE_PMC->PMC_PCKR[0] = AT91C_PMC_CSS_PLL_CLK | AT91C_PMC_PRES_CLK_4; // 4 for 24MHz pck0, 2 for 48 MHZ pck0
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AT91C_BASE_PIOA->PIO_OER = GPIO_PCK0;
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// Reset SPI
AT91C_BASE_SPI->SPI_CR = AT91C_SPI_SWRST;
AT91C_BASE_SPI->SPI_CR = AT91C_SPI_SWRST; // errata says it needs twice to be correctly set.
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// Reset SSC
AT91C_BASE_SSC->SSC_CR = AT91C_SSC_SWRST;
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// Configure MUX
SetAdcMuxFor(GPIO_MUXSEL_HIPKD);
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// Load the FPGA image, which we have stored in our flash.
// (the HF version by default)
FpgaDownloadAndGo(FPGA_BITSTREAM_HF);
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StartTickCount();
#ifdef WITH_LCD
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LCDInit();
#endif
#ifdef WITH_SMARTCARD
I2C_init(false);
#endif
#ifdef WITH_FLASH
if (FlashInit()) {
uint64_t flash_uniqueID = 0;
if (!Flash_CheckBusy(BUSY_TIMEOUT)) { // OK because firmware was built for devices with flash
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Flash_UniqueID((uint8_t *)(&flash_uniqueID));
}
FlashStop();
usb_update_serial(flash_uniqueID);
}
#endif
#ifdef WITH_FLASH
// If flash is not present, BUSY_TIMEOUT kicks in, let's do it after USB
loadT55xxConfig();
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//
// Enforce a spiffs check/garbage collection at boot so we are likely to never
// fall under the 2 contigous free blocks availables
// This is a time-consuming process on large flash.
rdv40_spiffs_check();
#endif
#ifdef WITH_FPC_USART
usart_init(USART_BAUD_RATE, USART_PARITY);
#endif
allow_send_wtx = true;
// This is made as late as possible to ensure enumeration without timeout
// against device such as http://www.hobbytronics.co.uk/usb-host-board-v2
// In other words, keep the interval between usb_enable() and the main loop as short as possible.
// (AT91F_CDC_Enumerate() will be called in the main loop)
usb_disable();
usb_enable();
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for (;;) {
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WDT_HIT();
if (*_stack_start != 0xdeadbeef) {
Dbprintf("DEBUG: increase stack size, currently " _YELLOW_("%d") " bytes", (uint32_t)_stack_end - (uint32_t)_stack_start);
Dbprintf("Stack overflow detected");
Dbprintf("--> Unplug your device now! <--");
hf_field_off();
while (1);
}
// Check if there is a packet available
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PacketCommandNG rx;
memset(&rx.data, 0, sizeof(rx.data));
int ret = receive_ng(&rx);
if (ret == PM3_SUCCESS) {
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PacketReceived(&rx);
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} else if (ret != PM3_ENODATA) {
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Dbprintf("Error in frame reception: %d %s", ret, (ret == PM3_EIO) ? "PM3_EIO" : "");
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// TODO if error, shall we resync ?
}
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// Press button for one second to enter a possible standalone mode
button_status = BUTTON_HELD(1000);
if (button_status == BUTTON_HOLD) {
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/*
* So this is the trigger to execute a standalone mod. Generic entrypoint by following the standalone/standalone.h headerfile
* All standalone mod "main loop" should be the RunMod() function.
*/
allow_send_wtx = false;
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RunMod();
allow_send_wtx = true;
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}
}
}