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armsrc/felica: fix crc offsets in felica_sim_lite

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the sync bytes should not be included in the crc calculation
(and the crc bytes should be placed at the end of the response buffers)
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pieterg 2021-11-18 12:20:09 +01:00 committed by GitHub
parent d4b5bfbeaa
commit 3edd6b5b36
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1 changed files with 3 additions and 3 deletions
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6
armsrc/felica.c
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@ -681,9 +681,9 @@ void felica_sim_lite(uint8_t *uid) {
}
// calculate and set CRC
AddCrc(resp_poll0, resp_poll0[2]);
AddCrc(resp_poll1, resp_poll1[2]);
AddCrc(resp_readblk, resp_readblk[2]);
AddCrc(&resp_poll0[2], resp_poll0[2]);
AddCrc(&resp_poll1[2], resp_poll1[2]);
AddCrc(&resp_readblk[2], resp_readblk[2]);
iso18092_setup(FPGA_HF_ISO18092_FLAG_NOMOD);